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* riscv: Enlarge the default SYS_MALLOC_F_LENBin Meng2018-12-181-0/+3
* riscv: qemu: Add platform-specific Kconfig optionsBin Meng2018-12-181-0/+1
* riscv: Implement riscv_get_time() API using rdtime instructionAnup Patel2018-12-181-0/+8
* riscv: Add a SYSCON driver for SiFive's Core Local InterruptorBin Meng2018-12-181-0/+9
* riscv: Introduce a Kconfig option for machine modeAnup Patel2018-12-181-5/+16
* riscv: add Kconfig entries for the code modelLukas Auer2018-12-181-0/+18
* riscv: Add kconfig option to run U-Boot in S-modeAnup Patel2018-12-051-0/+5
* riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen2018-11-261-0/+6
* riscv: add Kconfig entries for the C and A ISA extensionsLukas Auer2018-11-261-0/+11
* riscv: select CONFIG_PHYS_64BIT on RV64I systemsLukas Auer2018-11-261-0/+1
* riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64ILukas Auer2018-11-261-8/+8
* riscv: Add QEMU virt board supportBin Meng2018-10-031-0/+4
* riscv: kconfig: Normalize architecture name spellingBin Meng2018-10-031-3/+3
* riscv: cpu: nx25: Rename as ax25Rick Chen2018-05-291-3/+3
* riscv: Add Kconfig to support RISC-VRick Chen2018-01-121-0/+42
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