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riscv
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Kconfig
Commit message (
Expand
)
Author
Age
Files
Lines
*
board: sifive: add HiFive Unmatched board support
Green Wan
2021-05-31
1
-0
/
+4
*
riscv: cpu: fu740: Add support for cpu fu740
Green Wan
2021-05-31
1
-0
/
+1
*
riscv: Group assembly optimized implementation of memory routines into a submenu
Bin Meng
2021-05-17
1
-0
/
+4
*
riscv: Split SiFive CLINT support between SPL and U-Boot proper
Bin Meng
2021-05-17
1
-1
/
+8
*
riscv: assembler versions of memcpy, memmove, memset
Heinrich Schuchardt
2021-04-08
1
-0
/
+78
*
riscv: sifive: Rename fu540 board to unleashed
Bin Meng
2021-04-08
1
-3
/
+3
*
riscv: Add DMA 64-bit address support
Padmarao Begari
2021-01-18
1
-0
/
+4
*
riscv: Move Andes PLMT driver to drivers/timer
Sean Anderson
2020-10-26
1
-7
/
+0
*
riscv: Only enable OF_BOARD_FIXUP for S-Mode
Sean Anderson
2020-10-26
1
-1
/
+1
*
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
Sean Anderson
2020-09-30
1
-4
/
+0
*
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
Sean Anderson
2020-09-30
1
-4
/
+0
*
riscv: Rework riscv timer driver to only support S-mode
Sean Anderson
2020-09-30
1
-8
/
+0
*
Merge branch 'next'
Tom Rini
2020-07-06
1
-0
/
+14
|
\
|
*
riscv: Add Sipeed Maix support
Sean Anderson
2020-07-01
1
-0
/
+4
|
*
riscv: Add option to support RISC-V privileged spec 1.9
Sean Anderson
2020-07-01
1
-0
/
+10
*
|
riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE
Bin Meng
2020-07-02
1
-0
/
+3
|
/
*
riscv: cpu: fu540: Add support for cpu fu540
Pragnesh Patel
2020-06-04
1
-0
/
+1
*
riscv: Make SBI v0.2 the default SBI version
Bin Meng
2020-04-23
1
-1
/
+1
*
riscv: Add Kconfig option for SBI v0.2
Bin Meng
2020-04-23
1
-1
/
+19
*
riscv: Add SMP Kconfig option dependency for U-Boot proper
Bin Meng
2020-04-23
1
-0
/
+1
*
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
Bin Meng
2020-04-23
1
-1
/
+12
*
Merge branch 'next' of git://git.denx.de/u-boot-usb into next
Tom Rini
2020-03-31
1
-0
/
+13
|
\
|
*
riscv: Introduce a new config for SBI v0.1
Bin Meng
2020-03-17
1
-0
/
+8
|
*
riscv: Add basic support for SBI v0.2
Bin Meng
2020-03-17
1
-0
/
+5
*
|
Kconfig: Remove redundant variable sets
Tom Rini
2020-03-16
1
-3
/
+0
|
/
*
riscv: Add option to print registers on exception
Sean Anderson
2020-02-10
1
-0
/
+3
*
riscv: increase stack size to avoid a stack overflow during distro boot
Lukas Auer
2019-12-10
1
-1
/
+1
*
riscv: add SPL support
Lukas Auer
2019-08-26
1
-0
/
+3
*
riscv: add run mode configuration for SPL
Lukas Auer
2019-08-26
1
-5
/
+28
*
riscv: Add Microchip MPFS Icicle board support
Padmarao Begari
2019-06-05
1
-0
/
+4
*
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
Trevor Woerner
2019-05-18
1
-0
/
+14
*
CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
Trevor Woerner
2019-05-18
1
-0
/
+12
*
riscv: Introduce CONFIG_XIP to support booting from flash
Rick Chen
2019-05-09
1
-0
/
+7
*
riscv: Add a SYSCON driver for Andestech's PLMT
Rick Chen
2019-04-08
1
-0
/
+9
*
riscv: Add a SYSCON driver for Andestech's PLIC
Rick Chen
2019-04-08
1
-0
/
+9
*
riscv: add support for multi-hart systems
Lukas Auer
2019-04-08
1
-0
/
+4
*
riscv: implement IPI platform functions using SBI
Lukas Auer
2019-04-08
1
-0
/
+5
*
riscv: add infrastructure for calling functions on other harts
Lukas Auer
2019-04-08
1
-0
/
+19
*
riscv: Add SiFive FU540 board support
Anup Patel
2019-02-27
1
-0
/
+4
*
riscv: Rename cpu/qemu to cpu/generic
Anup Patel
2019-02-27
1
-1
/
+1
*
riscv: Enlarge the default SYS_MALLOC_F_LEN
Bin Meng
2018-12-18
1
-0
/
+3
*
riscv: qemu: Add platform-specific Kconfig options
Bin Meng
2018-12-18
1
-0
/
+1
*
riscv: Implement riscv_get_time() API using rdtime instruction
Anup Patel
2018-12-18
1
-0
/
+8
*
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
Bin Meng
2018-12-18
1
-0
/
+9
*
riscv: Introduce a Kconfig option for machine mode
Anup Patel
2018-12-18
1
-5
/
+16
*
riscv: add Kconfig entries for the code model
Lukas Auer
2018-12-18
1
-0
/
+18
*
riscv: Add kconfig option to run U-Boot in S-mode
Anup Patel
2018-12-05
1
-0
/
+5
*
riscv: cache: Implement i/dcache [status, enable, disable]
Rick Chen
2018-11-26
1
-0
/
+6
*
riscv: add Kconfig entries for the C and A ISA extensions
Lukas Auer
2018-11-26
1
-0
/
+11
*
riscv: select CONFIG_PHYS_64BIT on RV64I systems
Lukas Auer
2018-11-26
1
-0
/
+1
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