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path: root/drivers/clk/sunxi
Commit message (Expand)AuthorAgeFilesLines
* clk: sunxi: h6: Add XHCI clocksSamuel Holland2021-04-161-0/+2
* clk: sunxi: Add a dummy clock driver for the RTCSamuel Holland2021-04-162-0/+37
* clk: sunxi: Add support for H616 clocksJernej Skrabec2021-01-253-0/+128
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-1311-11/+11
* clk: sunxi: add compatible string for V3Icenowy Zheng2020-11-171-0/+2
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-1812-0/+12
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* sunxi: clocks: Add H6 USB clock gates and resetsAndre Przywara2019-07-161-0/+29
* clk: sunxi: r40: Fix GMAC reset reg offsetJagan Teki2019-04-161-1/+2
* clk: sunxi: a10: Add CLK_AHB_GMACJagan Teki2019-04-011-0/+2
* clk: sunxi: h3: Implement EPHY CLK and RESETJagan Teki2019-03-091-0/+4
* clk: sunxi: Implement EMAC, GMAC clocks, resetsJagan Teki2019-03-096-0/+15
* clk: sunxi: Implement A10 EMAC clocksJagan Teki2019-03-092-0/+2
* clk: sunxi: Implement SPI clocks, resetsJagan Teki2019-03-0411-0/+97
* sunxi: clk: enable clk and reset for CCU devicesAndre Przywara2019-01-301-0/+12
* sunxi: clk: A80: add MMC clock supportAndre Przywara2019-01-291-1/+27
* sunxi: clk: add MMC gates/resetsAndre Przywara2019-01-2911-0/+63
* clk: sunxi: Add Allwinner A80 CLK driverJagan Teki2019-01-183-0/+65
* clk: sunxi: Add Allwinner H6 CLK driverJagan Teki2019-01-183-0/+61
* clk: sunxi: Implement UART resetsJagan Teki2019-01-187-0/+43
* clk: sunxi: Implement UART clocksJagan Teki2019-01-189-0/+57
* clk: sunxi: Add Allwinner V3S CLK driverJagan Teki2019-01-183-0/+59
* clk: sunxi: Add Allwinner R40 CLK driverJagan Teki2019-01-183-0/+78
* clk: sunxi: Add Allwinner A83T CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A23/A33 CLK driverJagan Teki2019-01-183-0/+71
* clk: sunxi: Add Allwinner A31 CLK driverJagan Teki2019-01-183-0/+76
* clk: sunxi: Add Allwinner A10s/A13 CLK driverJagan Teki2019-01-183-0/+64
* clk: sunxi: Add Allwinner A10/A20 CLK driverJagan Teki2019-01-183-0/+67
* clk: sunxi: Add Allwinner H3/H5 CLK driverJagan Teki2019-01-183-0/+87
* reset: Add Allwinner RESET driverJagan Teki2019-01-182-0/+21
* clk: Add Allwinner A64 CLK driverJagan Teki2019-01-184-0/+147
generated by cgit (git 2.34.1) at 2024-11-15 20:17:05 +0000