summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx/imx8m/clock_imx8mm.c
Commit message (Collapse)AuthorAgeFilesLines
* ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTOMarek Behún2021-05-241-1/+1
| | | | | | | | | | | | | | When building imx8mp_evk_defconfig with LTO, the compiler complains about type mismatch of function imx_eqos_txclk_set_rate() in file drivers/net/dwc_eth_qos.c:845:12 which contains a weak definition of this function, vs file arch/arm/mach-imx/imx8m/clock_imx8mm.c which contains an implementation. Change the type of this function in the implementation to fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* iMX8M: Add support to enable CONFIG_IMX_HABYe Li2021-04-081-0/+8
| | | | | | | | | | | | | Add some SOC level codes and build configurations to use HAB lib for CONFIG_IMX_HAB (secure boot), like adding the SEC_CONFIG fuse, enable fuse driver, CAAM clock function, and add CAAM secure RAM to MMU table. The FSL_CAAM is temporally not enabled for iMX8M when CONFIG_IMX_HAB is set, because we don't need the CAAM driver for SPL. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
| | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* imx8m: clock_imx8mm: add missed returnPeng Fan2020-09-171-0/+1
| | | | | | Add missed return Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: add eqos clkPeng Fan2020-07-141-0/+90
| | | | | | | | | Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the weak function in driver Add set_clk_eqos to configure eQoS clk Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: add sdhc/nand/ecspi clk apiPeng Fan2020-07-141-0/+66
| | | | | | | | | Current DM CLK is a bit complicated, for simplity, let DM clk only support enable/disable/get_rate. For the expected rate settings, we use non-DM clk to do that. Then we could have simple DM clk for i.MX and could also share between SPL/U-Boot proper. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: configure NoC clkPeng Fan2020-07-141-0/+13
| | | | | | Configure NoC clk for better system performance Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: configure arm clk sources from PLLPeng Fan2020-07-141-1/+129
| | | | | | | A53 CCM root max support 1GHz, to support high freq, we need to switch ARM clk sources from ARM PLL directly. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* imx8mm: clock: fix fracpll decode issueYe Li2020-05-011-12/+12
| | | | | | | | | | | The fracpll decoding is using the bit definitions for int pll. Most of them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK for fracpll and correct all bit definitions in fracpll decoding. Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* ARM: imx: imx8mm: Add missing clock entries for FEC clockMarek Vasut2020-05-011-0/+49
| | | | | | | | | | | | | All the FEC ethernet clock entries for iMX8MM are missing, while they are already present on iMX8MQ. Fill in the nodes on iMX8MM, as the FEC ethernet gets bogus clock information otherwise which makes ethernet inoperable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* imx8m: clock_imx8mm: Staticize functionsAlifer Moraes2020-01-201-5/+5
| | | | | | | | | | | | | | | | | | | Functions fracpll_configure(), decode_intpll(), decode_fracpll(), get_root_src_clk() and get_root_clk() are used only in the scope of this file, so make them static to fix the following sparse warnings: arch/arm/mach-imx/imx8m/clock_imx8mm.c:50:5: warning: no previous prototype for ‘fracpll_configure’ [-Wmissing-prototypes] arch/arm/mach-imx/imx8m/clock_imx8mm.c:271:5: warning: no previous prototype for ‘decode_intpll’ [-Wmissing-prototypes] arch/arm/mach-imx/imx8m/clock_imx8mm.c:418:5: warning: no previous prototype for ‘decode_fracpll’ [-Wmissing-prototypes] arch/arm/mach-imx/imx8m/clock_imx8mm.c:483:5: warning: no previous prototype for ‘get_root_src_clk’ [-Wmissing-prototypes] arch/arm/mach-imx/imx8m/clock_imx8mm.c:527:5: warning: no previous prototype for ‘get_root_clk’ [-Wmissing-prototypes] Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
* imx: imx8m: only support non-dm code in clock_imx8mm.cPeng Fan2020-01-081-33/+306
| | | | | | | | | | The drivers/clk/imx/*.c are used for CLK dm case, the clock_imx8mm.c is used for non CLK dm case, let's split it. Sometimes it is hard to enable CLK dm in SPL stage, considering code size, malloc size requirement, the splittion will make it easy to use non CLK dm in SPL stage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx8m: add 1GHz fracpll entryPeng Fan2020-01-081-0/+1
| | | | | | 4000MTS DDR needs 1GHz fracpll, so add the entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: add clk support for i.MX8MMPeng Fan2019-10-081-0/+306
Introduce clk implementation for i.MX8MM, including pll configuration, ccm configuration. Mostly will be done clk dm driver, but such as DRAM part, we still use non clk dm driver, because we have limited sram. Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-09-03 18:58:28 +0000