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* ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTOMarek Behún2021-05-241-1/+1
| | | | | | | | | | | | | | When building imx8mp_evk_defconfig with LTO, the compiler complains about type mismatch of function imx_eqos_txclk_set_rate() in file drivers/net/dwc_eth_qos.c:845:12 which contains a weak definition of this function, vs file arch/arm/mach-imx/imx8m/clock_imx8mm.c which contains an implementation. Change the type of this function in the implementation to fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: make gd a function call for LTO and set via set_gd()Marek Behún2021-05-242-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM, the gd pointer is stored in registers r9 / x18. For this the -ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global register variables causes errors when building with LTO, and these errors are very difficult to overcome. Richard Biener says [1]: Note that global register vars shouldn't be used with LTO and if they are restricted to just a few compilation units the recommended fix is to build those CUs without -flto. We cannot do this for U-Boot since all CUs use -ffixed-reg flag. It seems that with LTO we could in fact store the gd pointer differently and gain performance or size benefit by allowing the compiler to use r9 / x18. But this would need more work. So for now, when building with LTO, go the clang way, and instead of declaring gd a global register variable, we make it a function call via macro. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384 Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM:imx:imx8mq-cm: Add support for Ronetix iMX8MQ-CMIlko Iliev2021-05-021-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Supported peripherals: Ethernet, eMMC, Serial. U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) Normal Boot Trying to boot from MMC2 U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz Reset cause: POR Model: Ronetix iMX8M-CM SoM DRAM: 1 GiB WDT: Started with servicing (60s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - 42:0d:e7:78:da:53 eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 u-boot=> Signed-off-by: Ilko Iliev <iliev@ronetix.at>
* imx: Add support for Ronetix's iMX7-CM boardIlko Iliev2021-05-021-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Console boot log: U-Boot SPL 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) Trying to boot from MMC1 U-Boot 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 44C Reset cause: POR Model: Ronetix iMX7-CM Board Board: iMX7-CM DRAM: 512 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - fe:be:37:01:5a:3f eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 Signed-off-by: Ilko Iliev <iliev@ronetix.at>
* imx: mkimage_fit_atf: fix file size reportingTim Harvey2021-05-021-4/+4
| | | | | | | | | | | instead using ls and awk to determine file size use stat instead. This fixes an invalid size reporting for user or group names that have spaces in them. This adds a dependency on the stat application which is part of the coreutils package which also includes ls. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* arm: imx8m: add support for Compulab iot-gate-imx8 (imx8mm-cl-iot-gate)Ying-Chun Liu (PaulLiu)2021-05-021-0/+8
| | | | | | | | | | | | | | | | Add initial support for Compulab iot-gate-imx8 board (imx8mm-cl-iot-gate). The initial support includes: - MMC - eMMC - I2C - FEC - Serial console Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Peter Robinson <pbrobinson@gmail.com>
* board: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0Jagan Teki2021-05-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. i.Core MX8M Mini needs to mount on top of this Carrier board for creating complete i.Core MX8M Mini C.TOUCH 2.0 board. Linux dts commit details: commit <a142252061ff> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0") Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* board: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter KitJagan Teki2021-05-021-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. Linux dts commit details: commit <051c08eea682> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit") Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* arm: Remove mx6dlarm2 boardTom Rini2021-04-101-4/+0
| | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove cgtqmx6eval boardTom Rini2021-04-101-10/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove titanium boardTom Rini2021-04-101-5/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ts4800 boardTom Rini2021-04-101-5/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove mx53evk boardTom Rini2021-04-101-6/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove pfla02 boardTom Rini2021-04-101-7/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove zc5202 and zc5601 boardsTom Rini2021-04-101-17/+0
| | | | | | | | These boards have not been converted to CONFIG_DM_MMC by the deadline. Remove them. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove xpress boardTom Rini2021-04-101-10/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove platinum_picon boardTom Rini2021-04-101-9/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove secomx6quq7 boardTom Rini2021-04-101-4/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ts4600 boardTom Rini2021-04-101-4/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove sc_sps_1 boardTom Rini2021-04-101-4/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove SANSA_FUZE_PLUS boardTom Rini2021-04-101-4/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove xfi3 boardTom Rini2021-04-101-1/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ot1200 boardTom Rini2021-04-101-6/+0
| | | | | | | | | | | This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. In order to convert to using the DWC SATA driver under DM further migrations are required. Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* arm: Remove dms-ba16 boardTom Rini2021-04-101-7/+0
| | | | | | | | | | | This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove this board. Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Signed-off-by: Tom Rini <trini@konsulko.com>
* imx: bootaux fix elf loadingMax Krummenacher2021-04-081-1/+66
| | | | | | | | | | | | | | | | | | | This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit 805b3cac1e0c. The loader function name was changed so that it does not clash with the generically available function in lib/elf.c. imx-bootaux loads an elf file linked for an auxilary core. Thus the loader function requires address translation from the auxilary core's address space to where those are mapped into U-Boot's address space. So the elf loader is specific and must not be replaced with a generic loader which doesn't provide the address translation functionality. Fixes commit 805b3cac1e0c ("lib: elf: Move the generic elf loading/validating functions to lib") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
* ARM: imx: Add OCRAM_S into iMX8M MMU tablesMarek Vasut2021-04-081-0/+7
| | | | | | | | | | The OCRAM_S is regular memory, just like the OCRAM, add it to the MMU tables so it can be used and cached. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx8mp-evk: switch to use binmanPeng Fan2021-04-081-0/+1
| | | | | | Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8mn-evk: switch to use binmanPeng Fan2021-04-081-0/+1
| | | | | | Use binman to pack images. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8mn-ddr4-evk: switch to use binmanPeng Fan2021-04-081-0/+1
| | | | | | Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8mm_evk: switch to use binman to pack imagesPeng Fan2021-04-081-0/+1
| | | | | | Use binman to pack images Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8: Add DEK blob encapsulationClement Faure2021-04-083-0/+160
| | | | | | | | Add DEK encapsulation support for imx8. The DEK blob is generated by the SECO through the SCFW API. Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx8m: Add DEK blob encapsulation for imx8mClement Faure2021-04-082-11/+106
| | | | | | | | | | | | | | | | | | Add DEK blob encapsulation support for IMX8M through "dek_blob" command. On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob for encrypted boot. The DEK blob is encapsulated by OP-TEE through a trusted application call. U-boot sends and receives the DEK and the DEK blob binaries through OP-TEE dynamic shared memory. To enable the DEK blob encapsulation, add to the defconfig: CONFIG_SECURE_BOOT=y CONFIG_FAT_WRITE=y CONFIG_CMD_DEKBLOB=y Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: caam: new u-boot command to set PRIBLOB bitfield from CAAM SCFGR ↵Clement Le Marquis2021-04-083-0/+41
| | | | | | | | | | | | | | | | register to 0x3 It is highly recommended to set the PRIBLOB bitfield to 0x3 once your encrypted boot image has booted up, this prevents the generation of new blobs that can be used to decrypt an encrypted boot image. The PRIBLOB is a sticky type bit and cannot be changed until the next power on reset. Add the set_priblob_bitfield U-Boot command to prevent the generation of new blobs. Signed-off-by: Clement Le Marquis <clement.lemarquis@nxp.com> Acked-by: Ye Li <Ye.Li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* crypto: caam: Add CAAM support to i.MX8M platformsAymen Sghaier2021-04-081-0/+1
| | | | | | | This patch enable CAAM support for i.MX8M platforms. Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* caam: enable support for iMX7ULPFranck LENORMAND2021-04-081-0/+1
| | | | | Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: cmd_dek: Enable DEK only for chips supporting CAAMYe Li2021-04-081-1/+1
| | | | | | | | Since cmd_dek is using CAAM JR, so enable the CMD_DEK only when HAS_CAAM is set Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* iMX8M: Add support to enable CONFIG_IMX_HABYe Li2021-04-084-1/+17
| | | | | | | | | | | | | Add some SOC level codes and build configurations to use HAB lib for CONFIG_IMX_HAB (secure boot), like adding the SEC_CONFIG fuse, enable fuse driver, CAAM clock function, and add CAAM secure RAM to MMU table. The FSL_CAAM is temporally not enabled for iMX8M when CONFIG_IMX_HAB is set, because we don't need the CAAM driver for SPL. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: Fix build warnings in 32-bit targetsBreno Lima2021-04-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled the following warnings are displayed: arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \ of type 'long unsigned int', but argument 3 has type 'uint32_t \ {aka unsigned int}' [-Wformat=] printf("HAB check target 0x%08x-0x%08lx fail\n", ~~~~^ %08x ddr_start, ddr_start + bytes); arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \ of type 'unsigned int', but argument 3 has type 'ulong \ {aka long unsigned int}' [-Wformat=] printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr); ~^ %lx Fix warnings by providing the correct data type. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* mx7ulp: hab: Add hab_status command for HABv4 M4 bootBreno Lima2021-04-081-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting in low power or dual boot modes the M4 binary is authenticated by the M4 ROM code. Add an option in hab_status command so users can retrieve M4 HAB failure and warning events. => hab_status m4 Secure boot disabled HAB Configuration: 0xf0, HAB State: 0x66 No HAB Events Found! Add command documentation in mx6_mx7_secure_boot.txt guide. As HAB M4 API cannot be called from A7 core the code is parsing the M4 HAB persistent memory region. The HAB persistent memory stores HAB events, public keys and others HAB related information. The HAB persistent memory region addresses and sizes can be found in AN12263 "HABv4 RVT Guidelines and Recommendations". Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: Check if IVT header is HABv4Breno Lima2021-04-081-2/+1
| | | | | | | | | | | | | | | | The HABv4 implementation in ROM checks if HAB major version in IVT header is 4.x. The current implementation in hab.c code is only validating HAB v4.0 and HAB v4.1 and may be incompatible with newer HABv4 versions. Modify verify_ivt_header() function to align with HABv4 implementation in ROM code. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: Display All HAB events via hab_status commandUtkarsh Gupta2021-04-081-2/+2
| | | | | | | | | Add ability for hab_status command to show All HAB events and not just HAB failure events Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: Enable hab.c to authenticate additional images in open configurationBreno Lima2021-04-081-4/+2
| | | | | | | | | | | | | | | | | Currently it's not possible to authenticate additional boot images in HAB open configuration. The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior to calling the hab_authenticate_image() API function. Users cannot check if their additional boot images has been correctly signed prior to closing their device. Enable hab.c to authenticate additional boot images in open mode so HAB events can be retrieved through get_hab_status() function. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* hab: Change calling to ROM API failsafeYe Li2021-04-081-3/+0
| | | | | | | | | Modify to use hab_rvt_failsafe function for failsafe ROM API, not directly call its ROM address. This function will wrap the sip call for iMX8M platforms. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: HAB: Validate IVT before authenticating imageUtkarsh Gupta2021-04-081-16/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling csf_is_valid() with an un-signed image may lead to data abort as the CSF pointer could be pointing to a garbage address when accessed in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf). Authenticate image from DDR location 0x80800000... Check CSF for Write Data command before authenticating image data abort pc : [<fff5494c>] lr : [<fff54910>] reloc pc : [<8780294c>] lr : [<87802910>] sp : fdf45dc8 ip : 00000214 fp : 00000000 r10: fffb6170 r9 : fdf4fec0 r8 : 00722020 r7 : 80f20000 r6 : 80800000 r5 : 80800000 r4 : 00720000 r3 : 17a5aca3 r2 : 00000000 r1 : 80f2201f r0 : 00000019 Flags: NzcV IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... To avoid such errors during authentication process, validate IVT structure by calling validate_ivt function which checks the following values in an IVT: IVT_HEADER = 0x4X2000D1 ENTRY != 0x0 RES1 = 0x0 DCD = 0x0 /* Recommended */ SELF != 0x0 /* Absoulute address of IVT */ CSF != 0x0 RES2 = 0x0 This commit also checks if Image's start address is 4 byte aligned. commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image" removed as this patch addresses the issue. Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: HAB: Update hab codes to support ARM64 and i.MX8MPeng Fan2021-04-081-25/+204
| | | | | | | | | | | | | | | | | | | | | | | | There are some changes to support ARM64 i.MX8M platform in this patches: 1. The hab_rvt base and function vectors are different as i.MX6/7 2. Need to bypass an workaround for i.MX6 to fix problem in MMU. 3. The x18 register needed save & restore before calling any HAB API. According to ARM procedure call spec, the x18 is caller saved when it is used as temporary register. So calling HAB API may scratch this register, and cause crash once accessing the gd pointer. On ARMv7, the r9 is callee saved when it is used as variable register. So no need to save & restore it. 4. Add SEC_CONFIG fuse for iMX8M When current EL is not EL3, the direct calling to HAB will fail because CAAM/SNVS can't initialize at non-secure mode. In this case, we use SIP call to run the HAB in ATF. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: hab: Add function to authenticate kernel imageYe Li2021-04-081-0/+12
| | | | | | | | | | | When loading kernel image, the image size is parsed from header, so it does not include the CSF and IVT. Add back the authenticate_image function to wrap the imx_hab_authenticate_image with calculating IVT offset and full image size. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: Avoid hardcoded Job Ring Max sizeBreno Lima2021-04-082-5/+2
| | | | | | | | | | Prior instantiating RNG we have to ensure if the CAAM job rings are available. Avoid hardcoded job ring max size and use the definition at fsl_sec.h Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: Ensure CAAM clock is enabled prior getting out_jr_sizeBreno Lima2021-04-082-6/+7
| | | | | | | | | | Prior calling sec_in32() we have to ensure CAAM clock is enabled, the function sec_in32() is reading CAAM registers and if CAAM clock is disabled the system will hang. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: Avoid hardcoded output ring size register offset (ORSR)Breno Lima2021-04-082-2/+4
| | | | | | | | | | The CAAM output ring size register offset is currently defined in fsl_sec.h as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in i.MX common code. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: imx7 Support for Manufacturing ProtectionBreno Lima2021-04-083-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code was originally developed by Raul Cardenas <raul.casas@nxp.com> and modified to be applied in U-Boot imx_v2017.03. More information about the initial submission can be seen in the link below: https://lists.denx.de/pipermail/u-boot/2016-February/245273.html i.MX7D has an a protection feature for Manufacturing process. This feature uses asymmetric encryption to sign and verify authenticated software handled between parties. This command enables the use of such feature. The private key is unique and generated once per device. And it is stored in secure memory and only accessible by CAAM. Therefore, the public key generation and signature functions are the only functions available for the user. The manufacturing-protection authentication process can be used to authenticate the chip to the OEM's server. Command usage: Print the public key for the device. - mfgprot pubk Generates Signature over given data. - mfgprot sign <data_address> <data_size> Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-08-29 01:37:06 +0000