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* Merge tag 'v2021.04-rc4' into nextTom Rini2021-03-1552-228/+306
|\ | | | | | | Prepare v2021.04-rc4
| * Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini2021-03-1513-46/+56
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
| | * video: dw_mipi_dsi: update log of dphy_enableYannick Fertre2021-03-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DSI phy can be turned on from the DSI digital interface in the dphy_enable() function or from a dedicated DSI phy "wrapper" in phy_ops->init() function. If the STM32MP1 case, the wrapper is used then the dphy_enable() "warning" traces are not relevant. This patch moves these "warning" traces to "debug" traces so they are still available for DSI phy based on the digital interface in debug logging mode, but not there in normal mode for both cases. Note: The related Linux kernel driver uses a "debug" message too. Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * video: dw_mipi_dsi: missing device to log debugYannick Fertre2021-03-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Missing udevice to struct dw_mipi_dsi to log trace. Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * video: stm32: remove all child of DSI bridge when its probe failedPatrick Delaunay2021-03-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the child device of the STM32 DSI bridge when the driver probe failed to stop futher probe request on panels used with STMicroelectronics board (orisetech_otm8009a.c or raydium-rm68200.c driver). This patch avoid the trace "cannot get reset GPIO" when STM32MP157 device tree is used on stm32MP151 SOC without DSI support. In this hw_version value is 0, as DSI bridge is absent and the panel ofdata_to_platdata is called for each try of panel probe, the gpio reset pin is requested but after dsi father probe failed). For the next request, the PANEL ofdata_to_platdata failed as the gpio is already used. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * scmi: cosmetic: reorder include filesPatrick Delaunay2021-03-112-3/+2
| | | | | | | | | | | | | | | | | | | | | Reorder include files in expected order. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * scmi: define LOG_CATEGORYPatrick Delaunay2021-03-116-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * scmi: Include device_compat.hPatrick Delaunay2021-03-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Include the file needed for log function prototype, this patch solves the compilation issue for undefined reference to `dev_err'. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * clk: stm32mp1: gets root clocks from fdtEtienne Carriere2021-03-111-39/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change makes stm32mp1 clock driver to get the root clocks reference from the device node in the FDT rather than fetching straight these clocks by their name. Driver now stores the clock reference and use it to know if a root clock is present, get its rate or gets its related udevice reference. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| | * mtd: spinand: Add WATCHDOG_RESET() in spinand_mtd_read/write()Patrice Chotard2021-03-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | In case of big area read/write on spi nand, watchdog timeout may occurs. To fix that, add WATCHDOG_RESET() in spinand_mtd_read() and spinand_mtd_write() to ensure that watchdog is reset. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| | * mtd: nand: Add WATCHDOG_RESET() in nanddev_mtd_erase()Patrice Chotard2021-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | In case of big area erased on nand, watchdog timeout may occurs. To fix that, add WATCHDOG_RESET() in nanddev_mtd_erase() to ensure that watchdog is reset. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| | * spi: stm32_qspi: Add WATCHDOG_RESET in _stm32_qspi_read_fifo()Patrice Chotard2021-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of reading large area and memory-map mode is misconfigured (memory-map size declared lower than the real size of the memory chip) watchdog can be triggered. Add WATCHDOG_RESET() in _stm32_qspi_read_fifo to fix it. Issue reproduced with stm32mp157c-ev1 board and memory map size set to 1, with following command: sf read 0xC0000000 0 0x4000000 Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| | * mtd: spi-nor: Add WATCHDOG_RESET() in spi_nor_core callbacksPatrice Chotard2021-03-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of big area write/erase on spi nor, watchdog timeout may occurs. Issue reproduced on stm32mp157c-ev1 with following commands: sf write 0xC0000000 0 0x3000000 or sf erase 0 0x1000000 Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár2021-03-123-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * | arm: a37xx: pci: Implement workaround for the readback value of VEND_IDPali Rohár2021-03-121-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243): The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it should read 11ABh. The firmware can write the correct value, 11ABh, through VEND_ID (RD0076044h [15:0]). Implement this workaround in U-Boot PCIe controller driver aardvark for both PCI vendor id and PCI subsystem vendor id. This change affects PCI vendor id of PCIe root bridge emulated by Linux kernel. With this change Linux kernel reports correct vendor id 11AB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
| * | ddr: marvell: axp: fix array types have different bounds warningMarek Behún2021-03-122-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have different bounds declared in header files where these variables are also defined from the ones declared in source files. This causes the compiler to complain (when building with LTO): ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match original declaration [-Wlto-type-mismatch] ddr3_patterns_64bit.h:911:5: note: array types have different bounds ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously declared here ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:167:4: note: array types have different bounds ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared here ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match original declaration [-Wlto-type-mismatch] ddr3_axp_vars.h:196:4: note: array types have different bounds ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared here CI managed to trigger this as an error when compiling with LTO for AXP. Fix this by using values from the header files, which seem to be the correct ones. Signed-off-by: Marek Behún <marek.behun@nic.cz>
| * | ddr: marvell: axp: align signature of mv_xor_mem_init() with a38xMarek Behún2021-03-122-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common XOR definitions, regardless whether we compile for axp or a38x. But the declaration of this function has a different signature in axp's xor.h from the one used in a38x' implementation - one parameter is u64 instead of u32. This can result in wrong argument's being passed to that function on a38x with no one the wiser. I discovered this when building U-Boot for Turris Omnia with LTO. The compiler complains about the different signatures being thrown into the same linking process: axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match original declaration [-Wlto-type-mismatch] 67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, | ^ a38x/xor.c:165:5: note: type mismatch in parameter 3 165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long | ^ a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match type ‘u32’ Fix this by changing the type of the block_size argument in the axp's implementation and header file to the one used in a38x (and upstream mv-ddr-marvell). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
| * | ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repositoryPali Rohár2021-03-1210-40/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This syncs drivers/ddr/marvell/a38x/ with the master branch of repository https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the commit 7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot"). This patch was created by following steps: 1. Replace all a38x files in U-Boot tree by files from upstream github Marvell mv-ddr-marvell repository. 2. Run following command to omit portions not relevant for a38x and ddr3: files=drivers/ddr/marvell/a38x/* sed 's/#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)/#ifdef TRUE/' -i $files unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 -UCONFIG_APN806 \ -UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \ -UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DTRUE $files 3. Manually omit SPDX-License-Identifier changes from this patch as upstream license in upstream github repository contains long license texts and U-Boot is using just SPDX-License-Identifier. After applying this patch, a38x ddr3 code in upstream Marvell github repository and in U-Boot would be fully identical. So in future applying above steps could be used to sync code again. The only change in this patch is removal of dead code and some fixes with include files. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | ddr: marvell: a38x: Add more space for additional info from SPDSujeet Baranwal2021-03-121-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream. At this moment, only page 0 of SPD is being read but to support smbios, we need to read page 1 also which has more info. In order to do that, we need to allocate more space. Signed-off-by: Sujeet Baranwal <sujeet.baranwal@cavium.com> Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Sujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Chris Packham <judge.packham@gmail.com>
| * | usb: mtu3: flush cache for next GPDChunfeng Yun2021-03-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | When flush cache of the current GPD and resume QMU, the controller will try to access the next GPD after processing the current one, if not flush the next GPD, the controller may get wrong GPD status. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
| * | x86: Move INTEL_ACPIGEN to arch/x86Simon Glass2021-03-091-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option is better placed in the x86 code since it is not generic enough to be in the core code. Move it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in arch/x86/Kconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | Merge tag 'u-boot-amlogic-20210308' of ↵Tom Rini2021-03-081-7/+7
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - button: adc: fix treshold typo - configs: meson64: add fdtoverlay_addr_r
| | * | button: adc: fix treshold typoNeil Armstrong2021-03-081-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the treshold typo in code by threshold. Fixes: c0165c85c3 ("button: add a simple Analog to Digital Converter device based button driver") Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
| * | | arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64Siew Chin Lim2021-03-083-5/+5
| |/ / | | | | | | | | | | | | | | | Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
| * | dm: sysreset: Add a Kconfig option for the 'reset' commandBin Meng2021-03-052-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sysreset uclass driver provides an implementation of 'reset' command using the sysreset_ APIs unconditionally. It also supports the 'poweroff' command using the sysreset_ APIs, but under a Kconfig option CONFIG_SYSRESET_CMD_POWEROFF. Let's do the same for the 'reset' command, by introducing a new Kconfig option CONFIG_SYSRESET_CMD_RESET, and set it to on by default, to allow a board that don't have a sysreset reset driver yet, but have a sysreset poweroff driver to compile without any issue. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | gpio: mpc8xxx: Support controller register physical address beyond 32-bitBin Meng2021-03-051-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | dev_read_addr_size_index() returns fdt_addr_t which might be a 64-bit physical address. This might be true for some 85xx SoCs whose CCSBAR is mapped beyond 4 GiB. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | virtio: Fix VirtIO BLK driver dependencyBin Meng2021-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The VirtIO BLK driver depends on the blk uclass driver. Add the dependency in the Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: mpc85xx: Support 64-bit bus and cpu addressBin Meng2021-03-051-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the driver only supports 32-bit bus and cpu address. The controller's outbound registers/fields for extended address are not programmed. Let's program them to support 64-bit bus and cpu address. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: mpc85xx: Support controller register physical address beyond 32-bitBin Meng2021-03-051-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devfdt_get_addr_index() returns fdt_addr_t which might be a 64-bit physical address. Use map_physmem() to return the virtual address that can be used by a 32-bit machine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: mpc85xx: Wrap LAW programming with CONFIG_FSL_LAWBin Meng2021-03-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the QEMU ppce500 machine, LAW registers are not implemented hence CONFIG_FSL_LAW is not turned on and all LAW APIs are not available. We should wrap all LAW registers programming in the mpc85xx PCI driver with CONFIG_FSL_LAW. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | pci: fsl_pci_init: Dynamically allocate the PCI regionsBin Meng2021-03-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI regions") changes 'struct pci_controller'.regions from pre-allocated array of regions to dynamically allocated, which unfortunately broken lots of boards that still use the non-DM PCI driver. This patch changes the non-DM fsl_pci_init driver to dynamically allocate the regions, just like what's done in the pci uclass driver. Fixes: e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI regions") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | serial: ns16550: Handle zero <clock-frequency> valueBin Meng2021-03-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A working device tree node of ns16550 should never be populated with value zero for the <clock-frequency> property. Unfortunately this is the case for the QEMU ppce500 target. Let's try to assign plat->clock to CONFIG_SYS_NS16550_CLK as the last resort to handle such case. This commit should be reverted when: - The following QEMU patch [1] is merged, and - U-Boot CI has upgraded its QEMU version that contains the fix [1] http://patchwork.ozlabs.org/project/qemu-devel/patch/1612362288-22216-2-git-send-email-bmeng.cn@gmail.com/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | serial: ns16550: Correct the base address typeBin Meng2021-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently ns16550_serial_assign_base() treats the argument 'base' with type `ulong`. This is incorrect because the base address was obtained from device tree with type `fdt_addr_t` that can represent a physical address larger than 32-bit in a 32-bit system. Fixes: 9e6ce62190b7 ("serial: ns16550: Fix ordering of getting base address") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sandbox: host bind must close file descriptorHeinrich Schuchardt2021-03-031-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each invocation of the 'host bind' command with a file name argument opens a file descriptor. The next invocation of the 'host bind' command destroys the block device but the file descriptor remains open. The same holds true for the 'unbind blk' command. Close the file descriptor when unbinding the host block device. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Add DM_DEVICE_REMOVE condition to all exit pathsSimon Glass2021-03-031-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | At present device_bind() does some unnecessary work if a device fails to bind in SPL. Add the missing conditions. Also fix a style nit in the same function while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Fix allocation of empty of-platdataSimon Glass2021-03-031-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With of-platdata we always have a dtv struct that holds the platform data provided by the driver_info record. However, this struct can be empty if there are no actual devicetree properties provided. The upshot of empty platform data is that it will end up as a zero-size member in the BSS section, which is fine. But if the driver specifies plat_auto then it expects the correct amount of space to be allocated. At present this does not happen, since device_bind() assumes that the platform-data size will always be >0. As a result we end up not allocating the space and just use the BSS region, overwriting whatever other contents are present. Fix this by removing the condition that platform data be non-empty, always allocating space if requested. This fixes a strange bug that has been lurking since of-platdata was implemented. It has likely never been noticed since devices normally have at least some devicetree properties, BSS is seldom used on SPL, the dtv structs are normally at the end of bss and the overwriting only happens if a driver changes its platform data. It was discovered using sandbox_spl, which exercises more features than a normal board might, and the critical global_data variable 'gd' happened to be at the end of BSS. Fixes: 9fa28190091 ("dm: core: Expand platdata for of-platdata devices") Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge tag 'u-boot-imx-20210303' of ↵Tom Rini2021-03-032-0/+13
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
| | * | mmc: fsl_esdhc_imx: fix the DTOCV to 0xEHaibo Chen2021-03-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact cmd6 behavior, after cmd6 get transfer complete interrupt, the data0 line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL. For other platforms, do not has this issue. To fix this issue, fix the DTOCV to 0xE, the max setting, this also align with Linux configuration. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| | * | mmc: fsl_esdhc_imx: Add a compatible for i.MX51Fabio Estevam2021-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a compatible for i.MX51 so that i.MX51 can use this driver via driver model. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| | * | thermal: imx_tmu: enable monitoring and default alert/criticalTim Harvey2021-03-011-0/+6
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set default critical/alert temperature and enabling monoitoring. Without calling imx_tmu_enable_msite() monitoring will not be enabled and read_temperature will return 0. Additionally without setting alert temperature will cause imx_tmu_get_temp() to spin indefiniately thinking the system needs to cool. This resolves the board spinning endlessly when enabling IMX_TMU in the SPL. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | usb: USB keyboard requires DM_KEYBOARDHeinrich Schuchardt2021-03-031-0/+1
| | | | | | | | | | | | | | | | | | If CONFIG_DM_USB=y, the USB keyboard only works if CONFIG_DM_KEYBOARD=y. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | usb: gadget: Use dbg_ep0() macro instead of serial_printf()Pali Rohár2021-03-031-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | All debug messages from ep0.c except a few are printed by dbg_ep0() macro. So for remaining few exceptions use also dbg_ep0() instead of serial_printf(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Ensure that we set musb dynamic FIFO buffer for every endpointPali Rohár2021-03-031-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we do not set FIFO buffer address and size for some endpoint which is in use then default programmed address 0x0 would be used which is in conflict with address of FIFO buffer for endpoint 0. Moreover address of FIFO buffer for endpoint 0 cannot be programmed, it is fixed to 0x0. Sharing address space between more endpoints cause data loss and unexpected errors. This patch is fixing transmission of characters over usbtty serial console and allows using of usbtty for debugging purposes on Nokia N900. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Fix handling interrupts for EP0 and SET ADDRESS commmandPali Rohár2021-03-031-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt for EP0 is indicated in intrtx register via first bit. This bit is set for both RX and TX despite register has only TX in its name. First bit in intrrx register is reserved, not used and never set. So remove calling musb_peri_ep0() function at every iteration of udc_irq() and musb_peri_rx() and call it only from musb_peri_tx() when correct interrupt bit in initrtx it set. Address from SET ADDRESS command must be set to faddr register only after acknowledging SERV_RXPKTRDY followed by received EP0 interrupt. So prior calling musb_peri_ep0_set_address() check for EP0 interrupt instead of (incorrect) MUSB_INTR_SOF interrupt. This patch fixes issue that host (computer) cannot register U-Boot USB device and is failing with errors: usb 1-1: new full-speed USB device number 86 using xhci_hcd usb 1-1: Device not responding to setup address. usb 1-1: Device not responding to setup address. usb 1-1: device not accepting address 86, error -71 U-Boot was writing address to faddr register too early and did not wait for correct interrupt after which should update address. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Fix receiving of bigger buffersPali Rohár2021-03-031-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If musb_peri_rx_ep() was called to process received HW buffer but U-Boot cannot read it yet (e.g. because U-Boot SW buffer is full) then interrupt was marked as processed also when HW buffer stayed unprocessed. U-Boot tried to process this buffer again when it received interrupt again, but it can receive it only when sender (host) sends a new data. As sender (host) is not going to send a new data until U-Boot process current data this issue caused a deadlock in case sender (host) is emitting data faster than U-Boot can process it. Reading musb intrrx register automatically clears this register and marks interrupt as processed. So to prevent marking interrupt in U-Boot as processed, adds a new variable pending_intrrx which would contain unprocessed bits of intrrx register. For a second step, every time when musb_peri_rx_ep() is called and there are waiting data to be processed (signaled by MUSB_RXCSR_RXPKTRDY) either acknowledge sender (via musb_peri_rx_ack()) that whole HW buffer was processed or set corresponding bit in pending_intrrx that HW buffer was not fully processed yet and next iteration is required after U-Boot allocates space for reading HW buffer. This patch fixes receiving large usb buffers, e.g. file transfer via Kermit protocol implemented by 'loadb' U-Boot command over usbtty serial console. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Fix transmission of bigger buffersPali Rohár2021-03-031-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If udc_endpoint_write() was called with bigger payload which does not fit into one USB packet it is needed to transmit payload in more USB packets. First packet is transmitted by udc_endpoint_write() call itself and other packets are put into waiting queue. Implement function musb_peri_tx() which checks if endpoints are ready for transmit and continue transmission of waiting queue. This patch fixes sending big output from printenv command over usbtty serial console. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>>
| * | usb: musb: Read value of PERI_RXCSR to 16bit variablePali Rohár2021-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | PERI_RXCSR is 16bit register so store its value into 16bit local variable. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Fix configuring FIFO for endpointsPali Rohár2021-03-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes configuring FIFOs for one-directional endpoints which have only one queue (either RX or TX, but noth both). Size of FIFO buffer is 2^(idx+3) bytes and starting address is 2^(addr+3). Moreover first 64 bytes are reserved for EP0. Without this patch if FIFO size specified by caller was zero then idx was incorrectly calculated (expr. ffs(0)-1) and size overflowed in fifosz register. This register uses has only 4 bits for FIFO size. Moreover specifying zero buffer size is not possible (with idx=0 is minimal buffer size 8 bytes). So even for one-directional endpoints we need to correctly specify both (RX and TX) FIFO buffer sizes and its addresses. This patch is fixing calculation of start address and buffer size to minimal value and ensures that it would not overlap with buffer reserved for EP0. This issue caused loose of packets on USB bus in both directions and basically usbtty was unusable. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | usb: musb: Always clear the data toggle bit when configuring epPali Rohár2021-03-031-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch clearing was done only when U-Boot was compiled with MUSB Host Controller. But clearing of data toggle bit is needed also for MUSB Device Controller otherwise Device Controller does not work correctly. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
| * | serial: usbtty: Send urb data in correct orderPali Rohár2021-03-031-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function next_urb() selects the last urb data buffer from linked list to which next data from usbtty's puts function should be appended. But to check if TX data still exists it is needed to look at the first urb data buffer from linked list. So check for endpoint->tx_urb (first from the linked list) instead of current_urb (the last from the linked list). Successful call to udc_endpoint_write() may invalidate active urb and allocate new urb in queue which invalidates pointer returned by next_urb() function. So call next_urb() prior putting data into urb buffer and call it every time after using udc_endpoint_write() function to prevent sending data from usbtty's puts function in incorrect order. This patch fixes issue that usbtty code does not transmit data when they are waiting in the tx queue. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
generated by cgit (git 2.34.1) at 2024-09-22 02:30:55 +0000