diff options
Diffstat (limited to 'drivers')
52 files changed, 306 insertions, 228 deletions
diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 9d7d68c007..e2f229b15d 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -231,6 +231,18 @@ int host_get_dev_err(int devnum, struct blk_desc **blk_devp) } #ifdef CONFIG_BLK + +int sandbox_host_unbind(struct udevice *dev) +{ + struct host_block_dev *host_dev; + + /* Data validity is checked in host_dev_bind() */ + host_dev = dev_get_plat(dev); + os_close(host_dev->fd); + + return 0; +} + static const struct blk_ops sandbox_host_blk_ops = { .read = host_block_read, .write = host_block_write, @@ -240,6 +252,7 @@ U_BOOT_DRIVER(sandbox_host_blk) = { .name = "sandbox_host_blk", .id = UCLASS_BLK, .ops = &sandbox_host_blk_ops, + .unbind = sandbox_host_unbind, .plat_auto = sizeof(struct host_block_dev), }; #else diff --git a/drivers/button/button-adc.c b/drivers/button/button-adc.c index eed86564fb..fd896c76f9 100644 --- a/drivers/button/button-adc.c +++ b/drivers/button/button-adc.c @@ -55,7 +55,7 @@ static int button_adc_of_to_plat(struct udevice *dev) struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); struct button_adc_priv *priv = dev_get_priv(dev); struct ofnode_phandle_args args; - u32 treshold, up_treshold, t; + u32 threshold, up_threshold, t; ofnode node; int ret; @@ -73,12 +73,12 @@ static int button_adc_of_to_plat(struct udevice *dev) return ret; ret = ofnode_read_u32(dev_ofnode(dev->parent), - "keyup-threshold-microvolt", &up_treshold); + "keyup-threshold-microvolt", &up_threshold); if (ret) return ret; ret = ofnode_read_u32(dev_ofnode(dev), "press-threshold-microvolt", - &treshold); + &threshold); if (ret) return ret; @@ -87,13 +87,13 @@ static int button_adc_of_to_plat(struct udevice *dev) if (ret) return ret; - if (t > treshold) - up_treshold = t; + if (t > threshold) + up_threshold = t; } priv->channel = args.args[0]; - priv->min = treshold; - priv->max = up_treshold; + priv->min = threshold; + priv->max = up_threshold; return ret; } diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 848e33f4e8..0c0ef366a1 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -250,7 +250,7 @@ DECLARE_GLOBAL_DATA_PTR; enum stm32mp1_parent_id { /* * _HSI, _HSE, _CSI, _LSI, _LSE should not be moved - * they are used as index in osc[] as entry point + * they are used as index in osc_clk[] as clock reference */ _HSI, _HSE, @@ -430,8 +430,7 @@ struct stm32mp1_clk_data { struct stm32mp1_clk_priv { fdt_addr_t base; const struct stm32mp1_clk_data *data; - ulong osc[NB_OSC]; - struct udevice *osc_dev[NB_OSC]; + struct clk osc_clk[NB_OSC]; }; #define STM32MP1_CLK(off, b, idx, s) \ @@ -790,7 +789,7 @@ static ulong stm32mp1_clk_get_fixed(struct stm32mp1_clk_priv *priv, int idx) return 0; } - return priv->osc[idx]; + return clk_get_rate(&priv->osc_clk[idx]); } static int stm32mp1_clk_get_id(struct stm32mp1_clk_priv *priv, unsigned long id) @@ -1545,7 +1544,7 @@ static int stm32mp1_hsidiv(fdt_addr_t rcc, ulong hsifreq) break; if (hsidiv == 4) { - log_err("clk-hsi frequency invalid"); + log_err("hsi frequency invalid"); return -1; } @@ -1952,13 +1951,13 @@ static int stm32mp1_clktree(struct udevice *dev) * switch ON oscillator found in device-tree, * HSI already ON after bootrom */ - if (priv->osc[_LSI]) + if (clk_valid(&priv->osc_clk[_LSI])) stm32mp1_lsi_set(rcc, 1); - if (priv->osc[_LSE]) { + if (clk_valid(&priv->osc_clk[_LSE])) { int bypass, digbyp; u32 lsedrv; - struct udevice *dev = priv->osc_dev[_LSE]; + struct udevice *dev = priv->osc_clk[_LSE].dev; bypass = dev_read_bool(dev, "st,bypass"); digbyp = dev_read_bool(dev, "st,digbypass"); @@ -1969,9 +1968,9 @@ static int stm32mp1_clktree(struct udevice *dev) stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv); } - if (priv->osc[_HSE]) { + if (clk_valid(&priv->osc_clk[_HSE])) { int bypass, digbyp, css; - struct udevice *dev = priv->osc_dev[_HSE]; + struct udevice *dev = priv->osc_clk[_HSE].dev; bypass = dev_read_bool(dev, "st,bypass"); digbyp = dev_read_bool(dev, "st,digbypass"); @@ -1996,8 +1995,8 @@ static int stm32mp1_clktree(struct udevice *dev) /* configure HSIDIV */ dev_dbg(dev, "configure HSIDIV\n"); - if (priv->osc[_HSI]) { - stm32mp1_hsidiv(rcc, priv->osc[_HSI]); + if (clk_valid(&priv->osc_clk[_HSI])) { + stm32mp1_hsidiv(rcc, clk_get_rate(&priv->osc_clk[_HSI])); stgen_config(priv); } @@ -2043,7 +2042,7 @@ static int stm32mp1_clktree(struct udevice *dev) } /* wait LSE ready before to use it */ - if (priv->osc[_LSE]) + if (clk_valid(&priv->osc_clk[_LSE])) stm32mp1_lse_wait(rcc); /* configure with expected clock source */ @@ -2082,7 +2081,7 @@ static int stm32mp1_clktree(struct udevice *dev) dev_dbg(dev, "oscillator off\n"); /* switch OFF HSI if not found in device-tree */ - if (!priv->osc[_HSI]) + if (!clk_valid(&priv->osc_clk[_HSI])) stm32mp1_hsi_set(rcc, 0); /* Software Self-Refresh mode (SSR) during DDR initilialization */ @@ -2178,40 +2177,25 @@ static ulong stm32mp1_clk_set_rate(struct clk *clk, unsigned long clk_rate) return -EINVAL; } -static void stm32mp1_osc_clk_init(const char *name, - struct stm32mp1_clk_priv *priv, - int index) -{ - struct clk clk; - struct udevice *dev = NULL; - - priv->osc[index] = 0; - clk.id = 0; - if (!uclass_get_device_by_name(UCLASS_CLK, name, &dev)) { - if (clk_request(dev, &clk)) - log_err("%s request", name); - else - priv->osc[index] = clk_get_rate(&clk); - } - priv->osc_dev[index] = dev; -} - static void stm32mp1_osc_init(struct udevice *dev) { struct stm32mp1_clk_priv *priv = dev_get_priv(dev); int i; const char *name[NB_OSC] = { - [_LSI] = "clk-lsi", - [_LSE] = "clk-lse", - [_HSI] = "clk-hsi", - [_HSE] = "clk-hse", - [_CSI] = "clk-csi", + [_LSI] = "lsi", + [_LSE] = "lse", + [_HSI] = "hsi", + [_HSE] = "hse", + [_CSI] = "csi", [_I2S_CKIN] = "i2s_ckin", }; for (i = 0; i < NB_OSC; i++) { - stm32mp1_osc_clk_init(name[i], priv, i); - dev_dbg(dev, "%d: %s => %x\n", i, name[i], (u32)priv->osc[i]); + if (clk_get_by_name(dev, name[i], &priv->osc_clk[i])) + dev_dbg(dev, "No source clock \"%s\"", name[i]); + else + dev_dbg(dev, "%s clock rate: %luHz\n", + name[i], clk_get_rate(&priv->osc_clk[i])); } } diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 00554af499..1eccac28c6 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -329,15 +329,6 @@ config ACPIGEN things like generating device-specific tables and returning the ACPI name of a device. -config INTEL_ACPIGEN - bool "Support ACPI table generation for Intel SoCs" - depends on ACPIGEN - help - This option adds some functions used for programatic generation of - ACPI tables on Intel SoCs. This provides features for writing CPU - information such as P states and T stages. Also included is a way - to create a GNVS table and set it up. - config BOUNCE_BUFFER bool "Include bounce buffer API" help diff --git a/drivers/core/device.c b/drivers/core/device.c index d1098a3861..81f6880eac 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -137,9 +137,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv, if (parent) { size = parent->driver->per_child_plat_auto; - if (!size) { + if (!size) size = parent->uclass->uc_drv->per_child_plat_auto; - } if (size) { dev_or_flags(dev, DM_FLAG_ALLOC_PARENT_PDATA); ptr = calloc(1, size); @@ -209,14 +208,18 @@ fail_uclass_bind: } } fail_alloc3: - if (dev_get_flags(dev) & DM_FLAG_ALLOC_UCLASS_PDATA) { - free(dev_get_uclass_plat(dev)); - dev_set_uclass_plat(dev, NULL); + if (CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)) { + if (dev_get_flags(dev) & DM_FLAG_ALLOC_UCLASS_PDATA) { + free(dev_get_uclass_plat(dev)); + dev_set_uclass_plat(dev, NULL); + } } fail_alloc2: - if (dev_get_flags(dev) & DM_FLAG_ALLOC_PDATA) { - free(dev_get_plat(dev)); - dev_set_plat(dev, NULL); + if (CONFIG_IS_ENABLED(DM_DEVICE_REMOVE)) { + if (dev_get_flags(dev) & DM_FLAG_ALLOC_PDATA) { + free(dev_get_plat(dev)); + dev_set_plat(dev, NULL); + } } fail_alloc1: devres_release_all(dev); diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 8f590dc5f6..4660d20def 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,8 +1,8 @@ config SPL_ALTERA_SDRAM bool "SoCFPGA DDR SDRAM driver in SPL" depends on SPL - depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX - select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX - select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX + depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_SOC64 + select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64 + select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64 help Enable DDR SDRAM controller for the SoCFPGA devices. diff --git a/drivers/ddr/marvell/a38x/ddr3_debug.c b/drivers/ddr/marvell/a38x/ddr3_debug.c index 22e0cc4d91..f5fc964d6f 100644 --- a/drivers/ddr/marvell/a38x/ddr3_debug.c +++ b/drivers/ddr/marvell/a38x/ddr3_debug.c @@ -6,7 +6,6 @@ #include "ddr3_init.h" #include "mv_ddr_training_db.h" #include "mv_ddr_regs.h" -#include <log.h> u8 is_reg_dump = 0; u8 debug_pbs = DEBUG_LEVEL_ERROR; diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c index 7488770268..f878b4512b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_init.c +++ b/drivers/ddr/marvell/a38x/ddr3_init.c @@ -77,9 +77,6 @@ int ddr3_init(void) return status; } -#if defined(CONFIG_PHY_STATIC_PRINT) - mv_ddr_phy_static_print(); -#endif /* Post MC/PHY initializations */ mv_ddr_post_training_soc_config(ddr_type); diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c index 2b3af23202..2512b58cb7 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training.c +++ b/drivers/ddr/marvell/a38x/ddr3_training.c @@ -7,8 +7,6 @@ #include "mv_ddr_common.h" #include "mv_ddr_training_db.h" #include "mv_ddr_regs.h" -#include <log.h> -#include <linux/delay.h> #define GET_CS_FROM_MASK(mask) (cs_mask2_num[mask]) #define CS_CBE_VALUE(cs_num) (cs_cbe_reg[cs_num]) @@ -207,7 +205,6 @@ static int ddr3_tip_pad_inv(void) if (tm->interface_params[0].as_bus_params[sphy]. is_ck_swap == 1 && sphy == 0) { /* TODO: move this code to per platform one */ -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) /* clock swap for both cs0 and cs1 */ data = (INVERT_PAD << INV_PAD2_OFFS | INVERT_PAD << INV_PAD6_OFFS | @@ -219,9 +216,6 @@ static int ddr3_tip_pad_inv(void) DDR_PHY_CONTROL, PHY_CTRL_PHY_REG, data, data); -#else /* !CONFIG_ARMADA_38X && !CONFIG_ARMADA_39X */ -#pragma message "unknown platform to configure ddr clock swap" -#endif } } @@ -2014,9 +2008,7 @@ int ddr3_tip_adll_regs_bypass(u32 dev_num, u32 reg_val1, u32 reg_val2) static int ddr3_tip_ddr3_training_main_flow(u32 dev_num) { /* TODO: enable this functionality for other platforms */ -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) struct init_cntr_param init_cntr_prm; -#endif int ret = MV_OK; int adll_bypass_flag = 0; u32 if_id; @@ -2050,7 +2042,6 @@ static int ddr3_tip_ddr3_training_main_flow(u32 dev_num) } /* TODO: enable this functionality for other platforms */ -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) if (is_adll_calib_before_init != 0) { DEBUG_TRAINING_IP(DEBUG_LEVEL_INFO, ("with adll calib before init\n")); @@ -2081,7 +2072,6 @@ static int ddr3_tip_ddr3_training_main_flow(u32 dev_num) return MV_FAIL; } } -#endif ret = adll_calibration(dev_num, ACCESS_TYPE_MULTICAST, 0, freq); if (ret != MV_OK) { @@ -2905,3 +2895,4 @@ unsigned int mv_ddr_misl_phy_odt_n_get(void) return odt_n; } + diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c index 5fd9a052fa..102f9bd633 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c @@ -6,8 +6,6 @@ #include "ddr3_init.h" #include "mv_ddr_regs.h" #include "ddr_training_ip_db.h" -#include <image.h> -#include <linux/delay.h> #define PATTERN_1 0x55555555 #define PATTERN_2 0xaaaaaaaa @@ -614,9 +612,9 @@ int ddr3_tip_load_pattern_to_odpg(u32 dev_num, enum hws_access_type access_type, MASK_ALL_BITS)); } - CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, - ODPG_DATA_BUFFER_OFFS_REG, - load_addr, MASK_ALL_BITS)); + CHECK_STATUS(ddr3_tip_if_write + (dev_num, access_type, if_id, + ODPG_DATA_BUFFER_OFFS_REG, load_addr, MASK_ALL_BITS)); return MV_OK; } diff --git a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c index dadb06b318..6523281f2b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c @@ -7,7 +7,6 @@ #include "mv_ddr_training_db.h" #include "ddr_training_ip_db.h" #include "mv_ddr_regs.h" -#include <linux/delay.h> #define WL_ITERATION_NUM 10 @@ -916,10 +915,8 @@ int ddr3_tip_dynamic_write_leveling(u32 dev_num, int phase_remove) DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n")); } else { /* check for training pass */ reg_data = data_read[0]; -#if defined(CONFIG_ARMADA_38X) /* JIRA #1498 for 16 bit with ECC */ if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */ reg_data = 0; -#endif if (reg_data != PASS) DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n")); diff --git a/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h b/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h index ac9250f74e..7357311965 100644 --- a/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h +++ b/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h @@ -13,9 +13,7 @@ #include <asm/arch/cpu.h> #include <asm/arch/soc.h> -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) #define INTER_REGS_BASE SOC_REGS_PHY_BASE -#endif /* * MV_DEBUG_INIT need to be defines, otherwise the output of the diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c b/drivers/ddr/marvell/a38x/mv_ddr_plat.c index 0d1df189e8..faafc86ea2 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c +++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c @@ -8,7 +8,6 @@ #include "mv_ddr_training_db.h" #include "mv_ddr_regs.h" #include "mv_ddr_sys_env_lib.h" -#include <linux/delay.h> #define DDR_INTERFACES_NUM 1 #define DDR_INTERFACE_OCTETS_NUM 5 @@ -560,11 +559,7 @@ static int ddr3_tip_a38x_get_medium_freq(int dev_num, enum mv_ddr_freq *freq) static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr) { -#if defined(CONFIG_ARMADA_39X) - info_ptr->device_id = 0x6900; -#else info_ptr->device_id = 0x6800; -#endif info_ptr->ck_delay = ck_delay; return MV_OK; @@ -667,11 +662,7 @@ static int mv_ddr_sw_db_init(u32 dev_num, u32 board_id) ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM); -#ifdef CONFIG_ARMADA_39X - ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 1); -#else ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0); -#endif ca_delay = 0; delay_enable = 1; diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.h b/drivers/ddr/marvell/a38x/mv_ddr_plat.h index 281d4c2301..44998847c2 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_plat.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.h @@ -6,6 +6,8 @@ #ifndef _MV_DDR_PLAT_H #define _MV_DDR_PLAT_H +#include <linux/delay.h> + #define MAX_DEVICE_NUM 1 #define MAX_INTERFACE_NUM 1 #define MAX_BUS_NUM 5 diff --git a/drivers/ddr/marvell/a38x/mv_ddr_spd.h b/drivers/ddr/marvell/a38x/mv_ddr_spd.h index b4bfef3103..6043f11b28 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_spd.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_spd.h @@ -40,7 +40,10 @@ */ union mv_ddr_spd_data { unsigned char all_bytes[MV_DDR_SPD_DATA_BLOCK0_SIZE + - MV_DDR_SPD_DATA_BLOCK1M_SIZE]; + MV_DDR_SPD_DATA_BLOCK1M_SIZE + + MV_DDR_SPD_DATA_BLOCK1H_SIZE + + MV_DDR_SPD_DATA_BLOCK2E_SIZE + + MV_DDR_SPD_DATA_BLOCK2M_SIZE]; struct { /* block 0 */ union { /* num of bytes used/num of bytes in spd device/crc coverage */ @@ -271,6 +274,9 @@ union mv_ddr_spd_data { } bit_fields; } byte_131; unsigned char bytes_132_191[60]; /* reserved; all 0s */ + unsigned char bytes_192_255[MV_DDR_SPD_DATA_BLOCK1H_SIZE]; + unsigned char bytes_256_319[MV_DDR_SPD_DATA_BLOCK2E_SIZE]; + unsigned char bytes_320_383[MV_DDR_SPD_DATA_BLOCK2M_SIZE]; } byte_fields; }; diff --git a/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h b/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h index dc6977c334..10b0d45b35 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h @@ -78,22 +78,7 @@ enum suspend_wakeup_status { * set '-2' * If suspend to RAM is not supported set '-1' */ -#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT -#ifdef CONFIG_ARMADA_38X -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A38X_CUSTOMER_BOARD_ID0, -1 }, \ - {A38X_CUSTOMER_BOARD_ID0, -1 }, \ -}; -#else -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A39X_CUSTOMER_BOARD_ID0, -1 }, \ - {A39X_CUSTOMER_BOARD_ID0, -1 }, \ -}; -#endif /* CONFIG_ARMADA_38X */ - -#else -#ifdef CONFIG_ARMADA_38X #define MV_BOARD_WAKEUP_GPIO_INFO { \ {RD_NAS_68XX_ID, -2 }, \ {DB_68XX_ID, -1 }, \ @@ -103,13 +88,6 @@ enum suspend_wakeup_status { {DB_BP_6821_ID, -2 }, \ {DB_AMC_6820_ID, -2 }, \ }; -#else -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A39X_RD_69XX_ID, -1 }, \ - {A39X_DB_69XX_ID, -1 }, \ -}; -#endif /* CONFIG_ARMADA_38X */ -#endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */ enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void); u32 mv_ddr_sys_env_get_cs_ena_from_reg(void); diff --git a/drivers/ddr/marvell/a38x/xor.c b/drivers/ddr/marvell/a38x/xor.c index 98fb39eaf0..7bc6268293 100644 --- a/drivers/ddr/marvell/a38x/xor.c +++ b/drivers/ddr/marvell/a38x/xor.c @@ -347,10 +347,8 @@ void ddr3_new_tip_ecc_scrub(void) for (cs_c = 0; cs_c < max_cs; cs_c++) cs_ena |= 1 << cs_c; -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) /* all chip-selects are of same size */ ddr3_calc_mem_cs_size(0, &cs_mem_size_mb); -#endif cs_mem_size = cs_mem_size_mb * _1M; mv_sys_xor_init(max_cs, cs_ena, cs_mem_size, 0); total_mem_size = max_cs * cs_mem_size; diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c index b58c0fe01e..2a4596680b 100644 --- a/drivers/ddr/marvell/axp/ddr3_dfs.c +++ b/drivers/ddr/marvell/axp/ddr3_dfs.c @@ -42,8 +42,8 @@ extern u8 div_ratio[CLK_VCO][CLK_DDR]; extern void get_target_freq(u32 freq_mode, u32 *ddr_freq, u32 *hclk_ps); #else extern u16 odt_dynamic[ODT_OPT][MAX_CS]; -extern u8 div_ratio1to1[CLK_CPU][CLK_DDR]; -extern u8 div_ratio2to1[CLK_CPU][CLK_DDR]; +extern u8 div_ratio1to1[CLK_VCO][CLK_DDR]; +extern u8 div_ratio2to1[CLK_VCO][CLK_DDR]; #endif extern u16 odt_static[ODT_OPT][MAX_CS]; diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c index 3a266c6de4..0b150b20f3 100644 --- a/drivers/ddr/marvell/axp/ddr3_sdram.c +++ b/drivers/ddr/marvell/axp/ddr3_sdram.c @@ -21,7 +21,7 @@ extern u32 pbs_pattern_32b[2][LEN_PBS_PATTERN]; #if defined(MV88F78X60) extern u32 pbs_pattern_64b[2][LEN_PBS_PATTERN]; #endif -extern u32 pbs_dq_mapping[PUP_NUM_64BIT][DQ_NUM]; +extern u32 pbs_dq_mapping[PUP_NUM_64BIT + 1][DQ_NUM]; #if defined(MV88F78X60) || defined(MV88F672X) /* PBS locked dq (per pup) */ diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c index 17bfe6a7bf..76aea96682 100644 --- a/drivers/ddr/marvell/axp/xor.c +++ b/drivers/ddr/marvell/axp/xor.c @@ -152,8 +152,8 @@ static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl) return MV_OK; } -int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high, - u32 init_val_low) +int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size, + u32 init_val_high, u32 init_val_low) { u32 tmp; diff --git a/drivers/ddr/marvell/axp/xor.h b/drivers/ddr/marvell/axp/xor.h index 97d1056432..a7c6ae840c 100644 --- a/drivers/ddr/marvell/axp/xor.h +++ b/drivers/ddr/marvell/axp/xor.h @@ -64,7 +64,7 @@ int mv_xor_state_get(u32 chan); void mv_sys_xor_init(MV_DRAM_INFO *dram_info); void mv_sys_xor_finish(void); int mv_xor_transfer(u32 chan, int xor_type, u32 xor_chain_ptr); -int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high, - u32 init_val_low); +int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size, + u32 init_val_high, u32 init_val_low); #endif /* __XOR_H */ diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c index 3f4b04a4ae..ea35e7e09e 100644 --- a/drivers/firmware/scmi/mailbox_agent.c +++ b/drivers/firmware/scmi/mailbox_agent.c @@ -3,13 +3,15 @@ * Copyright (C) 2020 Linaro Limited. */ +#define LOG_CATEGORY UCLASS_SCMI_AGENT + #include <common.h> #include <dm.h> -#include <dm/device_compat.h> #include <errno.h> #include <mailbox.h> #include <scmi_agent.h> #include <scmi_agent-uclass.h> +#include <dm/device_compat.h> #include <dm/devres.h> #include <linux/compat.h> diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index 35de68c75d..97a5dace15 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -3,6 +3,8 @@ * Copyright (C) 2020, Linaro Limited */ +#define LOG_CATEGORY UCLASS_SCMI_AGENT + #include <common.h> #include <dm.h> #include <malloc.h> diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c index 1a6fafbf53..69239a198f 100644 --- a/drivers/firmware/scmi/sandbox-scmi_devices.c +++ b/drivers/firmware/scmi/sandbox-scmi_devices.c @@ -3,6 +3,8 @@ * Copyright (C) 2020, Linaro Limited */ +#define LOG_CATEGORY UCLASS_MISC + #include <common.h> #include <clk.h> #include <dm.h> diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index 516e690ac2..527163b5ce 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -3,13 +3,14 @@ * Copyright (C) 2020 Linaro Limited. */ +#define LOG_CATEGORY UCLASS_SCMI_AGENT + #include <common.h> #include <dm.h> -#include <dm/device_compat.h> #include <errno.h> #include <scmi_agent-uclass.h> #include <scmi_protocols.h> - +#include <dm/device_compat.h> #include <dm/device-internal.h> #include <linux/compat.h> diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c index 64d0929f69..f185891e8f 100644 --- a/drivers/firmware/scmi/smccc_agent.c +++ b/drivers/firmware/scmi/smccc_agent.c @@ -3,12 +3,15 @@ * Copyright (C) 2020 Linaro Limited. */ +#define LOG_CATEGORY UCLASS_SCMI_AGENT + #include <common.h> #include <dm.h> #include <errno.h> #include <scmi_agent.h> #include <scmi_agent-uclass.h> #include <dm/devres.h> +#include <dm/device_compat.h> #include <dm/device-internal.h> #include <linux/arm-smccc.h> #include <linux/compat.h> diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c index d25478796a..60b9d499b7 100644 --- a/drivers/firmware/scmi/smt.c +++ b/drivers/firmware/scmi/smt.c @@ -4,6 +4,8 @@ * Copyright (C) 2019-2020 Linaro Limited. */ +#define LOG_CATEGORY UCLASS_SCMI_AGENT + #include <common.h> #include <cpu_func.h> #include <dm.h> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 425b52a926..dc0b3dd31b 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -33,7 +33,7 @@ config FPGA_CYCLON2 config FPGA_INTEL_SDM_MAILBOX bool "Enable Intel FPGA Full Reconfiguration SDM Mailbox driver" - depends on TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX + depends on TARGET_SOCFPGA_SOC64 select FPGA_ALTERA help Say Y here to enable the Intel FPGA Full Reconfig SDM Mailbox driver diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c index c733603289..f7ffd8926a 100644 --- a/drivers/gpio/mpc8xxx_gpio.c +++ b/drivers/gpio/mpc8xxx_gpio.c @@ -20,7 +20,7 @@ struct mpc8xxx_gpio_data { /* The bank's register base in memory */ struct ccsr_gpio __iomem *base; /* The address of the registers; used to identify the bank */ - ulong addr; + phys_addr_t addr; /* The GPIO count of the bank */ uint gpio_count; /* The GPDAT register cannot be used to determine the value of output @@ -181,7 +181,7 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev) if (dev_read_bool(dev, "little-endian")) data->little_endian = true; - plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size); + plat->addr = dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size); plat->ngpios = dev_read_u32_default(dev, "ngpios", 32); return 0; @@ -220,7 +220,8 @@ static int mpc8xxx_gpio_probe(struct udevice *dev) mpc8xxx_gpio_plat_to_priv(dev); - snprintf(name, sizeof(name), "MPC@%lx_", data->addr); + snprintf(name, sizeof(name), "MPC@%.8llx", + (unsigned long long)data->addr); str = strdup(name); if (!str) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index e0e132698e..6a9403dc00 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -43,6 +43,12 @@ #include "mmc_private.h" #endif +#ifndef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE +#ifdef CONFIG_FSL_USDHC +#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 +#endif +#endif + DECLARE_GLOBAL_DATA_PTR; #define SDHCI_IRQ_EN_BITS (IRQSTATEN_CC | IRQSTATEN_TC | \ @@ -1706,6 +1712,7 @@ static struct esdhc_soc_data usdhc_imx8qm_data = { }; static const struct udevice_id fsl_esdhc_ids[] = { + { .compatible = "fsl,imx51-esdhc", }, { .compatible = "fsl,imx53-esdhc", }, { .compatible = "fsl,imx6ul-usdhc", }, { .compatible = "fsl,imx6sx-usdhc", }, diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c index 6e4f527e5d..11d86ad658 100644 --- a/drivers/mmc/iproc_sdhci.c +++ b/drivers/mmc/iproc_sdhci.c @@ -10,8 +10,11 @@ #include <malloc.h> #include <sdhci.h> #include <asm/global_data.h> +#include "mmc_private.h" #include <linux/delay.h> +#define MAX_TUNING_LOOP 40 + DECLARE_GLOBAL_DATA_PTR; struct sdhci_iproc_host { @@ -140,17 +143,89 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg) static int sdhci_iproc_set_ios_post(struct sdhci_host *host) { - u32 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + struct mmc *mmc = (struct mmc *)host->mmc; + u32 ctrl; + + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + ctrl |= SDHCI_CTRL_VDD_180; + sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); + } - /* Reset UHS mode bits */ - ctrl &= ~SDHCI_CTRL_UHS_MASK; + sdhci_set_uhs_timing(host); + return 0; +} - if (host->mmc->ddr_mode) - ctrl |= UHS_DDR50_BUS_SPEED; +static void sdhci_start_tuning(struct sdhci_host *host) +{ + u32 ctrl; + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + ctrl |= SDHCI_CTRL_EXEC_TUNING; sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); - return 0; + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); +} + +static void sdhci_end_tuning(struct sdhci_host *host) +{ + /* Enable only interrupts served by the SD controller */ + sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, + SDHCI_INT_ENABLE); + /* Mask all sdhci interrupt sources */ + sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE); +} + +static int sdhci_iproc_execute_tuning(struct mmc *mmc, u8 opcode) +{ + struct mmc_cmd cmd; + u32 ctrl; + u32 blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64); + struct sdhci_host *host = dev_get_priv(mmc->dev); + char tuning_loop_counter = MAX_TUNING_LOOP; + int ret = 0; + + sdhci_start_tuning(host); + + cmd.cmdidx = opcode; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + + if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200 && mmc->bus_width == 8) + blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 128); + + sdhci_writew(host, blocksize, SDHCI_BLOCK_SIZE); + sdhci_writew(host, 1, SDHCI_BLOCK_COUNT); + sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); + + do { + mmc_send_cmd(mmc, &cmd, NULL); + if (opcode == MMC_CMD_SEND_TUNING_BLOCK) + /* + * For tuning command, do not do busy loop. As tuning + * is happening (CLK-DATA latching for setup/hold time + * requirements), give time to complete + */ + udelay(1); + + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + + if (tuning_loop_counter-- == 0) + break; + + } while (ctrl & SDHCI_CTRL_EXEC_TUNING); + + if (tuning_loop_counter < 0 || (!(ctrl & SDHCI_CTRL_TUNED_CLK))) { + ctrl &= ~(SDHCI_CTRL_TUNED_CLK | SDHCI_CTRL_EXEC_TUNING); + sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL2); + printf("%s:Tuning failed, opcode = 0x%02x\n", __func__, opcode); + ret = -EIO; + } + + sdhci_end_tuning(host); + + return ret; } static struct sdhci_ops sdhci_platform_ops = { @@ -163,6 +238,7 @@ static struct sdhci_ops sdhci_platform_ops = { .write_b = sdhci_iproc_writeb, #endif .set_ios_post = sdhci_iproc_set_ios_post, + .platform_execute_tuning = sdhci_iproc_execute_tuning, }; struct iproc_sdhci_plat { @@ -190,9 +266,7 @@ static int iproc_sdhci_probe(struct udevice *dev) host->name = dev->name; host->ioaddr = dev_read_addr_ptr(dev); - host->voltages = MMC_VDD_165_195 | - MMC_VDD_32_33 | MMC_VDD_33_34; - host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B; + host->quirks = SDHCI_QUIRK_BROKEN_R1B; host->host_caps = MMC_MODE_DDR_52MHz; host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0); host->ops = &sdhci_platform_ops; diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 219efdc895..090834a495 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "nand: " fmt #include <common.h> +#include <watchdog.h> #ifndef __UBOOT__ #include <linux/compat.h> #include <linux/module.h> @@ -172,6 +173,7 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo) nanddev_offs_to_pos(nand, einfo->addr, &pos); nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last); while (nanddev_pos_cmp(&pos, &last) <= 0) { + WATCHDOG_RESET(); ret = nanddev_erase(nand, &pos); if (ret) { einfo->fail_addr = nanddev_pos_to_offs(nand, &pos); diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 68ef5d1af8..e5330958c7 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -22,6 +22,7 @@ #else #include <common.h> #include <errno.h> +#include <watchdog.h> #include <spi.h> #include <spi-mem.h> #include <dm/device_compat.h> @@ -578,6 +579,7 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, #endif nanddev_io_for_each_page(nand, from, ops, &iter) { + WATCHDOG_RESET(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; @@ -629,6 +631,7 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, #endif nanddev_io_for_each_page(nand, to, ops, &iter) { + WATCHDOG_RESET(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ef426dac02..e0efebc355 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -11,6 +11,7 @@ #include <common.h> #include <log.h> +#include <watchdog.h> #include <dm.h> #include <dm/device_compat.h> #include <dm/devres.h> @@ -566,6 +567,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) len = instr->len; while (len) { + WATCHDOG_RESET(); #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(nor, addr); if (ret < 0) @@ -1250,6 +1252,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, for (i = 0; i < len; ) { ssize_t written; loff_t addr = to + i; + WATCHDOG_RESET(); /* * If page_size is a power of two, the offset can be quickly diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index e72a60c131..fc3327ec53 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -32,6 +32,8 @@ DECLARE_GLOBAL_DATA_PTR; #include <asm/io.h> #include <asm/fsl_pci.h> +#define MAX_PCI_REGIONS 7 + #ifndef CONFIG_SYS_PCI_MEMORY_BUS #define CONFIG_SYS_PCI_MEMORY_BUS 0 #endif @@ -80,6 +82,9 @@ int fsl_setup_hose(struct pci_controller *hose, unsigned long addr) /* Reset hose to make sure its in a clean state */ memset(hose, 0, sizeof(struct pci_controller)); + hose->regions = (struct pci_region *) + calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region)); + pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); return fsl_is_pci_agent(hose); diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index b4e1b60240..3b9309f52c 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -105,6 +105,7 @@ #define LTSSM_SHIFT 24 #define LTSSM_MASK 0x3f #define LTSSM_L0 0x10 +#define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) /* PCIe core controller registers */ #define CTRL_CORE_BASE_ADDR 0x18000 @@ -529,6 +530,15 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) reg |= (IS_RC_MSK << IS_RC_SHIFT); advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + /* + * Replace incorrect PCI vendor id value 0x1b4b by correct value 0x11ab. + * VENDOR_ID_REG contains vendor id in low 16 bits and subsystem vendor + * id in high 16 bits. Updating this register changes readback value of + * read-only vendor id bits in PCIE_CORE_DEV_ID_REG register. Workaround + * for erratum 4.1: "The value of device and vendor ID is incorrect". + */ + advk_writel(pcie, 0x11ab11ab, VENDOR_ID_REG); + /* Set Advanced Error Capabilities and Control PF0 register */ reg = PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX | PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX_EN | diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index ab6ff45a51..574cb784a8 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -46,6 +46,7 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, return 0; } +#ifdef CONFIG_FSL_LAW static int mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem, struct pci_region *pre) @@ -68,6 +69,7 @@ mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem, return 0; } +#endif static int mpc85xx_pci_dm_probe(struct udevice *dev) { @@ -85,22 +87,24 @@ static int mpc85xx_pci_dm_probe(struct udevice *dev) return -EINVAL; } +#ifdef CONFIG_FSL_LAW mpc85xx_pci_dm_setup_laws(io, mem, pre); +#endif pcix = priv->cfg_addr; /* BAR 1: memory */ - out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff); - out_be32(&pcix->potear1, 0); - out_be32(&pcix->powbar1, (mem->phys_start >> 12) & 0x000fffff); - out_be32(&pcix->powbear1, 0); + out_be32(&pcix->potar1, mem->bus_start >> 12); + out_be32(&pcix->potear1, (u64)mem->bus_start >> 44); + out_be32(&pcix->powbar1, mem->phys_start >> 12); + out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44); out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ | POWAR_MEM_WRITE | (__ilog2(mem->size) - 1))); /* BAR 1: IO */ - out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff); - out_be32(&pcix->potear2, 0); - out_be32(&pcix->powbar2, (io->phys_start >> 12) & 0x000fffff); - out_be32(&pcix->powbear2, 0); + out_be32(&pcix->potar2, io->bus_start >> 12); + out_be32(&pcix->potear2, (u64)io->bus_start >> 44); + out_be32(&pcix->powbar2, io->phys_start >> 12); + out_be32(&pcix->powbear2, (u64)io->phys_start >> 44); out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ | POWAR_IO_WRITE | (__ilog2(io->size) - 1))); @@ -130,9 +134,8 @@ static int mpc85xx_pci_of_to_plat(struct udevice *dev) addr = devfdt_get_addr_index(dev, 0); if (addr == FDT_ADDR_T_NONE) return -EINVAL; - priv->cfg_addr = (void __iomem *)addr; - addr += 4; - priv->cfg_data = (void __iomem *)addr; + priv->cfg_addr = (void __iomem *)map_physmem(addr, 0, MAP_NOCACHE); + priv->cfg_data = (void __iomem *)((ulong)priv->cfg_addr + 4); return 0; } diff --git a/drivers/rng/iproc_rng200.c b/drivers/rng/iproc_rng200.c index 1126bbd797..85ac15bf9c 100644 --- a/drivers/rng/iproc_rng200.c +++ b/drivers/rng/iproc_rng200.c @@ -34,12 +34,12 @@ #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF struct iproc_rng200_plat { - fdt_addr_t base; + void __iomem *base; }; static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable) { - fdt_addr_t rng_base = pdata->base; + void __iomem *rng_base = pdata->base; u32 val; val = readl(rng_base + RNG_CTRL_OFFSET); @@ -54,7 +54,7 @@ static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable) static void iproc_rng200_restart(struct iproc_rng200_plat *pdata) { - fdt_addr_t rng_base = pdata->base; + void __iomem *rng_base = pdata->base; u32 val; iproc_rng200_enable(pdata, false); @@ -156,7 +156,7 @@ static int iproc_rng200_of_to_plat(struct udevice *dev) { struct iproc_rng200_plat *pdata = dev_get_plat(dev); - pdata->base = dev_read_addr(dev); + pdata->base = devfdt_map_physmem(dev, sizeof(void *)); if (!pdata->base) return -ENODEV; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index b9e99babeb..cc121eee27 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -483,7 +483,7 @@ static int ns16550_serial_getinfo(struct udevice *dev, return 0; } -static int ns16550_serial_assign_base(struct ns16550_plat *plat, ulong base) +static int ns16550_serial_assign_base(struct ns16550_plat *plat, fdt_addr_t base) { if (base == FDT_ADDR_T_NONE) return -EINVAL; @@ -564,6 +564,8 @@ int ns16550_serial_of_to_plat(struct udevice *dev) if (!plat->clock) plat->clock = dev_read_u32_default(dev, "clock-frequency", CONFIG_SYS_NS16550_CLK); + if (!plat->clock) + plat->clock = CONFIG_SYS_NS16550_CLK; if (!plat->clock) { debug("ns16550 clock not defined\n"); return -EINVAL; diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index f1c1a260da..4f4eb02de0 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -500,8 +500,8 @@ void usbtty_puts(struct stdio_dev *dev, const char *str) n = next_nl_pos (str); if (str[n] == '\n') { - __usbtty_puts("\r", 1); - __usbtty_puts(str, n + 1); + __usbtty_puts(str, n); + __usbtty_puts("\r\n", 2); str += (n + 1); len -= (n + 1); } else { @@ -849,17 +849,9 @@ static int write_buffer (circbuf_t * buf) &endpoint_instance[tx_endpoint]; struct urb *current_urb = NULL; - current_urb = next_urb (device_instance, endpoint); - - if (!current_urb) { - TTYERR ("current_urb is NULL, buf->size %d\n", - buf->size); - return 0; - } - /* TX data still exists - send it now */ - if(endpoint->sent < current_urb->actual_length){ + if(endpoint->sent < endpoint->tx_urb->actual_length){ if(udc_endpoint_write (endpoint)){ /* Write pre-empted by RX */ return -1; @@ -878,6 +870,8 @@ static int write_buffer (circbuf_t * buf) */ while (buf->size > 0) { + current_urb = next_urb (device_instance, endpoint); + dest = (char*)current_urb->buffer + current_urb->actual_length; diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 75e5e840ed..4acc9047b9 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -16,6 +16,7 @@ #include <reset.h> #include <spi.h> #include <spi-mem.h> +#include <watchdog.h> #include <dm/device_compat.h> #include <linux/bitops.h> #include <linux/delay.h> @@ -171,6 +172,7 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv, static void _stm32_qspi_read_fifo(u8 *val, void __iomem *addr) { *val = readb(addr); + WATCHDOG_RESET(); } static void _stm32_qspi_write_fifo(u8 *val, void __iomem *addr) diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index 0e5c7c9971..ac77ffbc8b 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -33,6 +33,12 @@ config TPL_SYSRESET if SYSRESET +config SYSRESET_CMD_RESET + bool "sysreset implementation of the reset command" + default y + help + Enable sysreset implementation of the reset command. + if CMD_POWEROFF config SYSRESET_CMD_POWEROFF @@ -88,7 +94,7 @@ config SYSRESET_SOCFPGA config SYSRESET_SOCFPGA_SOC64 bool "Enable support for Intel SOCFPGA SoC64 family (Stratix10/Agilex)" - depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX) + depends on ARCH_SOCFPGA && TARGET_SOCFPGA_SOC64 help This enables the system reset driver support for Intel SOCFPGA SoC64 SoCs. diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index 2503b257a7..9512f6881f 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -119,6 +119,7 @@ void reset_cpu(void) } +#if IS_ENABLED(CONFIG_SYSRESET_CMD_RESET) int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { printf("resetting ...\n"); @@ -128,6 +129,7 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } +#endif #if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/drivers/thermal/imx_tmu.c b/drivers/thermal/imx_tmu.c index 02cefecd0d..07766baf45 100644 --- a/drivers/thermal/imx_tmu.c +++ b/drivers/thermal/imx_tmu.c @@ -344,6 +344,7 @@ static int imx_tmu_bind(struct udevice *dev) ofnode node, offset; const char *name; const void *prop; + int minc, maxc; debug("%s dev name %s\n", __func__, dev->name); @@ -352,6 +353,10 @@ static int imx_tmu_bind(struct udevice *dev) return 0; pdata->zone_node = 1; + /* default alert/crit temps based on temp grade */ + get_cpu_temp_grade(&minc, &maxc); + pdata->critical = maxc * 1000; + pdata->alert = (maxc - 10) * 1000; node = ofnode_path("/thermal-zones"); ofnode_for_each_subnode(offset, node) { @@ -443,6 +448,7 @@ static int imx_tmu_probe(struct udevice *dev) if (pdata->zone_node) { imx_tmu_init(dev); imx_tmu_calibration(dev); + imx_tmu_enable_msite(dev); } else { imx_tmu_enable_msite(dev); } diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 6e291198ab..f6975730bf 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -95,6 +95,7 @@ config USB_STORAGE config USB_KEYBOARD bool "USB Keyboard support" + select DM_KEYBOARD if DM_USB select SYS_STDIO_DEREGISTER ---help--- Say Y here if you want to use a USB keyboard for U-Boot command line diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c index 457679f0a4..6624f61b76 100644 --- a/drivers/usb/gadget/ep0.c +++ b/drivers/usb/gadget/ep0.c @@ -294,7 +294,7 @@ static int ep0_get_descriptor (struct usb_device_instance *device, { struct usb_string_descriptor *string_descriptor; if (!(string_descriptor = usbd_get_string (index))) { - serial_printf("Invalid string index %d\n", index); + dbg_ep0(0, "Invalid string index %d\n", index); return -1; } dbg_ep0(3, "string_descriptor: %p length %d", string_descriptor, string_descriptor->bLength); @@ -302,14 +302,14 @@ static int ep0_get_descriptor (struct usb_device_instance *device, } break; case USB_DESCRIPTOR_TYPE_INTERFACE: - serial_printf("USB_DESCRIPTOR_TYPE_INTERFACE - error not implemented\n"); + dbg_ep0(2, "USB_DESCRIPTOR_TYPE_INTERFACE - error not implemented\n"); return -1; case USB_DESCRIPTOR_TYPE_ENDPOINT: - serial_printf("USB_DESCRIPTOR_TYPE_ENDPOINT - error not implemented\n"); + dbg_ep0(2, "USB_DESCRIPTOR_TYPE_ENDPOINT - error not implemented\n"); return -1; case USB_DESCRIPTOR_TYPE_HID: { - serial_printf("USB_DESCRIPTOR_TYPE_HID - error not implemented\n"); + dbg_ep0(2, "USB_DESCRIPTOR_TYPE_HID - error not implemented\n"); return -1; /* unsupported at this time */ #if 0 int bNumInterface = @@ -338,7 +338,7 @@ static int ep0_get_descriptor (struct usb_device_instance *device, break; case USB_DESCRIPTOR_TYPE_REPORT: { - serial_printf("USB_DESCRIPTOR_TYPE_REPORT - error not implemented\n"); + dbg_ep0(2, "USB_DESCRIPTOR_TYPE_REPORT - error not implemented\n"); return -1; /* unsupported at this time */ #if 0 int bNumInterface = @@ -531,7 +531,7 @@ int ep0_recv_setup (struct urb *urb) le16_to_cpu (request->wValue) & 0xff); case USB_REQ_GET_CONFIGURATION: - serial_printf("get config %d\n", device->configuration); + dbg_ep0(2, "get config %d\n", device->configuration); return ep0_get_one (device, urb, device->configuration); @@ -621,14 +621,14 @@ int ep0_recv_setup (struct urb *urb) device->interface = device->alternate = 0; /*dbg_ep0(2, "set configuration: %d", device->configuration); */ - /*serial_printf("DEVICE_CONFIGURED.. event?\n"); */ + /*dbg_ep0(2, "DEVICE_CONFIGURED.. event?\n"); */ return 0; case USB_REQ_SET_INTERFACE: device->interface = le16_to_cpu (request->wIndex); device->alternate = le16_to_cpu (request->wValue); /*dbg_ep0(2, "set interface: %d alternate: %d", device->interface, device->alternate); */ - serial_printf("DEVICE_SET_INTERFACE.. event?\n"); + dbg_ep0(2, "DEVICE_SET_INTERFACE.. event?\n"); return 0; case USB_REQ_GET_STATUS: diff --git a/drivers/usb/mtu3/mtu3_qmu.c b/drivers/usb/mtu3/mtu3_qmu.c index 801c2bc416..95eaf6d236 100644 --- a/drivers/usb/mtu3/mtu3_qmu.c +++ b/drivers/usb/mtu3/mtu3_qmu.c @@ -198,6 +198,7 @@ static int mtu3_prepare_tx_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq) enq->flag &= ~GPD_FLAGS_HWO; gpd->next_gpd = cpu_to_le32((u32)gpd_virt_to_dma(ring, enq)); + mtu3_flush_cache((uintptr_t)enq, sizeof(*gpd)); if (req->zero) gpd->ext_flag |= GPD_EXT_FLAG_ZLP; @@ -234,6 +235,8 @@ static int mtu3_prepare_rx_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq) enq->flag &= ~GPD_FLAGS_HWO; gpd->next_gpd = cpu_to_le32((u32)gpd_virt_to_dma(ring, enq)); + mtu3_flush_cache((uintptr_t)enq, sizeof(*gpd)); + gpd->flag |= GPD_FLAGS_IOC | GPD_FLAGS_HWO; mreq->gpd = gpd; diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 147b2eb929..9651f074a4 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -50,7 +50,7 @@ void musb_start(void) # define config_fifo(dir, idx, addr) \ do { \ writeb(idx, &musbr->dir##fifosz); \ - writew(fifoaddr >> 3, &musbr->dir##fifoadd); \ + writew(addr, &musbr->dir##fifoadd); \ } while (0) #endif @@ -66,14 +66,14 @@ void musb_start(void) void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt) { u16 csr; - u16 fifoaddr = 64; /* First 64 bytes of FIFO reserved for EP0 */ + u16 fifoaddr = 64 >> 3; /* First 64 bytes of FIFO reserved for EP0 */ u32 fifosize; u8 idx; while (cnt--) { /* prepare fifosize to write to register */ fifosize = epinfo->epsize >> 3; - idx = ffs(fifosize) - 1; + idx = fifosize ? ((ffs(fifosize) - 1) & 0xF) : 0; writeb(epinfo->epnum, &musbr->index); if (epinfo->epdir) { @@ -81,10 +81,8 @@ void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt) config_fifo(tx, idx, fifoaddr); csr = readw(&musbr->txcsr); -#if defined(CONFIG_USB_MUSB_HCD) /* clear the data toggle bit */ writew(csr | MUSB_TXCSR_CLRDATATOG, &musbr->txcsr); -#endif /* Flush fifo if required */ if (csr & MUSB_TXCSR_TXPKTRDY) writew(csr | MUSB_TXCSR_FLUSHFIFO, @@ -94,16 +92,14 @@ void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt) config_fifo(rx, idx, fifoaddr); csr = readw(&musbr->rxcsr); -#if defined(CONFIG_USB_MUSB_HCD) /* clear the data toggle bit */ writew(csr | MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr); -#endif /* Flush fifo if required */ if (csr & MUSB_RXCSR_RXPKTRDY) writew(csr | MUSB_RXCSR_FLUSHFIFO, &musbr->rxcsr); } - fifoaddr += epinfo->epsize; + fifoaddr += 1 << idx; epinfo++; } } diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c index d901f8777c..b9510e3045 100644 --- a/drivers/usb/musb/musb_udc.c +++ b/drivers/usb/musb/musb_udc.c @@ -104,6 +104,8 @@ struct usb_endpoint_instance *ep0_endpoint; static struct usb_device_instance *udc_device; static int enabled; +static u16 pending_intrrx; + #ifdef MUSB_DEBUG static void musb_db_regs(void) { @@ -629,7 +631,7 @@ static void musb_peri_ep0(void) static void musb_peri_rx_ep(unsigned int ep) { u16 peri_rxcount; - u8 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr); + u16 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr); if (!(peri_rxcsr & MUSB_RXCSR_RXPKTRDY)) { if (debug_level > 0) @@ -664,7 +666,10 @@ static void musb_peri_rx_ep(unsigned int ep) /* The common musb fifo reader */ read_fifo(ep, length, data); - musb_peri_rx_ack(ep); + if (length == peri_rxcount) + musb_peri_rx_ack(ep); + else + pending_intrrx |= (1 << ep); /* * urb's actual_length is updated in @@ -677,18 +682,24 @@ static void musb_peri_rx_ep(unsigned int ep) serial_printf("ERROR : %s %d no space " "in rcv buffer\n", __PRETTY_FUNCTION__, ep); + + pending_intrrx |= (1 << ep); } } else { if (debug_level > 0) serial_printf("ERROR : %s %d problem with " "endpoint\n", __PRETTY_FUNCTION__, ep); + + pending_intrrx |= (1 << ep); } } else { if (debug_level > 0) serial_printf("ERROR : %s %d with nothing to do\n", __PRETTY_FUNCTION__, ep); + + musb_peri_rx_ack(ep); } } @@ -696,9 +707,7 @@ static void musb_peri_rx(u16 intr) { unsigned int ep; - /* Check for EP0 */ - if (0x01 & intr) - musb_peri_ep0(); + /* First bit is reserved and does not indicate interrupt for EP0 */ for (ep = 1; ep < 16; ep++) { if ((1 << ep) & intr) @@ -708,21 +717,16 @@ static void musb_peri_rx(u16 intr) static void musb_peri_tx(u16 intr) { - /* Check for EP0 */ + unsigned int ep; + + /* Check for EP0: first bit indicates interrupt for both RX and TX */ if (0x01 & intr) - musb_peri_ep0_tx(); + musb_peri_ep0(); - /* - * Use this in the future when handling epN tx - * - * u8 ep; - * - * for (ep = 1; ep < 16; ep++) { - * if ((1 << ep) & intr) { - * / * handle tx for this endpoint * / - * } - * } - */ + for (ep = 1; ep < 16; ep++) { + if ((1 << ep) & intr) + udc_endpoint_write(GET_ENDPOINT(udc_device, ep)); + } } void udc_irq(void) @@ -744,8 +748,6 @@ void udc_irq(void) musb_peri_resume(); } - musb_peri_ep0(); - if (MUSB_INTR_RESET & intrusb) { usbd_device_event_irq(udc_device, DEVICE_RESET, 0); musb_peri_reset(); @@ -775,13 +777,16 @@ void udc_irq(void) intrrx = readw(&musbr->intrrx); intrtx = readw(&musbr->intrtx); + intrrx |= pending_intrrx; + pending_intrrx = 0; + if (intrrx) musb_peri_rx(intrrx); if (intrtx) musb_peri_tx(intrtx); } else { - if (MUSB_INTR_SOF & intrusb) { + if (readw(&musbr->intrtx) & 0x1) { u8 faddr; faddr = readb(&musbr->faddr); /* @@ -870,18 +875,8 @@ void udc_setup_ep(struct usb_device_instance *device, unsigned int id, ep0_endpoint->endpoint_address = 0xff; ep0_urb = usbd_alloc_urb(device, endpoint); } else if (MAX_ENDPOINT >= id) { - int ep_addr; - - /* Check the direction */ - ep_addr = endpoint->endpoint_address; - if (USB_DIR_IN == (ep_addr & USB_ENDPOINT_DIR_MASK)) { - /* IN */ - epinfo[(id * 2) + 1].epsize = endpoint->tx_packetSize; - } else { - /* OUT */ - epinfo[id * 2].epsize = endpoint->rcv_packetSize; - } - + epinfo[(id * 2) + 0].epsize = endpoint->rcv_packetSize; + epinfo[(id * 2) + 1].epsize = endpoint->tx_packetSize; musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo)); } else { if (debug_level > 0) diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c index 4dde648814..9ae09eec12 100644 --- a/drivers/video/dw_mipi_dsi.c +++ b/drivers/video/dw_mipi_dsi.c @@ -721,15 +721,15 @@ static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi) ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, val & PHY_LOCK, PHY_STATUS_TIMEOUT_US); if (ret) - dev_warn(dsi->dsi_host.dev, - "failed to wait phy lock state\n"); + dev_dbg(dsi->dsi_host.dev, + "failed to wait phy lock state\n"); ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, val & PHY_STOP_STATE_CLK_LANE, PHY_STATUS_TIMEOUT_US); if (ret) - dev_warn(dsi->dsi_host.dev, - "failed to wait phy clk lane stop state\n"); + dev_dbg(dsi->dsi_host.dev, + "failed to wait phy clk lane stop state\n"); } static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi) @@ -797,6 +797,7 @@ static int dw_mipi_dsi_init(struct udevice *dev, dsi->phy_ops = phy_ops; dsi->max_data_lanes = max_data_lanes; dsi->device = device; + dsi->dsi_host.dev = (struct device *)dev; dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; device->host = &dsi->dsi_host; diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c index 8891ca4b78..4027e978c8 100644 --- a/drivers/video/stm32/stm32_dsi.c +++ b/drivers/video/stm32/stm32_dsi.c @@ -483,6 +483,9 @@ static int stm32_dsi_probe(struct udevice *dev) if (priv->hw_version != HWVER_130 && priv->hw_version != HWVER_131) { dev_err(dev, "DSI version 0x%x not supported\n", priv->hw_version); + dev_dbg(dev, "remove and unbind all DSI child\n"); + device_chld_remove(dev, NULL, DM_REMOVE_NORMAL); + device_chld_unbind(dev, NULL); ret = -ENODEV; goto err_clk; } diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig index e800720657..1835607083 100644 --- a/drivers/virtio/Kconfig +++ b/drivers/virtio/Kconfig @@ -55,6 +55,7 @@ config VIRTIO_NET config VIRTIO_BLK bool "virtio block driver" depends on VIRTIO + depends on BLK help This is the virtual block driver for virtio. It can be used with QEMU based targets. |