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* x86: remove dead code in intel_clk_get_rate()Heinrich Schuchardt2020-03-051-4/+0
* versal: drivers: clk: Fix invalid clock name queriesRajan Vaja2020-02-281-0/+6
* Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians...Tom Rini2020-02-141-4/+5
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| * clk: stm32mp1: solve type issue in stm32mp1_lse_enable and stm32mp1_clktreePatrick Delaunay2020-02-131-4/+5
* | CLK: HSDK: fix HDMI clock calculationEugeniy Paltsev2020-02-121-10/+21
* | CLK: HSDK: Check for PLL bypass firstlyEugeniy Paltsev2020-02-121-4/+4
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* Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dmTom Rini2020-02-1147-6/+79
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| * dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-0530-0/+34
| * dm: core: Require users of devres to include the headerSimon Glass2020-02-0527-1/+40
| * clk: Rename free() to rfree()Simon Glass2020-02-054-5/+5
* | x86: Add a clock driver for Intel devicesSimon Glass2020-02-074-0/+58
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* arm: rockchip: Add common cru.hJagan Teki2020-01-302-39/+39
* clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()Giulio Benetti2020-01-261-2/+8
* clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()Giulio Benetti2020-01-261-0/+3
* clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()Giulio Benetti2020-01-261-2/+8
* clk: Fix error checking of dev_read_addr_ptrSean Anderson2020-01-263-3/+3
* clk: uclass: clk_get_by_name() must not be available if CONFIG_OF_PLATDATA is...Giulio Benetti2020-01-261-1/+1
* clk: show more error info when uclass_get_device_by_namePeng Fan2020-01-261-2/+4
* clk: mediatek: use unsigned type for returning the clk rateFabien Parent2020-01-261-1/+1
* Merge tag '2020-01-20-ti-2020.04' of https://gitlab.denx.de/u-boot/custodians...Tom Rini2020-01-201-2/+1
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| * clk: sci-clk: add slack to clk-set-rate passed to firmwareLokesh Vutla2020-01-201-2/+1
* | common: Move get_tbclk() to time.hSimon Glass2020-01-171-0/+1
* | common: Move clock functions into a new fileSimon Glass2020-01-171-0/+1
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* clk: mediatek: fix clock-rate overflow problemSam Shih2020-01-161-3/+3
* clk: mediatek: add driver for MT7622Sam Shih2020-01-162-0/+679
* clk: fixed_rate: add dummy enable() functionChunfeng Yun2020-01-161-0/+7
* clk: add APIs to get (optional) clock by name without a deviceChunfeng Yun2020-01-161-0/+28
* clk: check valid clock by clk_valid()Chunfeng Yun2020-01-161-8/+8
* clk: fix error check for devm_clk_get_optional()Chunfeng Yun2020-01-161-1/+1
* clk: mediatek: mt7629: add support for ssusbsysChunfeng Yun2020-01-161-0/+42
* clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pllmingming lee2020-01-162-8/+20
* clk: mediatek: add set_clr_upd mux type flowmingming lee2020-01-162-11/+55
* clk: mediatek: add driver support for MT8512mingming lee2020-01-162-0/+874
* clk: imx: add i.IMXRT1050 clk driverGiulio Benetti2020-01-143-0/+310
* clk: imx: pfd: add set_rate()Giulio Benetti2020-01-141-0/+22
* clk: imx: pllv3: add support for PLLV3_AV typeGiulio Benetti2020-01-141-0/+76
* clk: imx: pllv3: add PLLV3_SYS supportGiulio Benetti2020-01-141-0/+53
* clk: imx: pllv3: add set_rate() supportGiulio Benetti2020-01-141-0/+27
* clk: imx: pllv3: add disable() supportGiulio Benetti2020-01-141-0/+16
* clk: imx: pllv3: add enable() supportGiulio Benetti2020-01-141-0/+24
* clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USBGiulio Benetti2020-01-141-0/+2
* clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocksGiulio Benetti2020-01-141-5/+15
* clk: imx8qxp: extend to support getting I2C IPG clockAnatolij Gustschin2020-01-141-0/+12
* Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xxTom Rini2020-01-091-1/+4
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| * mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalidRasmus Villemoes2020-01-081-1/+4
* | Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dmTom Rini2020-01-091-2/+2
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| * | aspeed: ast2500: Read clock ofdata in the correct methodSimon Glass2020-01-071-2/+2
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* | Merge tag 'efi-2020-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boo...Tom Rini2020-01-081-0/+1
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| * | clk: stm32mp1: Add a clock entry for RNG1 deviceSughosh Ganu2020-01-071-0/+1
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* | Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini2020-01-084-0/+390
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