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author | Tom Rini <trini@konsulko.com> | 2020-02-14 07:31:47 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2020-02-14 07:31:47 -0500 |
commit | f2a73d6867ef973fbb8471cc87058205999b5e5c (patch) | |
tree | a374f6fa963e239778d6125351f258e5ef442561 /drivers/clk | |
parent | e6da32f243b3846e5c18183b8604b71ccb535a89 (diff) | |
parent | 8ee5e3c81f47b8647ef05219058d260199c51d1b (diff) | |
download | u-boot-f2a73d6867ef973fbb8471cc87058205999b5e5c.tar.gz u-boot-f2a73d6867ef973fbb8471cc87058205999b5e5c.tar.xz u-boot-f2a73d6867ef973fbb8471cc87058205999b5e5c.zip |
Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- add DH Electronics DHCOM SoM and PDK2 board
- DT alignment with kernel v5.5-rc7 for stm32mp1 boards
- fix STM32 image format for big endian hosts in mkimage
- solve warnings in device tree and code for stm32mp1 boards
- remove fdt_high and initrd_high for stm32 and stih boards
- add support of STM32MP15x Rev.Z
- update stm32mp1 readme
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/clk_stm32mp1.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index da66bde41b..fd8c821e48 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -1218,7 +1218,7 @@ static int stm32mp1_osc_wait(int enable, fdt_addr_t rcc, u32 offset, } static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int digbyp, - int lsedrv) + u32 lsedrv) { u32 value; @@ -1651,8 +1651,8 @@ static int stm32mp1_clktree(struct udevice *dev) unsigned int clkdiv[CLKDIV_NB]; unsigned int pllcfg[_PLL_NB][PLLCFG_NB]; ofnode plloff[_PLL_NB]; - int ret; - int i, len; + int ret, len; + uint i; int lse_css = 0; const u32 *pkcs_cell; @@ -1698,7 +1698,8 @@ static int stm32mp1_clktree(struct udevice *dev) stm32mp1_lsi_set(rcc, 1); if (priv->osc[_LSE]) { - int bypass, digbyp, lsedrv; + int bypass, digbyp; + u32 lsedrv; struct udevice *dev = priv->osc_dev[_LSE]; bypass = dev_read_bool(dev, "st,bypass"); |