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path: root/drivers/clk/rockchip/clk_rk3399.c
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* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
* dm: Use access methods for dev/uclass private dataSimon Glass2021-01-051-1/+2
* dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-131-4/+4
* dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-2/+2
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-2/+2
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-4/+4
* rockchip: rk3399: Init clocks in U-Boot proper if SPL was not runAlper Nebi Yasak2020-11-131-6/+16
* Merge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodi...Tom Rini2020-10-301-0/+20
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| * clk: rockchip: rk3399: implement getting wdt/alive clocksJack Mitchell2020-10-301-0/+20
* | treewide: Fix wrong CONFIG_IS_ENABLED() handlingAlper Nebi Yasak2020-10-141-1/+1
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* clk: rk3399: Enable/Disable TCPHY clocksJagan Teki2020-05-291-0/+24
* clk: rk3399: Set empty for TCPHY assigned-clocksJagan Teki2020-05-291-0/+2
* clk: rk3399: Enable/Disable the USB2PHY clkJagan Teki2020-05-291-0/+12
* clk: rk3399: Fix eMMC get_clk reg offsetJagan Teki2020-05-291-1/+1
* clk: rk3399: Enable/Disable the PCIEPHY clkJagan Teki2020-05-221-0/+6
* clk: rk3399: Add enable/disable clksJagan Teki2020-05-221-0/+148
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* clk: rk3399: Set empty for HCLK_SD assigned-clocksJagan Teki2020-05-011-0/+1
* clk: rk3399: Set empty for vopl assigned-clocksJagan Teki2020-04-021-0/+7
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
* arm: rockchip: Add common cru.hJagan Teki2020-01-301-18/+18
* rockchip: clk: fix wrong CONFIG_IS_ENABLED handlingHeiko Stuebner2019-11-171-1/+1
* rockchip: clk: rk3399: remove clk_enable()Kever Yang2019-09-111-37/+0
* clk: rockchip: rk3399: Set 400MHz ddr clockJagan Teki2019-07-211-0/+4
* clk: rockchip: rk3399: Set 50MHz ddr clockJagan Teki2019-07-211-0/+4
* clk: rockchip: rk3399: Fix check patch warnings and checksJagan Teki2019-07-191-37/+31
* rockchip: clk: rk3399: handle clk_enable requests for USB3Mark Kettenis2019-07-191-0/+12
* rockchip: clk: rk3399: allow requests for all UART clocksChristoph Muellner2019-05-301-0/+2
* rockchip: use 'arch-rockchip' as header file pathKever Yang2019-05-011-3/+3
* rockchip: clk: Add mention of four new clocksSimon Glass2019-02-011-0/+12
* rockchip: rk3399: Initialize CPU B clock.Christoph Muellner2018-11-301-9/+70
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-271-2/+0
* rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLLPhilipp Tomsich2018-02-241-0/+9
* rockchip: clk: rk3399: handle clk_enable requests for GMACPhilipp Tomsich2018-02-241-0/+10
* rockchip: clk: guard set_parent implementations against OF_PLATDATAPhilipp Tomsich2018-01-281-2/+4
* rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-nodePhilipp Tomsich2018-01-281-0/+18
* rockchip: clk: rk3399: implement set_parent() operationPhilipp Tomsich2018-01-281-2/+72
* rockchip: clk: bind reset driverElaine Zhang2018-01-091-0/+21
* rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich2017-11-261-6/+2
* rockchip: clock: update sysreset driver bindingKever Yang2017-11-211-3/+14
* rockchip: rk3399: init CPU clock when rkclk_init()Kever Yang2017-11-011-78/+79
* treewide: replace with error() with pr_err()Masahiro Yamada2017-10-041-3/+3
* rockchip: clk: Add rk3399 SARADC clock supportDavid Wu2017-10-011-1/+35
* rockchip: clk: rk3399: Convert to livetreePhilipp Tomsich2017-09-181-2/+2
* rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1Philipp Tomsich2017-09-181-0/+15
* dtoc: Add support for 32 or 64-bit addressesSimon Glass2017-09-151-2/+2
* rockchip: clk: remove RATE_TO_DIVKever Yang2017-08-131-7/+8
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