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path: root/drivers/clk/renesas/clk-rcar-gen3.c
Commit message (Expand)AuthorAgeFilesLines
* clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut2021-05-211-43/+43
* clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham2021-05-211-0/+9
* clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham2021-05-211-2/+2
* clk: renesas: Make reset controller modemr register offset configurableMarek Vasut2021-05-211-3/+1
* clk: renesas: Add support for RPCD2 clockHai Pham2021-05-211-5/+14
* clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham2021-05-211-1/+1
* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
* treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada2020-07-251-1/+1
* Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2020-07-241-1/+1
* treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()Masahiro Yamada2020-07-201-1/+1
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* clk: renesas: Synchronize Gen3 tables with Linux 5.0Marek Vasut2019-04-091-2/+2
* clk: renesas: Allow reconfiguring SDHI clock on Gen3Marek Vasut2018-12-031-7/+3
* clk: renesas: Add PE clock handlingMarek Vasut2018-06-011-4/+36
* clk: renesas: Add PLL1 and PLL3 dividersMarek Vasut2018-06-011-4/+8
* clk: renesas: Pass clock rate around as 64bit number internallyMarek Vasut2018-06-011-25/+31
* clk: renesas: Fix swapped arguments in debug messageMarek Vasut2018-06-011-1/+1
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* clk: rmobile: Assure SD-IF clock are configured correctlyMarek Vasut2018-02-161-0/+2
* clk: renesas: Split out code shared between Gen2 and Gen3Marek Vasut2018-01-241-167/+17
* clk: renesas: Split SMSTPCR and RMSTPCR tablesMarek Vasut2018-01-241-3/+4
* clk: renesas: Make PLL configurations per-SoCMarek Vasut2018-01-241-51/+2
* clk: renesas: Make clk_ids per-driverMarek Vasut2018-01-241-3/+5
* clk: renesas: Split RCar Gen3 driverMarek Vasut2018-01-241-902/+30
* clk: rmobile: Add R8A77995 D3 clock tablesMarek Vasut2017-12-091-3/+164
* clk: rmobile: Add R8A77970 V3M clock tablesMarek Vasut2017-12-091-1/+119
* clk: rmobile: Fix typo in R8A7796 RPC clock table entryMarek Vasut2017-12-091-1/+1
* clk: rmobile: Add R8A7796 xHCI clockMarek Vasut2017-11-301-0/+1
* clk: rmobile: Move preboot clock shutdown to the driverMarek Vasut2017-11-301-0/+59
* clk: rmobile: Add RPC hyperflash clockMarek Vasut2017-09-241-1/+43
* clk: rmobile: Add support for setting SDxCKCRMarek Vasut2017-09-241-0/+34
* clk: rmobile: Split R8A7795 and R8A7796 core clock tablesMarek Vasut2017-08-261-33/+96
* clk: rmobile: Add RCar Gen3 clock driverMarek Vasut2017-08-031-0/+951
generated by cgit (git 2.34.1) at 2024-06-25 12:16:01 +0000