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path: root/drivers/clk/altera/clk-agilex.c
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* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
* dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass2020-12-131-25/+25
* dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass2020-12-131-2/+2
* dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass2020-12-131-3/+3
* dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass2020-12-131-1/+1
* dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-131-1/+1
* clk: agilex: Additional membus writes for HPS PLLChee Hong Ang2020-10-091-16/+78
* clk: agilex: Handle clock configuration differently in SPL and U-Boot properChee Hong Ang2020-10-091-0/+10
* clk: agilex: Add clock enable supportLey Foon Tan2020-10-091-0/+6
* clk: agilex: Add NAND clock supportLey Foon Tan2020-10-091-0/+3
* treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2020-07-251-1/+1
* Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2020-07-241-1/+1
* treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2020-07-201-1/+1
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* clk: agilex: Add clock driver for AgilexLey Foon Tan2020-01-071-0/+579
generated by cgit (git 2.34.1) at 2025-09-01 14:42:30 +0000