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* xilinx: zynq: Add support for saving env based on bootmodeAshok Reddy Soma2021-04-231-0/+32
| | | | | | | | | | | Enable saving variables to MMC(FAT), NAND, SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Since most of the flashes on zynq evaluation boards are 16MB in size, set default ENV_OFFSET to 15MB(0xE00000). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Correct U-Boot upstream repositoryHeinrich Schuchardt2021-02-281-1/+1
| | | | | | | The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini2021-02-231-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
| * xilinx: Show silicon version in SPLMichal Simek2021-02-101-0/+3
| | | | | | | | | | | | | | | | Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | common: Drop asm/global_data.h from common headerSimon Glass2021-02-023-0/+3
|/ | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* xilinx: Fill git repository for Xilinx boardsMichal Simek2021-01-051-0/+1
| | | | | | | | | | All Xilinx SoCs have repository location filled already but boards are covered by different fragment which is missing this link. The patch is extending description with adding proper link to the same repository. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: common: Add Makefile to common folderMichal Simek2020-10-271-1/+0
| | | | | | | | There is no need to reference files in common folder back. Simply adding Makefile to this folder does the job because this "common" location is already wired in main Makefile. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Add Z-turn board V5Alexandre GRIVEAUX2020-10-271-0/+273
| | | | | | | | | | | | | | | | | | | Adding Z-turn board V5 to resolve the change between: "Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035 "Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031 At this time the S25FL128SAGNFI003 doesn't work because of bug: *** Warning - spi_flash_probe_bus_cs() failed, using default environment zynq-zturn was checked on V5 board, same error. Maybe Z-turn board have the same problem (board with W25Q128BVFIG). Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIGMichal Simek2020-08-201-0/+9
| | | | | | | Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating variables with run time information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: zynqpl: Add zynq aes load & loadp commandsT Karthik Reddy2020-06-241-12/+35
| | | | | | | | Added support for zynq aes load & loadp commands. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: zynqpl: Correct PL bitstream loading sequence for zynqaesSiva Durga Prasad Paladugu2020-06-241-2/+5
| | | | | | | | | | | | | Correct the PL bitstream loading sequence for zynqaes command by clearing the loaded PL bitstream before loading the new encrypted bitstream using the zynq aes command. This was done by setting the PROG_B same as in case of fpgaload commands. This patch fixes the issue of loading the encrypted PL bitstream onto the PL in which a bitstream has already been loaded successfully. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-181-7/+9
| | | | | | | | | | | | | We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop part.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* xilinx: Introduce board_late_init_xilinx()Michal Simek2020-04-271-3/+2
| | | | | | | This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Rename defconfig to be align with ZynqMP and VersalMichal Simek2020-02-281-0/+1
| | | | | | Just cosmetic change before real switch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: xilinx: Fill DEVICE_TREE directly in MakefilesMichal Simek2020-02-281-0/+5
| | | | | | | | DEVICE_TREE variable is not exported from dts/Makefile that's why it is necessary to setup directly before use. Fixes: 312f2c5b14fa ("arm: xilinx: Use device tree which can be passed on cmd line") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: zybo z7: fix MIO init issueMilan Obuch2020-02-281-2/+2
| | | | | | | | | | | | | | | | The board has two push button connected to MIO pins 50 and 51, which have a pull-down resistor and are connected to 1.8V when pressed. These two pins are wrongly initialized with internal pull-up enabled so they are reported as 1 all the time with no change when pressed. Disable the internal pull-up to fix the issue. Signed-off-by: Milan Obuch <u-boot@dino.sk> Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Add jtag distro boot supportT Karthik Reddy2020-01-141-1/+1
| | | | | | | | This patch adds new jtag distro boot command to look for bootscript file in DDR and execute it first incase of jtag bootmode. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: xilinx: Use device tree which can be passed on cmd lineMichal Simek2020-01-141-1/+1
| | | | | | | | | DEVICE_TREE variable has been added by commit 6ab6b2afa091 ("dts: re-write dts/Makefile more simply with Kbuild") where DT can be specified on command line. If it is not then CONFIG_DEFAULT_DEVICE_TREE is used to ensure backward compatibility. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Remove low level UART settingMichal Simek2020-01-1414-1018/+0
| | | | | | | There is no reason to do serial initializationin low level code. Uart driver does it already based on DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* board: xilinx: Add support for user configurable boot script offsetT Karthik Reddy2020-01-141-0/+2
| | | | | | | | | | | | | | | Currently "script_offset_f" env variable is hardcoded, this variable specifies from which offset of the flash boot.scr should be read/write. As flashes are of different sizes having a fixed offset makes it difficult to load other images into the flash which may overwrite the boot script or cannot utilize the full memory. This current fix creates a new config "CONFIG_BOOT_SCRIPT_OFFSET" which holds the offset address, overwrites the "script_offset_f" variable. Also removed existing variable with default values, as the default values are held by CONFIG_BOOT_SCRIPT_OFFSET Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* common: Move some board functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: zynq: Remove unused board_early_init_f()Michal Simek2019-10-241-7/+0
| | | | | | | | | board_early_init_f added by commit e6cc3b25d721 ("arm: zynq: Wire watchdog internals") is no longer needed that's why remove it also with Kconfig enabling. Fixes: ccd063e9812a ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Specify MMC controller number for boot sequenceMichal Simek2019-10-081-1/+1
| | | | | | | | | Xilinx Zynq SoC has two sdhci controllers but boot is only possible from the first one. That's why there is a need to specify controller number. mmc1 is supposed to be secondary boot device and should be also listed in distribution boot. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* env: Move env_set() to env.hSimon Glass2019-08-111-0/+1
| | | | | | | Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: zynq: Add configuration for Z-turn boardAnton Gerasimov2019-07-301-0/+281
| | | | | | | Basic (PS-only) configuration based on Vivado board files by Sergiusz Bazanski <sergius@q3k.org> Signed-off-by: Anton Gerasimov <tossel@gmail.com>
* watchdog: Implement generic watchdog_reset() versionStefan Roese2019-04-261-39/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Maxim Sloyko <maxims@google.com> Cc: Erik van Luijk <evanluijk@interact.nl> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Weijie Gao <weijie.gao@mediatek.com> Cc: Simon Glass <sjg@chromium.org> Cc: "Álvaro Fernández Rojas" <noltari@gmail.com> Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
* ARM: zynq: Check zynq aes & rsa command parameters countT Karthik Reddy2019-04-161-1/+8
| | | | | | | | | This patch checks for zynq aes & rsa commands max parameters count. Also checks minimum number of parameters count for aes command. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* watchdog: Move watchdog_dev to data section (BSS may not be cleared)Stefan Roese2019-04-081-6/+1
| | | | | | | | | | | | | | | | | | This patch moves all instances of static "watchdog_dev" declarations to the "data" section. This may be needed, as the BSS may not be cleared in the early U-Boot phase, where watchdog_reset() is already beeing called. This may result in incorrect pointer access, as the check to "!watchdog_dev" in watchdog_reset() may not be true and the function may continue to run. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Marek Behún" <marek.behun@nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100) Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Update boot_targets based on bootmodeSiva Durga Prasad Paladugu2019-02-141-0/+29
| | | | | | | | Update boot_targets based on bootmode to run corresponding distroboot command first. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Move zynq_board_read_rom_ethaddr to shared locationMichal Simek2019-02-142-13/+1
| | | | | | | | | | Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Wire SPL configuration for cse nor/nand targetsMichal Simek2018-11-292-0/+2
| | | | | | | These symlinks are here only for testing purpose where SPL is used for soc configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Guard zynq_help_text with CONFIG_SYS_LONGHELPMichal Simek2018-11-261-0/+2
| | | | | | | | | | If SYS_LONGHELP is disabled the following warning is generated: board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but not used [-Wunused-variable] Normal way for fixing this is to guard the whole variable. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add support for DLC20 boardMichal Simek2018-10-161-0/+280
| | | | | | | | | Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: add support for the zybo z7 boardLuis Araneda2018-08-061-0/+297
| | | | | | | | | | | | | | | | | | | | The board is manufactured by Digilent Main features: - Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20) - RAM: 1 GB DDR3L - FLASH: 16 MB QSPI - 1 Gbps Ethernet - USB 2.0 - microSD slot - Pcam camera connector - HDMI Tx and Rx - Audio codec: stereo out, stereo in, mic - 5 (Z7-10) or 6 (Z7-20) Pmod ports - 6 push-buttons, 4 switches, 5 LEDs - 1 (Z7-10) or 2 (Z7-20) RGB LEDs Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* lib: fdtdec: Rename routine fdtdec_setup_memory_size()Siva Durga Prasad Paladugu2018-07-191-1/+1
| | | | | | | | | | | This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: zynq: Try to enable the first watchdog via aliasesMichal Simek2018-07-191-5/+9
| | | | | | | | | | | | | | | | | | | | | The same change as was done for zynqmp with this description: Add support for enabling the first watchdog pointed via aliases. DT fragment: aliases { ... watchdog0= &watchdog0; watchdog1 = &watchdog_lpd; ... }; <zynqmp example removed> Till this patch the first watchdog found in DT was used and started which is not enabling all possible configuration based on user request. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynq: Add support to secure imagesSiva Durga Prasad Paladugu2018-07-194-0/+694
| | | | | | | | | | | | | | | | This patch basically adds two new commands for loadig secure images. 1. zynq rsa adds support to load secure image which can be both authenticated or encrypted or both authenticated and encrypted image in xilinx bootimage(BOOT.bin) format. 2. zynq aes command adds support to decrypt and load encrypted image back to DDR as per destination address. The image has to be encrypted using xilinx bootgen tool and to get only the encrypted image from tool use -split option while invoking bootgen. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variableLuca Ceresoli2018-07-191-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on ZynqMP (PS init for short). The current logic to locate this file for both platforms is: 1. if a board-specific file exists in board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c then use it 2. otherwise use board/xilinx/zynq/ps?_init_gpl.c In the latter case the file does not exist in the U-Boot sources and must be copied in the source tree from the outside before starting the build. This is typical when it is generated from Xilinx tools while developing a custom hardware. However making sure that a board-specific file is _not_ found (and used) requires some trickery such as removing or overwriting all PS init files (e.g.: the current meta-xilinx yocto layer). This generates a few problems: * if the source tree is shared among different out-of-tree builds, they will pollute (and potentially corrupt) each other * the source tree cannot be read-only * any buildsystem must add a command to copy the PS init file binary * overwriting or deleting files in the source tree is ugly as hell Simplify usage by allowing to pass the path to the desired PS init file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute path or relative to $(srctree). If the variable is set, the user-specified file will always be used without being copied around. If the the variable is left empty, for backward compatibility fall back to the old behaviour. Since the issue is the same for Zynq and ZynqMP, add one kconfig variable in a common place and use it for both. Also use the new kconfig help text to document all the ways to give U-Boot the PS init file. Build-tested with all combinations of: - platform: zynq or zynqmp - PS init file: from XILINX_PS_INIT_FILE (absolute, relative path, non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/ - building in-tree, in subdir, in other directory Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add missing watchdog headerMichal Simek2018-06-151-0/+1
| | | | | | Add missing header detected by sparse. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblazeTom Rini2018-05-111-80/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup
| * arm: zynq: Remove checkboard and enable DISPLAY_CPUINFOMichal Simek2018-05-111-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200) CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> mini configuration doesn't need to show this information. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: zynq: Rework FPGA initializationMichal Simek2018-05-111-63/+0
| | | | | | | | | | | | | | | | | | | | This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar> and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | SPDX: Convert a few files that were missed beforeTom Rini2018-05-104-16/+4
|/ | | | | | | | | | | As part of the main conversion a few files were missed. These files had additional whitespace after the '*' and before the SPDX tag and my previous regex was too strict. This time I did a grep for all SPDX tags and then filtered out anything that matched the correct styles. Fixes: 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style") Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0710-22/+10
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: zynq: Wire automatic ddr detection for Zynq and ZynqMP caseMichal Simek2018-04-231-1/+2
| | | | | | | | When static memory configuration is used U-Boot has capability to detect memory size in setup range. Enable this feature for static configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragmentsMichal Simek2018-03-231-0/+1
| | | | | | | | | | | | | | Fix my fragments to list all files in the repo. Also fix path to for Xilinx Zynq SoC (mach-zynq) It should be the part of "ARM: zynq: move SoC sources to mach-zynq" (sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc) And cover dts files in board MAINTAINERS files. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Wire watchdog internalsMichal Simek2018-03-231-0/+49
| | | | | | | Watchdog is only enabled in full u-boot. Adoption for SPL should be also done because that's the right place where watchdog should be enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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