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* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún2021-05-241-1/+1
| | | | | | | | | | | | | | | | | This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* xilinx: common: Fix boot script addressT Karthik Reddy2021-04-231-4/+2
| | | | | | | | | | | | | | | | | Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: versal: Add usb dfu/thor distro boot supportT Karthik Reddy2021-04-231-1/+1
| | | | | | | | | | Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Add usb dfu/thor distro boot supportT Karthik Reddy2021-04-231-1/+1
| | | | | | | | | | | | In usb boot mode distro boot should select usb device as primary boot device instead of usb host. So make usb dfu as primary boot device. But do not list it in boot_targets as fallback option because it is not classic mode for booting. Using 60s timeout by default should be enough time for dfu-utils to start transaction. In case none needs this please change timeout value in the command or disable CONFIG_DFU_TIMEOUT. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: versal: Add support for saving env based on bootmodeAshok Reddy Soma2021-04-231-0/+30
| | | | | | | | | | Enable saving variables to MMC(FAT) and SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal platforms as well. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynq: Add support for saving env based on bootmodeAshok Reddy Soma2021-04-231-0/+32
| | | | | | | | | | | Enable saving variables to MMC(FAT), NAND, SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Since most of the flashes on zynq evaluation boards are 16MB in size, set default ENV_OFFSET to 15MB(0xE00000). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'xilinx-for-v2021.07' of ↵Tom Rini2021-03-313-82/+3910
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
| * arm64: zynqmp: Update psu_init for zcu1275Michal Simek2021-03-301-82/+148
| | | | | | | | | | | | Update clock/pll setup, ddr, MIOs based on 2020.2 hw design. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add missing psu inits for zcu208/216Michal Simek2021-03-302-0/+3762
| | | | | | | | | | | | Add missing configurations file for zcu208 and zcu216. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-022-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Correct U-Boot upstream repositoryHeinrich Schuchardt2021-02-284-4/+4
| | | | | | | The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git effective 2021-02-28. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini2021-02-235-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
| * arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT nameMichal Simek2021-02-232-0/+0
| | | | | | | | | | | | | | | | | | Folder names corresponds to DT name. These boards have been renamed from zc1275 to zcu1275 by commit shown below and this should be the part of that commit. Fixes: 420d44678119 ("arm64: zynqmp: Rename zc1275 to zcu1275") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not clear reset reasonMichal Simek2021-02-231-5/+1
| | | | | | | | | | | | | | | | There is no need to clear reset reason register because it is protected by PMUFW already which is reported when verbose log is enabled as: pm_core.c@733 APU> No write permission to 0xFF5E0220 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: Show silicon version in SPLMichal Simek2021-02-102-0/+4
| | | | | | | | | | | | | | | | Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMPMichal Simek2021-02-101-1/+1
| | | | | | | | | | | | | | | | | | | | Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | common: Drop asm/global_data.h from common headerSimon Glass2021-02-027-0/+7
|/ | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPLMichal Simek2021-01-201-1/+2
| | | | | | | | This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: common: Change macro handling in board_fdt_blob_setup()Michal Simek2021-01-201-16/+20
| | | | | | | Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Save bootseq number for SD/EMMC boot modesMichal Simek2021-01-201-0/+1
| | | | | | | | For systems which has both sdhci controllers enable it is worth to export bootseq number for variables. Then the variable can be used in custom scripts to tune logic for OS. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini2021-01-066-2/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
| * xilinx: Fill git repository for Xilinx boardsMichal Simek2021-01-054-0/+4
| | | | | | | | | | | | | | | | | | | | All Xilinx SoCs have repository location filled already but boards are covered by different fragment which is missing this link. The patch is extending description with adding proper link to the same repository. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * fru: ops: avoid out of bounds accessHeinrich Schuchardt2021-01-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building xilinx_zynq_virt_defconfig fails on origin/next as reported by GCC 10.2 (as provided by Debian Bullseye): CC board/xilinx/common/fru_ops.o board/xilinx/common/fru_ops.c: In function ‘fru_capture’: board/xilinx/common/fru_ops.c:173:8: error: array subscript 284 is outside array bounds of ‘struct fru_table[1]’ [-Werror=array-bounds] 173 | limit = data + sizeof(struct fru_board_data); | ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’ 17 | struct fru_table fru_data __section(.data); | ^~~~~~~~ When using sizeof(struct fru_board_data) to find the end of the structure you should add it to the start of the structure. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Set script_offset_nor env variableT Karthik Reddy2021-01-041-1/+4
| | | | | | | | | | | | | | | | Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET and nor flash start address to keep bootscript offset configurable. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | dm: Avoid accessing seq directlySimon Glass2020-12-182-12/+12
|/ | | | | | | | | | At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
* fru: common: Record pcie/uuid fields in custom board areaMichal Simek2020-11-201-0/+4
| | | | | | Add additional fields. They will be just recorded and filled but not shown. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fru: ops: Do not let parser to write data to not allocated spaceMichal Simek2020-11-201-1/+7
| | | | | | | | | If customs fields in board area are used it will likely go over allocated space in struct fru_board_data. That's why calculate limit of this structure to make sure that different data is not rewritten by accident. When limit is reached stop to record fields. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fru: common: Switch capture variable with the restMichal Simek2020-11-202-2/+2
| | | | | | | | | capture variable is bool which is just one byte and it is just causing unaligned accesses. Better to have it as last entry in the structure. It also simplify offset calculation for initial header copy. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Get rid of xparameters.hMichal Simek2020-11-201-18/+0
| | | | | | | There is no need to use this file anymore. Include it in main config file and simplify logic based on it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Consolidate board_fit_config_name_match() for Xilinx platformsMichal Simek2020-10-291-0/+11
| | | | | | | | | Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: zynq_sdhci: Add common function to set input/output tapdelaysAshok Reddy Soma2020-10-291-157/+33
| | | | | | | | | | | Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mmc: Define timing macro'sAshok Reddy Soma2020-10-271-9/+1
| | | | | | | | | | Define timing macro's for all the available speeds of mmc. This is done similar to linux. Replace speed macro's used with these new timing macro's wherever applicable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* microblaze: Wire generic xilinx board_late_init_xilinx()Michal Simek2020-10-272-14/+5
| | | | | | | | | Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARMMichal Simek2020-10-272-8/+3
| | | | | | There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Add DDR base address to bootscript addressT Karthik Reddy2020-10-271-0/+9
| | | | | | | | | | | | | | | | | Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Use tab for macro indentationMichal Simek2020-10-271-6/+6
| | | | | | | Trivial fix. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Do not check 0 as invalid return from snprintfMichal Simek2020-10-271-1/+1
| | | | | | | | | | | | U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't return any return value and all the time returns 0. That's why even correct snprintf was returning in SPL chip ID as "unknown". Change checking condition and allow snprintf to return 0 which is according manual patch successful return. "If an output error is encountered, a negative value is returned." Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()Michal Simek2020-10-271-1/+1
| | | | | | | Fix hex format from 0x%0X to 0x%0x to show correct numbers. Fixes: fa793165daf7 ("xilinx: zynqmp: refactor silicon name function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Check return value from xilinx_pm_request()Michal Simek2020-10-271-1/+5
| | | | | | | xilinx_pm_request() can failed that's why also check return value. Fixes: 050f10f103cd ("xilinx: zynqmp: remove chip_id function") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: board: Add FRU decoder supportMichal Simek2020-10-271-1/+82
| | | | | | | FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: cmd: Add basic fru format generatorMichal Simek2020-10-273-2/+136
| | | | | | | | | | | | | | | | | Idea is to have something what can be used for board bringup from generic board perspective. There is a violation compare to spec that FRU ID is ASCII8 instead of binary format but this is really for having something to pass boot and boot to OS which has better generating options. Also time should be filled properly. For example: fru board_gen 1000 XILINX versal-x-prc-01-revA serialX partX There is also support for revision field which is Xilinx specific field. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: cmd: Add support for FRU commandsSiva Durga Prasad Paladugu2020-10-276-0/+414
| | | | | | | | | | | | | | | | | This patch adds support for fru commands "fru capture" and "fru display". The fru capture parses the FRU table present at an address and stores in a structure for later use. The fru display prints the content of captured structured in a readable format. As of now, it supports only common header and board area of FRU. Also, it supports only English language code and ASCII8/BINARY formats. fru_data variable is placed to data section because fru parser can be called very early before bss is initialized. And also information needs to be shared that's why it is exported via header. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: common: Add Makefile to common folderMichal Simek2020-10-274-3/+7
| | | | | | | | There is no need to reference files in common folder back. Simply adding Makefile to this folder does the job because this "common" location is already wired in main Makefile. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: common: Protect board_late_init_xilinx()Michal Simek2020-10-271-0/+2
| | | | | | Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board KconfigMichal Simek2020-10-271-0/+17
| | | | | | | | | | | | There is no reason to have ZYNQ specific Kconfig macro in generic location to be visible for all other SoCs. That's why move it to Xilinx common location to be visible only for us. Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to disable it or enable. This has connection to code which is reading the whole content of i2c and also work with the rest of date not just with MAC address. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: board: Add support for additional card detectionMichal Simek2020-10-271-24/+61
| | | | | | | | | The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: board: Read the whole eeprom not just offsetMichal Simek2020-10-274-1/+212
| | | | | | | | | | | | Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for saving sha3 key to different addressMichal Simek2020-10-271-7/+18
| | | | | | | | | | By default 48B sha3 hash value is written to srcaddr which is not the best solution in case of that you want to use data for other operations. That's why add key_addr optional parameters which enables to write 48B sha3 hash value to specified address. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
* arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy2020-10-271-0/+63
| | | | | | | | | This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for RSA commandT Karthik Reddy2020-10-271-0/+72
| | | | | | | | | This patch adds support for RSA command, performs RSA encrypt & RSA decrypt on data blob of key size. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2025-09-03 01:32:27 +0000