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* riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng2021-05-191-0/+1
* riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng2021-05-171-1/+2
* cpu: Rename SPL_CPU_SUPPORT to SPL_CPUSimon Glass2021-03-271-1/+1
* Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-151-0/+1
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| * common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
* | riscv: Adjust board_get_usable_ram_top() for 32-bitBin Meng2021-02-031-4/+3
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* riscv: Rework riscv timer driver to only support S-modeSean Anderson2020-09-301-1/+1
* common: Drop net.h from common headerSimon Glass2020-05-181-0/+1
* riscv: qemu: Remove the simple-bus driver for the SoC nodeBin Meng2020-04-231-14/+0
* common: Move board_get_usable_ram_top() out of common.hSimon Glass2019-12-021-0/+1
* common: Move enable/disable_interrupts out of common.hSimon Glass2019-12-021-0/+1
* riscv: add SPL supportLukas Auer2019-08-261-0/+3
* riscv: add run mode configuration for SPLLukas Auer2019-08-261-1/+1
* riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel2019-02-271-0/+20
* riscv: Rename cpu/qemu to cpu/genericAnup Patel2019-02-274-0/+70
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