summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mvebu/cpu.c
Commit message (Expand)AuthorAgeFilesLines
* reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-021-1/+1
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-171-1/+1
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop init.h from common headerSimon Glass2020-05-181-0/+1
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-021-0/+1
* arm: mvebu: fix ahci mbus config in SPLBaruch Siach2019-07-111-0/+4
* mmc: mv_sdhci: add driver model supportPierre Bourdon2019-04-261-1/+1
* arm: mvebu: NAND clock support for MSYS devicesChris Packham2019-04-121-0/+2
* arm: mvebu: Add Marvell's integrated CPUsChris Packham2019-04-121-2/+29
* ARM: mvebu: define board_ahci_enable() for A38xBaruch Siach2019-04-121-3/+10
* ARM: mvebu: remove out of date commentChris Packham2018-12-211-4/+2
* ARM: mvebu: add revision id for Armada-385 B0Chris Packham2018-11-301-0/+3
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* arm: mvebu: Add board_setup for xhci hardwareJon Nettleton2017-11-161-0/+41
* ARM: mvebu: add SAR frequency values for 1.8/2.0GHzChris Packham2017-09-261-7/+9
* ARM: mvebu: Add SoC IDs for Marvell's integrated CPUsChris Packham2017-09-261-0/+14
* mmc: move some SDHCI related options to KconfigMasahiro Yamada2016-12-291-1/+1
* arm: mvebu: Add support for NAND interface on A-38xChris Packham2016-08-261-1/+8
* arm: mvebu: Don't enable d-cache on A375Stefan Roese2016-04-041-2/+9
* arm: mvebu: Add basic support for the Marvell Armada 375 SoCStefan Roese2016-04-041-3/+61
* mvebu: Add rudimental MV78230 supportPhil Sutter2016-01-141-5/+11
* arm: mvebu: Make local structs static constStefan Roese2016-01-141-2/+2
* arm: mvebu: Move SAR register defines into headerStefan Roese2016-01-141-16/+3
* arm: mvebu: Print CPU and SDRAM frequency upon startupStefan Roese2016-01-141-6/+94
* arm: mvebu: Don't include "netdev.h" in cpu.cStefan Roese2016-01-141-1/+0
* arm: mvebu: Add support for MV78260Stefan Roese2016-01-141-1/+4
* arm: mvebu: Simplify code in setup_usb_phys() a bitStefan Roese2016-01-141-5/+5
* arm: mvebu: Don't disable cache at startup on Armada XP at allStefan Roese2016-01-141-12/+13
* arm: mvebu: Don't call arch_cpu_init() from SPL at allStefan Roese2016-01-141-4/+3
* arm: mvebu: Add v7_outer_cache_disable function for AXP & A38xStefan Roese2016-01-141-0/+8
* arm: mvebu: Enable L2 cache on Armada XPStefan Roese2016-01-141-9/+25
* net: mvneta: Convert to driver modelStefan Roese2016-01-141-24/+0
* arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPLStefan Roese2015-10-211-12/+19
* arm: mvebu: Fix internal register config on A38xStefan Roese2015-10-011-14/+22
* pci: mvebu: Add PCIe driverAnton Schubert2015-08-171-8/+0
* arm: mvebu: Enable USB EHCI support on Armada XPStefan Roese2015-08-171-0/+43
* arm: mvebu: Enable NAND controller on MVEBU SoC'sStefan Roese2015-08-171-0/+17
* arm: mvebu: Disable MBUS error propagationStefan Roese2015-08-171-0/+3
* arm: mvebu: Flush caches and disable MMU only on A38xStefan Roese2015-08-171-7/+19
* arm: mvebu: Change MBUS base addresses and sizesStefan Roese2015-08-171-6/+8
* arm: mvebu: Disable MMU before changing register base addressStefan Roese2015-07-231-0/+18
* arm: mvebu: Add SATA/SCSI (AHCI) support for Armada A38xStefan Roese2015-07-101-0/+55
* arm: mvebu: Add SDIO/SDHCI support for Armada A38xStefan Roese2015-07-101-0/+11
* arm: mvebu: Update CBAR with SOC regs baseKevin Smith2015-06-141-0/+7
* arm: mvebu: Disable L2 cache before enabling d-cacheStefan Roese2015-06-141-0/+8
* arm: mvebu: Add d-cache invalidate before enabling the d-cacheStefan Roese2015-05-051-0/+3
* arm: mvebu: Change network init code to allow a more flexible setupStefan Roese2015-05-051-4/+16
* arm: mvebu: Add basic Armada 38x supportStefan Roese2015-05-051-16/+57
* arm: armada-xp: Move SoC sources to mach-mvebuStefan Roese2015-05-051-0/+193
generated by cgit (git 2.34.1) at 2024-11-11 16:01:25 +0000