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* caam: enable support for iMX7ULPFranck LENORMAND2021-04-081-0/+1
| | | | | Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
| | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* mx7ulp: clock: Align the PLL_USB frequencyFabio Estevam2020-11-011-1/+1
| | | | | | | | | | | | | | The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz Add some extra spaces so that the PLL_USB information gets aligned with the previous reported frequencies. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx7ulp: clock: Remove unuseful informationFabio Estevam2020-11-011-3/+1
| | | | | | | | | | | | | | | | | The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz .... [do_mx7_showclocks] addr = 0x9FFB61F1 The last line is not useful at all, so just remove it. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-184-0/+4
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-181-1/+3
| | | | | | | | | | | | | We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Don't include common.h in header filesSimon Glass2020-05-181-0/+2
| | | | | | | | | | | It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
* mx7ulp: Only enable LDO if it is not already enabledFabio Estevam2020-04-171-11/+14
| | | | | | | | | | | | LDO mode may be already enabled by the ROM and enabling it again can cause U-Boot to hang. Avoid this problem by only enabling LDO mode if it is initially disabled. Reported-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* mx7ulp: Remove duplicated definitionsFabio Estevam2020-04-171-4/+0
| | | | | | | | | These PMC0 definitions are already defined in the beginning of the file, so remove the duplication. Reported-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* Merge tag 'u-boot-imx-20200121' of ↵Tom Rini2020-01-211-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx --------------------------------- imx8: cleanup, fix warnings imx6ull: add VisionSOM SoM and EVK mx7ulp: fix warning due network, cleanup mx7dsabre: Fix dm probe pmic imx6: fixed for vining2000 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/639512296
| * mx7ulp: soc: s_init should only be executed onceJorge Ramirez-Ortiz2020-01-201-0/+2
| | | | | | | | | | | | | | | | | | On SPL enabled systems, the current s_init code (wdog, clock and ldo init) is executed twice (by SPL and u-boot). This is not necessary and might lead to boot issues (ie, starting PMC1 when it is already running). Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* | common: Move reset_cpu() to the CPU headerSimon Glass2020-01-171-0/+1
| | | | | | | | | | | | Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* | common: Move clock functions into a new fileSimon Glass2020-01-171-0/+1
|/ | | | | | | These three clock functions don't use driver model and should be migrated. In the meantime, create a new file to hold them. Signed-off-by: Simon Glass <sjg@chromium.org>
* mx7ulp: Add support for Embedded Artists COM boardFabio Estevam2020-01-071-0/+6
| | | | | | | | | | | The Embedded Artists COM board is based on NXP i.MX7ULP. It has a BD70528 PMIC from Rohm with discrete DCDC powering option and improved current observability (compared to the existing NXP i.MX7ULP EVK). Add the initial support for the board. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx7ulp: scg: Remove unnused scg_a7_apll_init()Fabio Estevam2019-12-061-61/+0
| | | | | | scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitionsFabio Estevam2019-12-061-10/+10
| | | | | | | | The LDOVL definitions is common to all the modes, not only RUN mode, so in order to avoid confusion, remove the _RUN notation from the PMC1 LDOVL definitions. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE optionFabio Estevam2019-12-062-0/+63
| | | | | | | | Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards designed to operate with LDO enabled mode can work with 0.95V at LDO output in RUN mode as per the datasheet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* mx7ulp: Print the LDO mode statusFabio Estevam2019-12-061-0/+20
| | | | | | | | | As per the i.MX7ULP datasheet, it can boot in LDO enabled mode or LDO bypass mode. Print the LDO mode status in the U-Boot log for convenience. Signed-off-by: Fabio Estevam <festevam@gmail.com>
* common: Move some board functions out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HABStefano Babic2019-10-082-2/+2
| | | | | | | | CONFIG_SECURE_BOOT is too generic and forbids to use it for cross architecture purposes. If Secure Boot is required for imx, this means to enable and use the HAB processor in the soc. Signed-off-by: Stefano Babic <sbabic@denx.de>
* i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXTYe Li2019-10-081-1/+9
| | | | | | | | | | On i.MX7ULP B0, there is change in NIC clock dividers architecture. On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but on B0 they are parallel with NIC1 DIV. So now the dividers are independent. This patch modifies the scg_nic_get_rate function according to this change. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chipYe Li2019-10-082-0/+43
| | | | | | | | The normal target frequency for ULP A7 core is 500Mhz, but now ROM set the core frequency to 413Mhz. So change it to 500Mhz in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Add CPU revision check for B0Peng Fan2019-10-081-2/+5
| | | | | | | Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Workaround APLL PFD2 to 345.6MhzYe Li2019-10-081-2/+2
| | | | | | | | | | | The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Fix SPLL/APLL clock rate calculation issueYe Li2019-10-081-2/+8
| | | | | | | | The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Fix wrong i2c configuration nameYe Li2019-10-081-1/+1
| | | | | | | | Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Add CONFIG_MX7ULP to kconfigYe Li2019-10-081-1/+5
| | | | | | | | Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Correct the clock indexBai Ping2019-10-081-1/+1
| | | | | | | | | On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* i.MX7ULP: Fix system reset after a7 rtc alarm expired.Bai Ping2019-10-081-0/+4
| | | | | | | | | | | The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: i.MX7ULP: add get_boot_devicePeng Fan2019-10-081-0/+27
| | | | | | | Add get_boot_device for i.MX7ULP Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Fabio Estevam <festevam@gmail.com>
* Convert to use fsl_esdhc_imx for i.MX platformsYangbo Lu2019-06-231-1/+1
| | | | | | | | | | | Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-076-13/+6
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: move SYS_ARCH_TIMER to KConfigAndre Przywara2018-04-281-0/+1
| | | | | | | | | | | | | SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot. At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [tuomas: rebase + fix conflicts and resync with moveconfig & use select] Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-272-4/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: imx: Rework i.MX specific commands to be excluded from SPLTom Rini2018-01-121-0/+2
| | | | | | | | | | | | The "clocks" and "bootaux" commands are only usable in full U-Boot, not SPL, so do not link them inside of SPL. Rework a little of the bootaux related code to make use of __weak and declare parts of it static as it's local to the file. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* imx: reorganize IMX code as other SOCsStefano Babic2017-07-127-0/+2083
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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