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* arm: dts: k3-j7200: Add USB related DT entriesVignesh Raghavendra2020-08-114-0/+80
| | | | | | Add USB related DT entries to enable USB device mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* arm: dts: k3-j7200: Add R5 specific dts supportDave Gerlach2020-08-113-1/+2396
| | | | | | | | | | | | | Add the basic a72 basic dts for j7200. Following nodes were supported: - UART - MMC SD - I2C - TISCI communication - LPDDR with 1600MTs configuration. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* arm: dts: k3-j7200: Add dts supportLokesh Vutla2020-08-117-1/+863
| | | | | | | | | | | | | Add the basic a72 dts for j7200. Following nodes were supported: - UART - MMC SD - I2C - TISCI communication Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* arm: dts: k3-am654-base-board: Add support for USB0 in SPLFaiz Abbas2020-08-111-0/+27
| | | | | | Add nodes for USB0 in SPL to enable USB host boot mode Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* arm: dts: k3-am654-r5-base-board: Add USB0 nodesFaiz Abbas2020-08-111-0/+35
| | | | | | | Add USB0 nodes and set them to host mode to support USB host and peripheral boot modes Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* arm: dts: k3-j721e: Fix interconnect node namesSuman Anna2020-08-111-2/+2
| | | | | | | | | The various CBASS interconnect nodes on K3 J721E SoCs are defined using the node name "interconnect". This is not a valid node name as per the dt-schema. Fix these node names to use the standard name used for SoC interconnects, "bus". Signed-off-by: Suman Anna <s-anna@ti.com>
* arm: dts: k3-am65: Fix interconnect node namesSuman Anna2020-08-111-3/+3
| | | | | | | | | The various CBASS interconnect nodes on K3 AM65x SoCs are defined using the node name "interconnect". This is not a valid node name as per the dt-schema. Fix these node names to use the standard name used for SoC interconnects, "bus". Signed-off-by: Suman Anna <s-anna@ti.com>
* ARM: omap3: evm: Complete DM_ETH and DM_USB migrationsDerald D. Woods2020-08-112-0/+20
| | | | | | | | | This commit completes the migrations for DM_ETH and DM_USB. The board is now consistent with omap3_beagle and other remaining OMAP3 boards. Cc: Tom Rini <trini@konsulko.com> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
* arm: dts: k3: Add RTI watchdogsJan Kiszka2020-08-112-0/+27
| | | | | | | | | | | | Add DT entries for main domain watchdog0 and 1 instances on the J721e well as RTI1-based watchdog on the AM65x. RTI0 does not work for this purpose on the AM65x, so leave it out. On AM65x, we mark the power-domain as shared because RTI firmware such as https://github.com/siemens/k3-rti-wdt may request it as well in order to prevent accidental shutdown of the watchdog. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
* board: presidio: add LED supportJway Lin2020-08-071-0/+31
| | | | | | | | | | Add LED support for Cortina Access Presidio Engineering Board Signed-off-by: Jway Lin <jway.lin@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Reviewed-by: Simon Glass <sjg@chromium.org> CC: Simon Glass <sjg@chromium.org>
* arm: mvebu: Update CRS305-1G-4S board flash layoutLuka Kovacic2020-08-061-5/+5
| | | | | | | | | | | Update the MikroTik CRS305-1G-4S flash layout to support redundant UBI partitions. Additionally enable the UBI commands in crs305-1g-4s_defconfig. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add CRS328-4C-20S-4S boardLuka Kovacic2020-08-065-0/+185
| | | | | | | | | | | | | | | | MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated Marvell Prestera 98DX3236 CPU. This commit includes two board variants, namely the factory default one and a Bit variant. The Bit board variant has a bigger Macronix flash. Add basic U-Boot, UART and SPI flash support. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add CRS326-24G-2S boardLuka Kovacic2020-08-065-0/+185
| | | | | | | | | | | | | | | | MikroTik CRS326-24G-2S board has a switch chip with an integrated Marvell Prestera 98DX3236 CPU. This commit includes two board variants, namely the factory default one and a Bit variant. The Bit board variant has a bigger Macronix flash. Add basic U-Boot, UART and SPI flash support. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add CRS305-1G-4S Bit boardLuka Kovacic2020-08-062-0/+44
| | | | | | | | | | | | | | MikroTik CRS305-1G-4S Bit board has a switch chip with an integrated Marvell Prestera 98DX3236 CPU. The Bit board variant is added, which has a bigger Macronix flash. Add basic U-Boot, UART and Winbond SPI flash support. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
* Merge tag 'u-boot-imx-20200804' of ↵Tom Rini2020-08-0411-89/+419
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2020.10 ----------- - fixes for Toradex board - fix warnings from previous PR - HAB: reset instead of panic after failure - new board: MYiR Tech MYS-6ULX - mx6cuboxi: use OF_PLATDATA - further changes for DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
| * imx: Add MYiR Tech MYS-6ULX supportParthiban Nallathambi2020-08-034-0/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based on imx6ULL SoC from NXP and provision for expansion board. This commit adds support only for SBC with NAND. CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 45C Reset cause: WDOG Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND Board: MYiR MYS-6ULX 6ULL Single Board Computer DRAM: 256 MiB NAND: 256 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
| * ARM: dts: imx7-colibri: multiple node updatesIgor Opaniuk2020-07-274-38/+78
| | | | | | | | | | | | | | | | | | | | | | 1. Move u-boot specific nodes to u-boot dts include: legacy lcdif node and aliases. 2. Add iomux configuration for LCD. 3. Drop un-needed u-boot,dm-pre-reloc for alias node. 4. Fix display-timings, use the one from Toradex downstream kernel [1] [1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n206 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * ARM: dts: imx6ull-colibri: move u-boot specific nodeIgor Opaniuk2020-07-272-43/+45
| | | | | | | | | | | | | | | | | | 1. Move aliases and legacy lcdif node to the u-boot specific dts include. 2. Provide proper display timings, as in the downstream Toradex kernel [1]. [1]: https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi?h=toradex_4.9-2.3.x-imx#n183 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * ARM: dts: imx8mm-verdin: eeprom nodes adjustmentsIgor Opaniuk2020-07-271-8/+14
| | | | | | | | | | | | | | | | | | | | Rename EEPROM nodes. Create aliases for EEPROM to unify their order: eeprom0 - on-module EEPROM eeprom1 - carrier-board EEPROM eeprom2 - MIPI-DSI to HDMI adapter EEPROM Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
* | Merge tag 'dm-pull-28jul20' of git://git.denx.de/u-boot-dmTom Rini2020-07-296-2/+130
|\ \ | | | | | | | | | | | | | | | Use binman instead of one of the Rockchip build scripts Refactor to allow any arch to create SPI-flash images New button uclass
| * | rockchip: Convert evb-rk3288 over to use binmanSimon Glass2020-07-282-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | At present this board uses a custom script to produce the .its file. Update it to use binman instead. Binman can create all the images that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | mediatek: Makefile: Drop explicit targets built by binmanSimon Glass2020-07-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mediatek various files that need to be created by binman. It does not make sense to enumerate these in the Makefile. They are described in the configuration (devicetree) for each board and we can simply run binman (always) to generate them. This avoid sprinkling the Makefile with arch-specific code. Also update the binman definition so that idbloader.img is only needed when SPL is actually being used. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Enable building a SPI ROM image on bobSimon Glass2020-07-283-1/+32
| | | | | | | | | | | | | | | | | | | | | Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for bob. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | rockchip: Enable building a SPI ROM image on jerrySimon Glass2020-07-282-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot produces a ROM for jerry. Change the binman image definition to support multiple images, since it may be used to build both u-boot-rockchip.bin and u-boot.rom Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-stmTom Rini2020-07-2921-174/+1557
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix SPL boot issue due to early dbgmcu_init() call - fix SPL boot issue due to dcache memory region configuration - add support of CONFIG_ENV_IS_IN_MMC - add specific SD/eMMC partition for U-Boot enviromnent - enable env in SPL - use "env info -q" to remove log during boot - remove env location override for dh_stm32mp1 - update management of misc_read - check result of find_mmc_device in stm32prog - use regulator_set_enable_if_allowed for disabling vdd supply in usbphyc - enable CMD_ADTIMG flag to handle Android images - device tree alignment with Linux Kernel v5.8-rc1 - remove hnp-srp-disable for usbotg on dk1 - add reset support to uart nodes on stm32mp15x - use correct weak function name spl_board_prepare_for_linux - use cd-gpios for ST and DHSOM boards - add seeed studio odyssey-stm32mp157c board support - move ethernet PHY into SoM DT - add DHSOM based DRC02 board support
| * | | ARM: dts: stm32: Add DHSOM based DRC02 boardMarek Vasut2020-07-283-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | ARM: dts: stm32: Move ethernet PHY into SoM DTMarek Vasut2020-07-282-69/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY and the VIO regulator is populated on the SoM, move it into the SoM DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | ARM: dts: stm32: add seeed studio odyssey-stm32mp157c boardMarcin Sloniewski2020-07-285-0/+709
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds device tree files supporting SBC from Seeed Studio based on STM32MP157C. This works with generic stm32mp1 config. Right now only booting from SD card is supported. Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | Revert "ARM: dts: stm32: Reinstate card detect behavior on ST boards"Patrick Delaunay2020-07-282-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit f13ff88b61c3 ("gpio: stm32: add ops set_dir_flags") the gpio flags are supported by stm32 pinctrl driver. The cd-gpios is correctly handle in U-Boot and the patch on the device tree can be removed. This reverts commit 792919241b3d750cd5295dfe6dd1d0958b9be468. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | Revert "ARM: dts: stm32: Reinstate card detect behavior on DHSOM"Patrick Delaunay2020-07-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit f13ff88b61c3 ("gpio: stm32: add ops set_dir_flags") the gpio flags are supported by stm32 pinctrl driver. The cd-gpios is correctly handle in U-Boot and the patch on the device tree can be removed. This reverts commit 3c2e2a1a79608c5e046313a8c47586d9a734e2a3. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32: add reset support to uart nodes on stm32mp15xPatrick Delaunay2020-07-281-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STM32 serial IP can be reset via reset controller. Add the support of reset to uart nodes on stm32mp15-u-boot.dtsi, the ad-dons file for U-Boot. This patch fix issues when previous UART configuration, for example done in TF-A or ROM code, is not handled in U-Boot stm32 serial driver init. This reset property won't be not added in Linux kernel device tree as this reset is not used in Linux STM32 serial driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32mp: remove hnp-srp-disable for usbotg on dk1Patrick Delaunay2020-07-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove hnp-srp-disable for usbotg node because this feature is only needed for usbotg in HOST mode (in drivers/usb/host/dwc2.c) and this feature is not activated in stm32mp15 U-Boot (stm32mp15_basic_defconfig and stm32mp15_trusted_defconfig); only the device mode is activated and OTG is not supported in DWC2 driver. This patch reduces the difference between U-Boot and Linux kernel device-tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: stm32mp1: DT alignment with Linux kernel v5.8-rc1Patrick Delaunay2020-07-288-94/+577
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DT alignment with Linux kernel v5.8-rc1 for the STM32MP15x soc device tree files and the STMicroelectronics boards device tree files. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | ARM: dts: rename stm32mp15xx-avenger96 ethernet0_rgmii_pinsPatrick Delaunay2020-07-282-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alignment with pins name used in Linux kernel v5.8. It is a preleminary step for device tree alignment. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | | stm32mp1: use a specific SD/eMMC partition for U-Boot enviromnentPatrick Delaunay2020-07-282-0/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Save the environment at the end of the U-Boot partition, the GPT partition named "ssbl" in SD card or eMMC and avoid requirements on the "bootfs" file system generated via specific raw tools (like wic and genimage). With the previous configuration of the U-Boot environment saved in ext4 file, U-Boot need to create/modify the file uenv.txt in the ext4 file system; so this EXT4 file system need to be generated without some functionality, like metadata_csum and dir_index, because they are not supported by U-Boot. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | | board: ns3: define ddr memory layoutRayagonda Kokatanur2020-07-291-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add both DRAM banks memory information and the corresponding MMU page table mappings. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: ns3: add support for Broadcom Northstar 3Rayagonda Kokatanur2020-07-293-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | board: mediatek: Add support for UniElec U7623 boardDavid Woodhouse2020-07-292-0/+212
| | | | | | | | | | | | | | | | | | | | | | | | This is an MT7623A-based board, very similar to the Banana Pi R2. http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | | arm: add support for SoC s5p4418 (cpu) / nanopi2 boardStefan Bosch2020-07-294-0/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/. Appropriate line in Makefile removed. - cpu.c: '#include <cpu_func.h>' added. - arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required anylonger. - "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead of drivers/pwm/pwm-nexell.c. - s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"' removed, is not necessary, error at out-of-tree building. '#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added DM_VIDEO support. - board/s5p4418/ renamed to board/friendlyarm/ - All s5p4418-boards except nanopi2 removed because there is no possibility to test the other boards. - Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi), e.g. "config ..." entries moved from/to other Kconfig. - "CONFIG_" removed from several s5p4418/nanopi2 specific defines because the appropriate values do not need to be configurable. - nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv() renamed to env_get(), env_get_ulong(), env_set() and env_save(), respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore appropriate code removed (not necessary for DT-kernels). - nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is already defined in lib/crc8.c (with different parameters). - dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and i2c1 added. gmac-, ehci- and dwc2otg-entries removed because the appropriate functionality is not supported yet. New mmc-property "mmcboost" added. s5p4418-pinctrl.dtsi: gmac-entries removed, mmc- and i2c-entries added. - '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where possible (and similar). Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
* | | arm: Add support for Qualcomm IPQ40xx familyRobert Marko2020-07-291-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces initial support for the popular Qualcomm IPQ40x8 and IPQ40x9 WiSoC series. IPQ40xx series have 4x Cortex A7 ARM-v7A cores. Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029. IPQ40x8 and IPQ40x9 use the same cores, but differ in addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8) and supported peripherals (IPQ40x8 lacks RGMII, LCD controller and EMMC/SDHCI controllers). IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only by their rated temperatures rates with IPQ402X models being rated for wider temperature ranges. Initially this supports: * Simple clock driver (Only for UART1 now, will be extended) * Pinctrl driver (Supports UARTX and GPIO now, will be extended) * GPIOs already supported by msm_gpio driver with updates * UARTs already supported by serial_msm driver with updates Further peripherals will come in later patches. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* | | arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629MarkLee2020-07-281-6/+8
|/ / | | | | | | | | | | | | This patch enable sgmii mode and mt7531 switch support in mt7629 ethernet dts node Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini2020-07-274-6/+219
|\ \ | | | | | | | | | | | | | | | | | | | | | - Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a - lx2-watchdog support - layerscape: pci-endpoint support, spin table relocation fixes and cleanups - fsl-crypto: RNG support and bug fixes
| * | arm: dts: ls1028a: Add dspi flash device node to qdsZhao Qiang2020-07-271-0/+74
| | | | | | | | | | | | | | | | | | | | | Add dspi flash device node to fsl-ls1028a-qds.dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm64: lx2160a: dts: Add watchdog nodeZhao Qiang2020-07-271-0/+7
| | | | | | | | | | | | | | | | | | | | | Add watchdog node which is sbsa into lx2160a dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | armv8: dts: ls1046a: Add the PCIe EP nodeXiaowei Bao2020-07-271-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | Add the PCIe EP node for ls1046a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | arm: dts: lx2160a: Increase configuration window sizeWasim Khan2020-07-271-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lx2160a rev2 requires 4KB space for type0 and 4KB space for type1 iATU window. Increase configuration size to 8KB to have sufficient space for type0 and type1 window. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | armv8: dts: fsl-lx2160a: add flash node under dspi to qds dtsZhao Qiang2020-07-271-0/+99
| |/ | | | | | | | | | | | | Add flash node under dspi into fsl-lx2160a-qds.dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | Merge tag 'dm-pull-20jul20-take2a' of ↵Tom Rini2020-07-274-0/+18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
| * | arm: dts: k3-j721e-mcu-wakeup: Introduce chipid nodeDave Gerlach2020-07-252-0/+9
| | | | | | | | | | | | | | | | | | | | | Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3 SoCs. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * | arm: dts: k3-am65-wakeup: Introduce chipid nodeDave Gerlach2020-07-252-0/+9
| |/ | | | | | | | | | | | | Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3 SoCs. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>