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author | Luka Kovacic <luka.kovacic@sartura.hr> | 2020-07-23 10:56:38 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2020-08-06 14:12:14 +0200 |
commit | 537eaf4ea77efb643615cf9a7e9b33578c171e35 (patch) | |
tree | 94f8c5848f4ed1f88a0d0438a456467d0b24ce33 /arch/arm/dts | |
parent | d4cc179fcd364f534149c80f2b9a95797fca90a1 (diff) | |
download | u-boot-537eaf4ea77efb643615cf9a7e9b33578c171e35.tar.gz u-boot-537eaf4ea77efb643615cf9a7e9b33578c171e35.tar.xz u-boot-537eaf4ea77efb643615cf9a7e9b33578c171e35.zip |
arm: mvebu: Add CRS328-4C-20S-4S board
MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit board variant has a
bigger Macronix flash.
Add basic U-Boot, UART and SPI flash support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r-- | arch/arm/dts/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts | 43 | ||||
-rw-r--r-- | arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi | 13 | ||||
-rw-r--r-- | arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts | 17 | ||||
-rw-r--r-- | arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi | 110 |
5 files changed, 185 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1eba2b2041..8ecf63e988 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -222,6 +222,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-crs305-1g-4s-bit.dtb \ armada-xp-crs326-24g-2s.dtb \ armada-xp-crs326-24g-2s-bit.dtb \ + armada-xp-crs328-4c-20s-4s.dtb \ + armada-xp-crs328-4c-20s-4s-bit.dtb \ armada-xp-db-xc3-24g4xg.dtb \ armada-xp-gp.dtb \ armada-xp-maxbcm.dtb \ diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts b/arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts new file mode 100644 index 0000000000..d684c895ff --- /dev/null +++ b/arch/arm/dts/armada-xp-crs328-4c-20s-4s-bit.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board + * + * Copyright (C) 2020 Sartura Ltd. + * Author: Luka Kovacic <luka.kovacic@sartura.hr> + */ + +#include "armada-xp-crs328-4c-20s-4s.dtsi" + +/ { + model = "MikroTik CRS328-4C-20S-4S+ Bit"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + m25p,fast-read; + + partition@u-boot { + reg = <0x00000000 0x001f0000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x001f0000 0x00010000>; + label = "u-boot-env"; + }; + partition@ubi1 { + reg = <0x00200000 0x03f00000>; + label = "ubi1"; + }; + partition@ubi2 { + reg = <0x04100000 0x03f00000>; + label = "ubi2"; + }; + }; +}; diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi b/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi new file mode 100644 index 0000000000..8576a02730 --- /dev/null +++ b/arch/arm/dts/armada-xp-crs328-4c-20s-4s-u-boot.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&spi0 { + u-boot,dm-pre-reloc; + + spi-flash@0 { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts new file mode 100644 index 0000000000..665757f6e1 --- /dev/null +++ b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for MikroTik CRS328-4C-20S-4S+ board + * + * Copyright (C) 2020 Sartura Ltd. + * Author: Luka Kovacic <luka.kovacic@sartura.hr> + */ + +#include "armada-xp-crs328-4c-20s-4s.dtsi" + +/ { + model = "MikroTik CRS328-4C-20S-4S+"; +}; + +&spi0 { + status = "okay"; +}; diff --git a/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi new file mode 100644 index 0000000000..daff1af2a2 --- /dev/null +++ b/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for CRS328-4C-20S-4S+ board + * + * Copyright (C) 2016 Allied Telesis Labs + * Copyright (C) 2020 Sartura Ltd. + * + * Based on armada-xp-db.dts + * + * Note: this Device Tree assumes that the bootloader has remapped the + * internal registers to 0xf1000000 (instead of the default + * 0xd0000000). The 0xf1000000 is the default used by the recent, + * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier + * boards were delivered with an older version of the bootloader that + * left internal registers mapped at 0xd0000000. If you are in this + * situation, you should either update your bootloader (preferred + * solution) or the below Device Tree should be adjusted. + */ + +/dts-v1/; +#include "armada-xp-98dx3236.dtsi" +#include "armada-xp-crs328-4c-20s-4s-u-boot.dtsi" + +/ { + model = "CRS328-4C-20S-4S+"; + compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + aliases { + spi0 = &spi0; + }; + + memory { + device_type = "memory"; + reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ + }; +}; + +&L2 { + arm,parity-enable; + marvell,ecc-enable; +}; + +&devbus_bootcs { + status = "okay"; + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <16>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <100000>; + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + m25p,fast-read; + + partition@u-boot { + reg = <0x00000000 0x001f0000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x001f0000 0x00010000>; + label = "u-boot-env"; + }; + partition@ubi1 { + reg = <0x00200000 0x00e00000>; + label = "ubi1"; + }; + }; +}; |