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| * ARM: omap3logic: Remove legacy USB code in favor of DM_USBAdam Ford2018-12-121-61/+0
| | | | | | | | | | | | | | With the defconfig options enabling DM_USB, the legacy code can be removed. Signed-off-by: Adam Ford <aford173@gmail.com>
| * ARM: omap3_logic/omap35_logic: Move to DM_USBAdam Ford2018-12-124-36/+16
| | | | | | | | | | | | | | | | | | The existing config is setup as a gadget but it doesn't use DM_USB. This patch converts all boards to DM_USB, but as host. As host, it is able to mount USB drives and browse them. Signed-off-by: Adam Ford <aford173@gmail.com>
| * arm: am335x-pdu001: Move from embedded to separate DTBFelix Brack2018-12-122-1/+2
| | | | | | | | | | | | | | There is no need for an embedded device tree for this board so let the build process generate a separate u-boot.dtb file instead. Signed-off-by: Felix Brack <fb@ltec.ch>
| * spl: fix build failure with !CONFIG_SPL_PCI_SUPPORTSekhar Nori2018-12-127-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but CONFIG_SPL_PCI_SUPPORT disabled, results in following linker error: lib/built-in.o: In function `fdtdec_get_pci_bar32': lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32' fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32' This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c while SPL build does not descend into drivers/pci directory in drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled. Fix this by applying appropriate #define guards in lib/fdtdec.c. It looks like ns16550.c has the same problem, so fixed that too. To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI (enables use of CONFIG_IS_ENABLED() macro). Suggested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * defconfigs: am335x_hs_evm: Sync HS and non-HS defconfigsAndrew F. Davis2018-12-122-7/+14
| | | | | | | | | | | | | | Sync new additions to non-HS defconfig with HS defconfig. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * fdt: Add warning about CONFIG_OF_EMBEDSimon Glass2018-12-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | This option has crept into use with some boards. Add a warning to try to prevent this. As an example: https://lists.denx.de/pipermail/u-boot/2017-September/304966.html Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * blk: Rework guard around part_init callTom Rini2018-12-128-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function part_init() will only be built when we have both CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set. Protect the call to this function with both of these tests now. Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Vanessa Maegima <vanessa.maegima@nxp.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Adam Ford <aford173@gmail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * test: hexdump: fix misplaced returnSimon Goldschmidt2018-12-121-2/+2
| | | | | | | | | | | | | | | | | | | | One of the hexdump tests in test/lib/hexdump.c returns right at the start of the function without testing anything. Fix this by moving the 'return 0;' statement to the end of the function. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * qemu-arm: Add persistent environment supportSumit Garg2018-12-124-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently on qemu-arm platforms environment is kept in RAM. Instead use pflash device 1 to provide persistent environment support across device reset. Also (optionally) provide support for persistent environment across qemu machine OFF/ON using following instructions: - Create envstore.img using qemu-img: qemu-img create -f raw envstore.img 64M - Add a pflash drive parameter to the command line: -drive if=pflash,format=raw,index=1,file=envstore.img Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
| * qemu-arm: Enable VirtIO distro targetSumit Garg2018-12-121-0/+1
| | | | | | | | | | | | | | | | With -device virtio-blk-device,drive=hd0, it could detect distro boot target. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Alexander Graf <agraf@suse.de>
| * ARM: davinci: Orphan Spectrum Digital AM18xx EVMAdam Ford2018-12-111-2/+5
|/ | | | | | | | | | | | | I had requested the da850 boards because their previous maintainer had an invalid e-mail address. I work at Logic PD who makes the da850-evm kits, so I have access to various boards of theirs. The Spectrum Digital AM18xx board is based on the Logic PD da850 EVM, but it's not the same company. Since I don't have the hardware to test/verify changes, I would prefer to not be responsible for this board. Signed-off-by: Adam Ford <aford173@gmail.com>
* travis: Add check for configs without MAINTAINERS entriesTom Rini2018-12-101-0/+4
| | | | | | | | The genboardscfg.py script will emit a WARNING message if we have new defconfig files that are not listed in a MAINTAINERS file. Make new cases of this a failure we catch in Travis-CI. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-12-10112-520/+4081
|\ | | | | | | | | | | | | | | Add TFA boot flow for some Layerscape platforms Add support for lx2160a SoC [trini: Add a bunch of missing MAINTAINERS entries] Signed-off-by: Tom Rini <trini@konsulko.com>
| * armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain2018-12-0616-10/+644
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8:fsl-layerscape: Add support for Chassis 3.2Priyanka Jain2018-12-065-5/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | NXP layerscape architecture Chassis 3.2 builds upon chassis3 architecture with changes like DDR Memory map change, removal of IFC and support of upto 8 I2C controller. Patch add README.lsch3_2 and the above changes under macro CONFIG_NXP_LSCH3_2. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board/freescale/vid: Add vdd table for NXP LX2160A SoCPriyanka Jain2018-12-061-0/+37
| | | | | | | | | | Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: lsch3: Add support of serdes3 modulePriyanka Jain2018-12-063-0/+76
| | | | | | | | | | | | | | | | | | Some lsch3 based SoCs like lx2160a contains three serdes modules. Add support for third serdes protocol in lsch3 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board/freescale/vid: Add correction for ltc3882 read error.Priyanka Jain2018-12-061-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Voltage regulator LTC3882 device has 0.5% voltage read error. So for NXP SoC devices this generally equates to 2mV Update set_voltage_to_LTC for below: 1.Add coorection of upto 2mV in voltage comparison to take care of voltage read error of voltage regulator 2.Add loop max count kept as 100 to avoid infinte loop. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * ls1088a: Move CONFIG_FSL_QSPI to defconfigAshish Kumar2018-12-069-2/+7
| | | | | | | | | | | | Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1088ardb_pb: Add support for board detectionPramod Kumar2018-12-062-3/+27
| | | | | | | | | | | | | | | | ls1088ardb-pb and ls1088ardb both boards are ls1088a based soc, board type detection is dynamic at boot time Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1021a: Add timer_init() in board_init_f for SPLAlison Wang2018-12-062-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C is used to access DDR SPD in the DDR initialization for SPL. In i2c_write process, get_timer() will be called. In board_init_f for SPL, timer_init() is not called before. The system counter is not enabled and the counter frequency is not set to 12.5MHz in SPL. The parameters for do_div() are zero too. It could not be found until CONFIG_USE_PRIVATE_LIBGCC is enabled in default. When CONFIG_USE_PRIVATE_LIBGCC is enabled, U-Boot will use its own set of libgcc functions. As the parameters for do_div() are zero, __div0 will be called. Then the processor will stay in an endless loop after calling hang(). This patch will add timer_init() in board_init_f for SPL and fix a series of issues it caused. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls2080a: enable DM support for sataPeng Ma2018-12-062-2/+6
| | | | | | | | | | | | | | | | | | Enable related configs to support sata DM feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> [YS: moveconfig -s -d] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: dts: fsl-ls2080a: add sata node supportPeng Ma2018-12-063-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | One ls2080a, there is one SATA 3.0 advanced host controller interface which is a high-performance SATA solution that delivers comprehensive and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in accordance with the serial ATA revision 3.0 of Serial ATA International Organization. Add sata node to support this feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * scsi: ceva: add ls2080a soc supportPeng Ma2018-12-061-0/+4
| | | | | | | | | | | | | | | | | | Add ahci compatible support for ls2080a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Acked-by: Michal Simek <michal.simek@xilinx.com> [YS: add fallthrough comment] Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls1088a: enable DM support for sataPeng Ma2018-12-062-1/+6
| | | | | | | | | | | | | | | | | | Enable related configs to support sata DM feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> [YS: moveconfig.py -s -d] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: dts: fsl-ls1088a: add sata node supportPeng Ma2018-12-063-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | One ls1088a, there is one SATA 3.0 advanced host controller interface which is a high-performance SATA solution that delivers comprehensive and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in accordance with the serial ATA revision 3.0 of Serial ATA International Organization. Add sata node to support this feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * scsi: ceva: add ls1088a soc supportPeng Ma2018-12-061-4/+18
| | | | | | | | | | | | | | | | Add ahci compatible support for ls1088a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls1046aqds: enable DM support for sataPeng Ma2018-12-061-1/+3
| | | | | | | | | | | | | | | | Enable related configs to support sata DM feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> [YS: moveconfig.py -s -d] Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls1046ardb: enable DM support for sataPeng Ma2018-12-061-1/+3
| | | | | | | | | | | | | | | | Enable related configs to support sata DM feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> [YS: moveconfig.py -s -d] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: dts: fsl-ls1046a: add sata node supportPeng Ma2018-12-063-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | One ls1046a, there is one SATA 3.0 advanced host controller interface which is a high-performance SATA solution that delivers comprehensive and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in accordance with the serial ATA revision 3.0 of Serial ATA International Organization. Add sata node to support this feature. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * scsi: ceva: add ls1046a soc supportPeng Ma2018-12-061-0/+3
| | | | | | | | | | | | | | Add ahci compatible support for ls1046a soc. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012afrx: Add TFABOOT supportRajesh Bhagat2018-12-069-1/+251
| | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1012a2g5rdb/ls1012afrdm/ls1012afrwy_tfa_defconfig to be loaded by trusted firmware - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: remove unnecessary braces] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012aqds: Add TFABOOT supportRajesh Bhagat2018-12-064-3/+144
| | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1012aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012aqds: fix secure boot compilationRajesh Bhagat2018-12-063-0/+17
| | | | | | | | | | | | | | | | Includes environment.h file in ls1012aqds.c Also, enables pfe validation Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012ardb: Add TFABOOT supportRajesh Bhagat2018-12-067-2/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1012ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT - enable PFE validation for secure boot Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043aqds: Add TFABOOT supportRajesh Bhagat2018-12-066-3/+327
| | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1043aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: Add TFABOOT supportRajesh Bhagat2018-12-067-1/+288
| | | | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1043ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN and QE address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046aqds: Add TFABOOT supportRajesh Bhagat2018-12-066-3/+347
| | | | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1046aqds_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046ardb: Add TFABOOT supportRajesh Bhagat2018-12-066-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | TFABOOT support includes: - ls1046ardb_tfa_defconfig to be loaded by trusted firmware - environment address and size changes for TFABOOT - FMAN address changes for TFABOOT - define BOOTCOMMAND for TFABOOT Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * armv8: fsl-layerscape: add support of MC framework for TFAPankit Garg2018-12-061-1/+52
| | | | | | | | | | | | | | | | | | Add support of MC framework for TFA Make MC framework independent of boot source. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers: qe: add TFABOOT supportRajesh Bhagat2018-12-061-3/+79
| | | | | | | | | | | | | | | | | | | | Adds TFABOOT support and allows to pick QE firmware on basis of boot source. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: remove line continuation in quoted string] Reviewed-by: York Sun <york.sun@nxp.com>
| * net: fm: add TFABOOT supportRajesh Bhagat2018-12-061-3/+100
| | | | | | | | | | | | | | | | | | | | Adds TFABOOT support and allows to pick FMAN firmware on basis of boot source. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: sec_firmware: return job ring status as true in TFABOOTPankit Garg2018-12-061-0/+4
| | | | | | | | | | | | | | | | | | Returns job ring status as true in TFABOOT, as one job ring is always reserved. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: sec_firmware: change el2_to_aarch32 SMC IDRajesh Bhagat2018-12-061-1/+1
| | | | | | | | | | | | | | | | Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17, it is applicable to both TFA and non-TFA boot. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Update parsing boot sourceYork Sun2018-12-062-4/+23
| | | | | | | | | | | | | | | | | | | | | | Workaround of erratum A010539 clears the RCW source field in PORSR1 register, causing failure of detecting boot source using this method. Use SMC call if U-Boot runs at EL2. If SMC is not implemented or running at EL3, continue to read PORSR1 and presume QSPI as boot source if erratum workaround A010539 is enabled and RCW source is cleared. Signed-off-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: skip OCRAM init for TFABOOTRajesh Bhagat2018-12-061-1/+2
| | | | | | | | | | | | | | | | OCRAM initialization is performed by TFA, Hence skipped from u-boot. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: add SMC calls for DDR size and bank infoRajesh Bhagat2018-12-062-0/+88
| | | | | | | | | | | | | | | | Adds SMC calls for getting DDR size and bank info for TFABOOT. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: bootcmd identification for TFABOOTPankit Garg2018-12-062-0/+91
| | | | | | | | | | | | | | | | | | | | Adds bootcmd identificaton on basis on boot source, valid in TFABOOT configuration. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> [YS: remove unnecessary braces] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: remove EL3 specific erratas for TFABOOTRajesh Bhagat2018-12-061-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | Removes EL3 specific erratas for TFABOOT, And now taken care in TFA. ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511, SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: identify boot source from PORSR registerRajesh Bhagat2018-12-064-0/+275
| | | | | | | | | | | | | | | | | | | | | | | | PORSR register holds the cfg_rcw_src field which can be used to identify boot source. Further, it can be used to select the environment location. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [YS: fix multiple checkpatch issues] Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit (git 2.34.1) at 2024-11-19 15:24:50 +0000