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author | Peng Ma <peng.ma@nxp.com> | 2018-10-22 10:39:49 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2018-12-06 14:37:19 -0800 |
commit | aaaffe9050b34c2a70ac9031b7157bf2ef7c7007 (patch) | |
tree | 0b84170b5ae6e81a50eba439bea80d7460021680 | |
parent | 39105100120f489b2a414c93ed79033aa48d2734 (diff) | |
download | u-boot-aaaffe9050b34c2a70ac9031b7157bf2ef7c7007.tar.gz u-boot-aaaffe9050b34c2a70ac9031b7157bf2ef7c7007.tar.xz u-boot-aaaffe9050b34c2a70ac9031b7157bf2ef7c7007.zip |
scsi: ceva: add ls1088a soc support
Add ahci compatible support for ls1088a soc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
-rw-r--r-- | drivers/ata/sata_ceva.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index a2d21d9f23..fa8679709e 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -82,15 +82,19 @@ #define CEVA_AXICC_CFG 0x3fffffff /* for ls1021a */ -#define LS1021_AHCI_VEND_AXICC 0xC0 +#define LS1021_AHCI_VEND_AXICC 0xC0 #define LS1021_CEVA_PHY2_CFG 0x28183414 #define LS1021_CEVA_PHY3_CFG 0x0e080e06 #define LS1021_CEVA_PHY4_CFG 0x064a080b #define LS1021_CEVA_PHY5_CFG 0x2aa86470 +/* for ls1088a */ +#define LS1088_ECC_DIS_ADDR_CH2 0x100520 +#define LS1088_ECC_DIS_VAL_CH2 0x40000000 + /* ecc addr-val pair */ -#define ECC_DIS_ADDR_CH2 0x80000000 -#define ECC_DIS_VAL_CH2 0x20140520 +#define ECC_DIS_ADDR_CH2 0x20140520 +#define ECC_DIS_VAL_CH2 0x80000000 #define SATA_ECC_REG_ADDR 0x20220520 #define SATA_ECC_DISABLE 0x00020000 @@ -100,6 +104,7 @@ enum ceva_soc { CEVA_LS1021A, CEVA_LS1043A, CEVA_LS1046A, + CEVA_LS1088A, }; struct ceva_sata_priv { @@ -140,7 +145,15 @@ static int ceva_init_sata(struct ceva_sata_priv *priv) case CEVA_LS1012A: case CEVA_LS1043A: case CEVA_LS1046A: - writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2); + writel(ECC_DIS_VAL_CH2, ECC_DIS_ADDR_CH2); + writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); + writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); + if (priv->flag & FLAG_COHERENT) + writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC); + break; + + case CEVA_LS1088A: + writel(LS1088_ECC_DIS_VAL_CH2, LS1088_ECC_DIS_ADDR_CH2); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC); if (priv->flag & FLAG_COHERENT) @@ -173,6 +186,7 @@ static const struct udevice_id sata_ceva_ids[] = { { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A }, { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A }, { .compatible = "fsl,ls1046a-ahci", .data = CEVA_LS1046A }, + { .compatible = "fsl,ls1088a-ahci", .data = CEVA_LS1088A }, { } }; |