Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

	cpu/arm920t/ep93xx/timer.c

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

38 files changed, 242 insertions, 307 deletions

diff --git a/include/asm-arm/arch-a320/a320.h b/include/asm-arm/arch-a320/a320.h
index 5c0a097507..fbd1583f50 100644
--- a/include/asm-arm/arch-a320/a320.h
+++ b/include/asm-arm/arch-a320/a320.h
@@ -32,4 +32,3 @@
 #define CONFIG_FTRTC010_BASE	0x98600000	/* Real Time Clock*/
 
 #endif	/* __A320_H */
-
diff --git a/include/asm-arm/arch-at91/at91_matrix.h b/include/asm-arm/arch-at91/at91_matrix.h
index 9b3c110f52..981ec2029c 100644
--- a/include/asm-arm/arch-at91/at91_matrix.h
+++ b/include/asm-arm/arch-at91/at91_matrix.h
@@ -80,7 +80,7 @@ typedef struct at91_matrix {
 	u32		mrcr;		/* 0x100 Master Remap Control */
 	u32		reserve4[3];
 #if	defined(CONFIG_AT91SAM9G45)
-	u32		ccr[52]		/* 0x110 - 0x1E0 Chip Configuration */
+	u32		ccr[52];	/* 0x110 - 0x1E0 Chip Configuration */
 	u32		womr;		/* 0x1E4 Write Protect Mode  */
 	u32		wpsr;		/* 0x1E8 Write Protect Status */
 	u32		resg45_1[10];
diff --git a/include/asm-arm/arch-spear/spr_gpt.h b/include/asm-arm/arch-spear/spr_gpt.h
index 965b5abb9a..965b5abb9a 100755..100644
--- a/include/asm-arm/arch-spear/spr_gpt.h
+++ b/include/asm-arm/arch-spear/spr_gpt.h
diff --git a/include/asm-arm/arch-spear/spr_i2c.h b/include/asm-arm/arch-spear/spr_i2c.h
index 7521ebc6cf..7521ebc6cf 100755..100644
--- a/include/asm-arm/arch-spear/spr_i2c.h
+++ b/include/asm-arm/arch-spear/spr_i2c.h
diff --git a/include/asm-arm/arch-spear/spr_smi.h b/include/asm-arm/arch-spear/spr_smi.h
index 06df74557f..06df74557f 100755..100644
--- a/include/asm-arm/arch-spear/spr_smi.h
+++ b/include/asm-arm/arch-spear/spr_smi.h
diff --git a/include/asm-arm/arch-spear/spr_xloader_table.h b/include/asm-arm/arch-spear/spr_xloader_table.h
index 7e3da18578..7e3da18578 100755..100644
--- a/include/asm-arm/arch-spear/spr_xloader_table.h
+++ b/include/asm-arm/arch-spear/spr_xloader_table.h
diff --git a/include/asm-blackfin/unaligned.h b/include/asm-blackfin/unaligned.h
new file mode 100644
index 0000000000..6cecbbb211
--- /dev/null
+++ b/include/asm-blackfin/unaligned.h
@@ -0,0 +1 @@
+#include <asm-generic/unaligned.h>
diff --git a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h
new file mode 100644
index 0000000000..fd0255099a
--- /dev/null
+++ b/include/asm-generic/unaligned.h
@@ -0,0 +1,23 @@
+#ifndef _GENERIC_UNALIGNED_H
+#define _GENERIC_UNALIGNED_H
+
+#include <asm/byteorder.h>
+
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+/*
+ * Select endianness
+ */
+#if defined(__LITTLE_ENDIAN)
+#define get_unaligned	__get_unaligned_le
+#define put_unaligned	__put_unaligned_le
+#elif defined(__BIG_ENDIAN)
+#define get_unaligned	__get_unaligned_be
+#define put_unaligned	__put_unaligned_be
+#else
+#error invalid endian
+#endif
+
+#endif
diff --git a/include/asm-nios2/unaligned.h b/include/asm-nios2/unaligned.h
new file mode 100644
index 0000000000..779117c4bc
--- /dev/null
+++ b/include/asm-nios2/unaligned.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_NIOS2_UNALIGNED_H
+#define _ASM_NIOS2_UNALIGNED_H
+
+#include <asm-generic/unaligned.h>
+
+#endif /* _ASM_NIOS2_UNALIGNED_H */
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index 3f11918746..d3dd44e96d 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -152,9 +152,7 @@ typedef	struct	global_data {
     defined(CONFIG_SANDPOINT)
 	void *		console_addr;
 #endif
-#ifdef CONFIG_AMIGAONEG3SE
 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
-#endif
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	unsigned long	fb_base;	/* Base address of framebuffer memory	*/
 #endif
diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h
index 119065671a..addca2fe3a 100644
--- a/include/configs/FPS850L.h
+++ b/include/configs/FPS850L.h
@@ -437,4 +437,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h
index 73bcccc2ec..ec9000d9fc 100644
--- a/include/configs/FPS860L.h
+++ b/include/configs/FPS860L.h
@@ -439,4 +439,9 @@
 
 #define CONFIG_SCC1_ENET
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/HMI10.h b/include/configs/HMI10.h
index 88e1946b78..2747d8cce8 100644
--- a/include/configs/HMI10.h
+++ b/include/configs/HMI10.h
@@ -496,4 +496,9 @@
 #define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h
index 5dd72ffaf4..5724f45a8d 100644
--- a/include/configs/NSCU.h
+++ b/include/configs/NSCU.h
@@ -487,4 +487,9 @@
 #define CONFIG_FEC_ENET
 /* #define CONFIG_ETHPRIME		"FEC ETHERNET" */
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index f4509bd090..30a5a319bc 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -400,10 +400,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define CONFIG_OF_BOARD_SETUP		1
 #define CONFIG_OF_STDOUT_VIA_ALIAS	1
 
-/* new uImage format support */
-#define CONFIG_FIT		1
-#define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
-
 /* I2C */
 #define CONFIG_FSL_I2C		/* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C		/* I2C with hardware support */
diff --git a/include/configs/SL8245.h b/include/configs/SL8245.h
deleted file mode 100644
index 876d8828a2..0000000000
--- a/include/configs/SL8245.h
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * (C) Copyright 2001 - 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* ------------------------------------------------------------------------- */
-/*
- * Configuration settings for the SL8245 board.
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC824X		1
-#define CONFIG_MPC8245		1
-#define CONFIG_SL8245		1
-
-
-#define CONFIG_CONS_INDEX	1
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-#define CONFIG_BOOTDELAY	5
-
-#define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PCI
-
-
-/*
- * Miscellaneous configurable options
- */
-#undef CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt	*/
-#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
-
-/* Print Buffer Size
- */
-#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-#define CONFIG_SYS_LOAD_ADDR	0x00400000	/* Default load address		*/
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-
-#define CONFIG_SYS_FLASH_BASE0_PRELIM	0xFF800000	/* FLASH bank on RCS#0 */
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_FLASH_BASE0_PRELIM
-#define CONFIG_SYS_FLASH_BANKS		{ CONFIG_SYS_FLASH_BASE0_PRELIM }
-
-#define CONFIG_SYS_RESET_ADDRESS   0xFFF00100
-
-#define CONFIG_SYS_EUMB_ADDR	    0xFC000000
-
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN	    (256 << 10) /* Reserve 256 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN	    (128 << 10) /* Reserve 128 kB for malloc()	*/
-
-#define CONFIG_SYS_MEMTEST_START   0x00004000	/* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END	    0x02000000	/* 0 ... 32 MB in DRAM		*/
-
-	/* Maximum amount of RAM.
-	 */
-#define CONFIG_SYS_MAX_RAM_SIZE    0x10000000	/* 0 .. 256 MB of (S)DRAM */
-
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-#undef CONFIG_SYS_RAMBOOT
-#else
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-
-#define CONFIG_SYS_NS16550_REG_SIZE	1
-
-#define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
-
-#define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_EUMB_ADDR + 0x4500)
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area
- */
-
-#define CONFIG_SYS_GBL_DATA_SIZE      128
-#define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_END      0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- * For the detail description refer to the MPC8240 user's manual.
- */
-
-#define CONFIG_SYS_CLK_FREQ  66666666	/* external frequency to pll */
-#define CONFIG_SYS_HZ		     1000
-
-	/* Bit-field values for MCCR1.
-	 */
-#define CONFIG_SYS_ROMNAL	    0
-#define CONFIG_SYS_ROMFAL	    7
-#define CONFIG_SYS_BANK0_ROW       2
-
-	/* Bit-field values for MCCR2.
-	 */
-#define CONFIG_SYS_REFINT	    0x400	    /* Refresh interval	FIXME: was 0t430		*/
-
-	/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
-	 */
-#define CONFIG_SYS_BSTOPRE	    192
-
-	/* Bit-field values for MCCR3.
-	 */
-#define CONFIG_SYS_REFREC	    2	    /* Refresh to activate interval */
-
-	/* Bit-field values for MCCR4.
-	 */
-#define CONFIG_SYS_PRETOACT	    2	    /* Precharge to activate interval */
-#define CONFIG_SYS_ACTTOPRE	    5	    /* Activate to Precharge interval */
-#define CONFIG_SYS_ACTORW	    3       /* FIXME was 2 */
-#define CONFIG_SYS_SDMODE_CAS_LAT  3	    /* SDMODE CAS latancy */
-#define CONFIG_SYS_SDMODE_WRAP	    0	    /* SDMODE wrap type	*/
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
-#define CONFIG_SYS_EXTROM	    1
-#define CONFIG_SYS_REGDIMM	    0
-
-#define CONFIG_SYS_ODCR		0xff	/* configures line driver impedances,	*/
-					/* see 8245 book for bit definitions	*/
-#define CONFIG_SYS_PGMAX		0x32	/* how long the 8245 retains the	*/
-					/* currently accessed page in memory	*/
-					/* see 8245 book for details		*/
-
-/* Memory bank settings.
- * Only bits 20-29 are actually used from these vales to set the
- * start/end addresses. The upper two bits will always be 0, and the lower
- * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
- * address. Refer to the MPC8240 book.
- */
-
-#define CONFIG_SYS_BANK0_START	    0x00000000
-#define CONFIG_SYS_BANK0_END	    (CONFIG_SYS_MAX_RAM_SIZE - 1)
-#define CONFIG_SYS_BANK0_ENABLE    1
-#define CONFIG_SYS_BANK1_START	    0x3ff00000
-#define CONFIG_SYS_BANK1_END	    0x3fffffff
-#define CONFIG_SYS_BANK1_ENABLE    0
-#define CONFIG_SYS_BANK2_START	    0x3ff00000
-#define CONFIG_SYS_BANK2_END	    0x3fffffff
-#define CONFIG_SYS_BANK2_ENABLE    0
-#define CONFIG_SYS_BANK3_START	    0x3ff00000
-#define CONFIG_SYS_BANK3_END	    0x3fffffff
-#define CONFIG_SYS_BANK3_ENABLE    0
-#define CONFIG_SYS_BANK4_START	    0x3ff00000
-#define CONFIG_SYS_BANK4_END	    0x3fffffff
-#define CONFIG_SYS_BANK4_ENABLE    0
-#define CONFIG_SYS_BANK5_START	    0x3ff00000
-#define CONFIG_SYS_BANK5_END	    0x3fffffff
-#define CONFIG_SYS_BANK5_ENABLE    0
-#define CONFIG_SYS_BANK6_START	    0x3ff00000
-#define CONFIG_SYS_BANK6_END	    0x3fffffff
-#define CONFIG_SYS_BANK6_ENABLE    0
-#define CONFIG_SYS_BANK7_START	    0x3ff00000
-#define CONFIG_SYS_BANK7_END	    0x3fffffff
-#define CONFIG_SYS_BANK7_ENABLE    0
-
-#define CONFIG_SYS_IBAT0L  (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U  (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT1L  (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U  (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT2L  (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U  (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT3L  (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U  (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L  CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U  CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L  CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U  CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L  CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U  CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L  CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U  CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ	    (8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* Max number of flash banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	35	/* Max number of sectors per flash	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms) */
-
-
-	/* Warining: environment is not EMBEDDED in the U-Boot code.
-	 * It's stored in flash separately.
-	 */
-#define CONFIG_ENV_IS_IN_FLASH	    1
-#define CONFIG_ENV_ADDR		0xFFFF0000
-#define CONFIG_ENV_SIZE		0x00010000 /* Size of the Environment		*/
-#define CONFIG_ENV_SECT_SIZE	0x00010000 /* Size of the Environment Sector	*/
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_PCI
-#define CONFIG_PCI_PNP
-#undef  CONFIG_PCI_SCAN_SHOW
-
-
-#define CONFIG_SK98
-#define CONFIG_NET_MULTI
-
-
-#endif	/* __CONFIG_H */
diff --git a/include/configs/SM850.h b/include/configs/SM850.h
index 7266f9add1..56f03e2b88 100644
--- a/include/configs/SM850.h
+++ b/include/configs/SM850.h
@@ -372,4 +372,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TK885D.h b/include/configs/TK885D.h
index 1e6d9cebe0..0df1b6e042 100644
--- a/include/configs/TK885D.h
+++ b/include/configs/TK885D.h
@@ -516,4 +516,9 @@
 #define CONFIG_NET_RETRY_COUNT	3
 #define CONFIG_ETHPRIME		"FEC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h
index 966beaea16..372c76dcc8 100644
--- a/include/configs/TQM823L.h
+++ b/include/configs/TQM823L.h
@@ -490,4 +490,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h
index cfa693da18..64c97071d6 100644
--- a/include/configs/TQM823M.h
+++ b/include/configs/TQM823M.h
@@ -486,4 +486,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h
index dc0498e7d1..bf6ecce470 100644
--- a/include/configs/TQM850L.h
+++ b/include/configs/TQM850L.h
@@ -475,4 +475,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h
index cdabc53085..74424527b8 100644
--- a/include/configs/TQM850M.h
+++ b/include/configs/TQM850M.h
@@ -475,4 +475,9 @@
 #define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h
index 1255928fb5..32a7e79a4b 100644
--- a/include/configs/TQM855L.h
+++ b/include/configs/TQM855L.h
@@ -483,4 +483,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h
index 584d40be93..4f44be31bb 100644
--- a/include/configs/TQM855M.h
+++ b/include/configs/TQM855M.h
@@ -518,4 +518,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h
index a772a27bec..e86fe5ef96 100644
--- a/include/configs/TQM860L.h
+++ b/include/configs/TQM860L.h
@@ -482,4 +482,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT       1
+#define CONFIG_OF_BOARD_SETUP  1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h
index 7c347861f0..4fd873b1bd 100644
--- a/include/configs/TQM860M.h
+++ b/include/configs/TQM860M.h
@@ -486,4 +486,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h
index 75d2dacba6..0c966c9e0c 100644
--- a/include/configs/TQM862L.h
+++ b/include/configs/TQM862L.h
@@ -488,4 +488,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h
index 0c7aacdce6..178e6e2137 100644
--- a/include/configs/TQM862M.h
+++ b/include/configs/TQM862M.h
@@ -489,4 +489,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index 071afd4f3f..a65946deb2 100644
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -508,4 +508,9 @@
 #define CONFIG_FEC_ENET
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h
index d435819aaa..0fc4b69acf 100644
--- a/include/configs/TQM885D.h
+++ b/include/configs/TQM885D.h
@@ -508,4 +508,9 @@
 
 #define CONFIG_ETHPRIME		"SCC ETHERNET"
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h
index d9028fae3c..d0cb1e1d60 100644
--- a/include/configs/ipek01.h
+++ b/include/configs/ipek01.h
@@ -267,8 +267,6 @@
 /* End of used area in DPRAM */
 #define CONFIG_SYS_INIT_RAM_END		MPC5XXX_SRAM_SIZE
 
-
-
 /* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_SIZE	128
 
@@ -315,7 +313,6 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-
 #define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1...15 MB in DRAM */
 
diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h
index 0248abadc9..0248abadc9 100755..100644
--- a/include/configs/spear3xx.h
+++ b/include/configs/spear3xx.h
diff --git a/include/configs/spear6xx.h b/include/configs/spear6xx.h
index 2ad5beb82c..2ad5beb82c 100755..100644
--- a/include/configs/spear6xx.h
+++ b/include/configs/spear6xx.h
diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h
index f7813a1ff6..7046e6739d 100644
--- a/include/configs/virtlab2.h
+++ b/include/configs/virtlab2.h
@@ -491,4 +491,10 @@
 						OR_SCY_2_CLK)
 #define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_PERIPHERAL_BASE & BR_BA_MSK) | BR_PS_8 | BR_V)
 #define PCMCIA_CTRL (CONFIG_SYS_PERIPHERAL_BASE + 0xB00)
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_HWCONFIG		1
+
 #endif	/* __CONFIG_H */
diff --git a/include/nios2-yanu.h b/include/nios2-yanu.h
new file mode 100644
index 0000000000..1c9a967932
--- /dev/null
+++ b/include/nios2-yanu.h
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2006, Imagos S.a.s <www.imagos.it>
+ * Renato Andreola <renato.andreola@imagos.it>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*************************************************************************
+ * Altera NiosII YANU serial interface by Imagos
+ * please see  http://www.opencores.org/project,yanu for
+ * information/downloads
+ ************************************************************************/
+
+#ifndef __NIOS2_YANU_H__
+#define __NIOS2_YANU_H__
+
+#define YANU_MAX_PRESCALER_N   ((1 << 4) - 1)	/* 15 */
+#define YANU_MAX_PRESCALER_M   ((1 << 11) -1)	/* 2047 */
+#define YANU_FIFO_SIZE         (16)
+#define YANU_RXFIFO_SIZE       (YANU_FIFO_SIZE)
+#define YANU_TXFIFO_SIZE       (YANU_FIFO_SIZE)
+
+#define YANU_RXFIFO_DLY        (10*11)
+#define YANU_TXFIFO_THR        (10)
+#define YANU_DATA_CHAR_MASK    (0xFF)
+
+/* data register */
+#define YANU_DATA_OFFSET       (0)	/* data register offset */
+
+#define YANU_CONTROL_OFFSET    (4)	/* control register offset */
+/* interrupt enable */
+#define YANU_CONTROL_IE_RRDY   (1<<0)	/* ie on received character ready */
+#define YANU_CONTROL_IE_OE     (1<<1)	/* ie on rx overrun    */
+#define YANU_CONTROL_IE_BRK    (1<<2)	/* ie on break detect  */
+#define YANU_CONTROL_IE_FE     (1<<3)	/* ie on framing error */
+#define YANU_CONTROL_IE_PE     (1<<4)	/* ie on parity error  */
+#define YANU_CONTROL_IE_TRDY   (1<<5)	/* ie interrupt on tranmitter ready */
+/* control bits */
+#define YANU_CONTROL_BITS_POS  (6)	/* bits number pos */
+#define YANU_CONTROL_BITS      (1<<YANU_CONTROL_BITS_POS)	/* number of rx/tx bits per word. 3 bit unsigned integer */
+#define YANU_CONTROL_BITS_N    (3)	/* ... its bit filed length */
+#define YANU_CONTROL_PARENA    (1<<9)	/*  enable parity bit transmission/reception */
+#define YANU_CONTROL_PAREVEN   (1<<10)	/* parity even */
+#define YANU_CONTROL_STOPS     (1<<11)	/* number of stop bits */
+#define YANU_CONTROL_HHENA     (1<<12)	/* Harware Handshake enable... */
+#define YANU_CONTROL_FORCEBRK  (1<<13)	/* if set than txd = active (0) */
+/* tuning part */
+#define YANU_CONTROL_RDYDLY    (1<<14)	/* delay from "first" before setting rrdy (in bit) */
+#define YANU_CONTROL_RDYDLY_N  (8)	/* ... its bit filed length */
+#define YANU_CONTROL_TXTHR     (1<<22)	/* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */
+#define YANU_CONTROL_TXTHR_N   (4)	/* ... its bit field length */
+
+#define YANU_BAUD_OFFSET  (8)	/* baud register offset */
+#define YANU_BAUDM        (1<<0)	/* baud mantissa lsb */
+#define YANU_BAUDM_N      (12)	/* ...its bit filed length */
+#define YANU_BAUDE        (1<<12)	/* baud exponent lsb */
+#define YANU_BAUDE_N      (4)	/* ...its bit field length */
+
+#define YANU_ACTION_OFFSET   (12)	/* action register... write only */
+#define YANU_ACTION_RRRDY    (1<<0)	/* reset rrdy */
+#define YANU_ACTION_ROE      (1<<1)	/* reset oe */
+#define YANU_ACTION_RBRK     (1<<2)	/* reset brk */
+#define YANU_ACTION_RFE      (1<<3)	/* reset fe  */
+#define YANU_ACTION_RPE      (1<<4)	/* reset pe  */
+#define YANU_ACTION_SRRDY    (1<<5)	/* set rrdy  */
+#define YANU_ACTION_SOE      (1<<6)	/* set oe    */
+#define YANU_ACTION_SBRK     (1<<7)	/* set brk   */
+#define YANU_ACTION_SFE      (1<<8)	/* set fe    */
+#define YANU_ACTION_SPE      (1<<9)	/* set pe    */
+#define YANU_ACTION_RFIFO_PULL  (1<<10)	/* pull a char from rx fifo we MUST do it before taking a char */
+#define YANU_ACTION_RFIFO_CLEAR (1<<11)	/* clear rx fifo */
+#define YANU_ACTION_TFIFO_CLEAR (1<<12)	/* clear tx fifo */
+#define YANU_ACTION_RTRDY       (1<<13)	/* clear trdy    */
+#define YANU_ACTION_STRDY       (1<<14)	/* set trdy      */
+
+#define YANU_STATUS_OFFSET   (16)
+#define YANU_STATUS_RRDY     (1<<0)	/* rxrdy flag */
+#define YANU_STATUS_TRDY     (1<<1)	/* txrdy flag */
+#define YANU_STATUS_OE       (1<<2)	/* rx overrun error */
+#define YANU_STATUS_BRK      (1<<3)	/* rx break detect flag */
+#define YANU_STATUS_FE       (1<<4)	/* rx framing error flag */
+#define YANU_STATUS_PE       (1<<5)	/* rx parity erro flag */
+#define YANU_RFIFO_CHARS_POS (6)
+#define YANU_RFIFO_CHARS     (1<<RFIFO_CHAR_POS)	/* number of chars into rx fifo */
+#define YANU_RFIFO_CHARS_N   (5)	/* ...its bit field length: 32 chars */
+#define YANU_TFIFO_CHARS_POS (11)
+#define YANU_TFIFO_CHARS     (1<<TFIFO_CHAR_POS)	/* number of chars into tx fifo */
+#define YANU_TFIFO_CHARS_N   (5)	/* ...its bit field length: 32 chars */
+
+typedef volatile struct yanu_uart_t {
+	volatile unsigned data;
+	volatile unsigned control;	/* control register (RW) 32-bit   */
+	volatile unsigned baud;	/* baud/prescaler register (RW) 32-bit */
+	volatile unsigned action;	/* action register (W) 32-bit */
+	volatile unsigned status;	/* status register (R) 32-bit */
+	volatile unsigned magic;	/* magic register (R) 32-bit */
+} yanu_uart_t;
+
+#endif
diff --git a/include/pca9564.h b/include/pca9564.h
index 3e75259e09..b80d2e6210 100644
--- a/include/pca9564.h
+++ b/include/pca9564.h
@@ -47,4 +47,3 @@
 #define PCA_CON_CR          0x07 /* Clock Rate (MASK) */
 
 #endif
-
diff --git a/include/usb/musb_udc.h b/include/usb/musb_udc.h
index ef37dbbcc4..be808fd516 100644
--- a/include/usb/musb_udc.h
+++ b/include/usb/musb_udc.h
@@ -51,4 +51,3 @@ int udc_init(void);
 #endif /* CONFIG_USB_TTY */
 
 #endif /* __MUSB_UDC_H__ */
-
diff --git a/include/usb/spr_udc.h b/include/usb/spr_udc.h
index 2c332d5999..2c332d5999 100755..100644
--- a/include/usb/spr_udc.h
+++ b/include/usb/spr_udc.h