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| author | Michal Simek <michal.simek@xilinx.com> | 2020-03-31 12:39:37 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-04-27 13:57:17 +0200 |
| commit | 80fdef12b22ab70f9d83343016abcd3b50a87d7c (patch) | |
| tree | 1a68cd61505459368f30eed14640bbdf5004adf0 /board/xilinx/versal | |
| parent | b72f4505277369bb9d8013370d5f316aff49f596 (diff) | |
| download | u-boot-80fdef12b22ab70f9d83343016abcd3b50a87d7c.tar.gz u-boot-80fdef12b22ab70f9d83343016abcd3b50a87d7c.tar.xz u-boot-80fdef12b22ab70f9d83343016abcd3b50a87d7c.zip | |
xilinx: Introduce board_late_init_xilinx()
This function should keep common shared late configurations for Xilinx
SoCs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx/versal')
| -rw-r--r-- | board/xilinx/versal/board.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 75aedb0929..908ea87163 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -17,6 +17,7 @@ #include <dm/uclass.h> #include <versalpl.h> #include <linux/sizes.h> +#include "../common/board.h" DECLARE_GLOBAL_DATA_PTR; @@ -204,9 +205,7 @@ int board_late_init(void) initrd_hi = round_down(initrd_hi, SZ_16M); env_set_addr("initrd_high", (void *)initrd_hi); - env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); - - return 0; + return board_late_init_xilinx(); } int dram_init_banksize(void) |