From 80fdef12b22ab70f9d83343016abcd3b50a87d7c Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Tue, 31 Mar 2020 12:39:37 +0200
Subject: xilinx: Introduce board_late_init_xilinx()

This function should keep common shared late configurations for Xilinx
SoCs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 board/xilinx/versal/board.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

(limited to 'board/xilinx/versal')

diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 75aedb0929..908ea87163 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -17,6 +17,7 @@
 #include <dm/uclass.h>
 #include <versalpl.h>
 #include <linux/sizes.h>
+#include "../common/board.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -204,9 +205,7 @@ int board_late_init(void)
 	initrd_hi = round_down(initrd_hi, SZ_16M);
 	env_set_addr("initrd_high", (void *)initrd_hi);
 
-	env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
-
-	return 0;
+	return board_late_init_xilinx();
 }
 
 int dram_init_banksize(void)
-- 
cgit