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| author | Tom Rini <trini@konsulko.com> | 2021-01-05 16:20:26 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-05 16:20:26 -0500 |
| commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
| tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /board/freescale/p2041rdb/eth.c | |
| parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
| parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
| download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.gz u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.zip | |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/freescale/p2041rdb/eth.c')
| -rw-r--r-- | board/freescale/p2041rdb/eth.c | 29 |
1 files changed, 19 insertions, 10 deletions
diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c index 396981605d..23fd619cee 100644 --- a/board/freescale/p2041rdb/eth.c +++ b/board/freescale/p2041rdb/eth.c @@ -81,17 +81,21 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, { phy_interface_t intf = fm_info_get_enet_if(port); char phy[16]; + int lane; + u8 slot; + switch (intf) { /* The RGMII PHY is identified by the MAC connected to it */ - if (intf == PHY_INTERFACE_MODE_RGMII) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: sprintf(phy, "phy_rgmii_%u", port == FM1_DTSEC5 ? 0 : 1); fdt_set_phy_handle(fdt, compat, addr, phy); - } - + break; /* The SGMII PHY is identified by the MAC connected to it */ - if (intf == PHY_INTERFACE_MODE_SGMII) { - int lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + port); - u8 slot; + case PHY_INTERFACE_MODE_SGMII: + lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + port); if (lane < 0) return; slot = lane_to_slot[lane]; @@ -106,16 +110,18 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, + (port - FM1_DTSEC1)); fdt_set_phy_handle(fdt, compat, addr, phy); } - } - - if (intf == PHY_INTERFACE_MODE_XGMII) { + break; + case PHY_INTERFACE_MODE_XGMII: /* XAUI */ - int lane = serdes_get_first_lane(XAUI_FM1); + lane = serdes_get_first_lane(XAUI_FM1); if (lane >= 0) { /* The XAUI PHY is identified by the slot */ sprintf(phy, "phy_xgmii_%u", lane_to_slot[lane]); fdt_set_phy_handle(fdt, compat, addr, phy); } + break; + default: + break; } } #endif /* #ifdef CONFIG_FMAN_ENET */ @@ -169,6 +175,9 @@ int board_eth_init(struct bd_info *bis) fm_info_set_phy_address(i, riser_phy_addr[i]); break; case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: /* Only DTSEC4 and DTSEC5 can be routed to RGMII */ fm_info_set_phy_address(i, i == FM1_DTSEC5 ? CONFIG_SYS_FM1_DTSEC5_PHY_ADDR : |