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authorMingkai Hu <mingkai.hu@nxp.com>2016-09-07 18:47:28 +0800
committerYork Sun <york.sun@nxp.com>2016-09-14 14:11:00 -0700
commitdd02936f81de477680f27af244fd2085ce460152 (patch)
tree4aec975eec3c0b1db2d8a3e0889628ec52517967 /board/freescale/ls1046ardb/ddr.h
parent1b2b406636b5643466552fdb4821eff1a76d8acb (diff)
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armv8: ls1046ardb: Add LS1046ARDB board support
LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot SATA: * SerDes2 Lane3 to SATA port USB 3.0: one super speed USB 3.0 type A port one Micro-AB port UART: supports two UARTs up to 115200 bps for console Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1046ardb/ddr.h')
-rw-r--r--board/freescale/ls1046ardb/ddr.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h
new file mode 100644
index 0000000000..9e440f67b4
--- /dev/null
+++ b/board/freescale/ls1046ardb/ddr.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DDR_H__
+#define __DDR_H__
+
+void erratum_a008850_post(void);
+
+struct board_specific_parameters {
+ u32 n_ranks;
+ u32 datarate_mhz_high;
+ u32 rank_gb;
+ u32 clk_adjust;
+ u32 wrlvl_start;
+ u32 wrlvl_ctl_2;
+ u32 wrlvl_ctl_3;
+};
+
+/*
+ * These tables contain all valid speeds we want to override with board
+ * specific parameters. datarate_mhz_high values need to be in ascending order
+ * for each n_ranks group.
+ */
+static const struct board_specific_parameters udimm0[] = {
+ /*
+ * memory controller 0
+ * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
+ * ranks| mhz| GB |adjst| start | ctl2 | ctl3
+ */
+ {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
+ {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,},
+ {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,},
+ {2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,},
+ {}
+};
+
+static const struct board_specific_parameters *udimms[] = {
+ udimm0,
+};
+
+#endif