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| author | Shaohui Xie <Shaohui.Xie@nxp.com> | 2016-09-07 17:56:12 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:10:52 -0700 |
| commit | 1b2b406636b5643466552fdb4821eff1a76d8acb (patch) | |
| tree | d19b7db0e0f42ab0f00ffcacc4842a36f453ae6a /board/freescale/ls1046ardb/ddr.h | |
| parent | 5f5e8d92d56fb6d6bd792b067fe8931259d1b99a (diff) | |
| download | u-boot-1b2b406636b5643466552fdb4821eff1a76d8acb.tar.gz u-boot-1b2b406636b5643466552fdb4821eff1a76d8acb.tar.xz u-boot-1b2b406636b5643466552fdb4821eff1a76d8acb.zip | |
armv8: ls1046a: disable SATA ECC in DCSR
This is a workaround to fix SATA CRC error. Once the root cause
is found the ECC disabling will be removed.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1046ardb/ddr.h')
0 files changed, 0 insertions, 0 deletions