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| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:15 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:16 +0800 |
| commit | e40a6e3f104fc632a66553e29a7ea1d4500e6189 (patch) | |
| tree | dcc8a9facf2247dd012f03e8bdf87b2346249bd3 /arch/x86/dts/chromebook_link.dts | |
| parent | 5544757ce97c72119359eb47aa57d28e46fdf405 (diff) | |
| download | u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.tar.gz u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.tar.xz u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.zip | |
x86: ivybridge: Add a driver for the bd82x6x northbridge
Add a driver with an empty probe function where we can move init code in
follow-on patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/dts/chromebook_link.dts')
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index f2db8443d2..e2c722dd95 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -166,6 +166,13 @@ ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; + + northbridge@0,0 { + reg = <0x00000000 0 0 0 0>; + compatible = "intel,bd82x6x-northbridge"; + u-boot,dm-pre-reloc; + }; + sata { compatible = "intel,pantherpoint-ahci"; intel,sata-mode = "ahci"; |