diff options
| author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:15 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:08:16 +0800 |
| commit | e40a6e3f104fc632a66553e29a7ea1d4500e6189 (patch) | |
| tree | dcc8a9facf2247dd012f03e8bdf87b2346249bd3 /arch | |
| parent | 5544757ce97c72119359eb47aa57d28e46fdf405 (diff) | |
| download | u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.tar.gz u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.tar.xz u-boot-e40a6e3f104fc632a66553e29a7ea1d4500e6189.zip | |
x86: ivybridge: Add a driver for the bd82x6x northbridge
Add a driver with an empty probe function where we can move init code in
follow-on patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/ivybridge/early_init.c | 18 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 7 |
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/early_init.c b/arch/x86/cpu/ivybridge/early_init.c index 9ca008e345..945ae2dfcd 100644 --- a/arch/x86/cpu/ivybridge/early_init.c +++ b/arch/x86/cpu/ivybridge/early_init.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <dm.h> #include <asm/io.h> #include <asm/pci.h> #include <asm/arch/pch.h> @@ -145,3 +146,20 @@ void sandybridge_early_init(int chipset_type) sandybridge_setup_graphics(pch_dev, video_dev); } + +static int bd82x6x_northbridge_probe(struct udevice *dev) +{ + return 0; +} + +static const struct udevice_id bd82x6x_northbridge_ids[] = { + { .compatible = "intel,bd82x6x-northbridge" }, + { } +}; + +U_BOOT_DRIVER(bd82x6x_northbridge_drv) = { + .name = "bd82x6x_northbridge", + .id = UCLASS_NORTHBRIDGE, + .of_match = bd82x6x_northbridge_ids, + .probe = bd82x6x_northbridge_probe, +}; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index f2db8443d2..e2c722dd95 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -166,6 +166,13 @@ ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; + + northbridge@0,0 { + reg = <0x00000000 0 0 0 0>; + compatible = "intel,bd82x6x-northbridge"; + u-boot,dm-pre-reloc; + }; + sata { compatible = "intel,pantherpoint-ahci"; intel,sata-mode = "ahci"; |