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authorAmar Tumballi <amar@kadalu.io>2020-10-07 12:50:16 +0530
committerAmar Tumballi <amar@kadalu.io>2020-10-07 13:01:21 +0530
commitd1d7a6f35c816822fab51c820e25023863c239c1 (patch)
treef05de5dab7ff6a19e7123872ca9fdcd7d79120fe /extras/Solaris/checkinstall
parent085910d3b9cfb28f13b8c8e2d5bec7f08d17292d (diff)
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Contributing: update about who can trigger the buildHEADmaster
Currently only maintainers listed in github group can trigger the regression runs, it may change in future! Updates: #1000 Change-Id: I3b5f1cace8a433886d725539198998875dcdce36 Signed-off-by: Amar Tumballi <amar@kadalu.io>
Diffstat (limited to 'extras/Solaris/checkinstall')
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/*
 * (C) Copyright 2003
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * This file is based on mpc4200fec.h
 * (C) Copyright Motorola, Inc., 2000
 *
 * odin ethernet header file
 */

#ifndef __MPC5XXX_FEC_H
#define __MPC5XXX_FEC_H

typedef unsigned long uint32;
typedef unsigned short uint16;
typedef unsigned char uint8;

typedef struct ethernet_register_set {

/* [10:2]addr = 00 */

/*  Control and status Registers (offset 000-1FF) */

	volatile uint32 fec_id;			/* MBAR_ETH + 0x000 */
	volatile uint32 ievent;			/* MBAR_ETH + 0x004 */
	volatile uint32 imask;			/* MBAR_ETH + 0x008 */

	volatile uint32 RES0[1];		/* MBAR_ETH + 0x00C */
	volatile uint32 r_des_active;		/* MBAR_ETH + 0x010 */
	volatile uint32 x_des_active;		/* MBAR_ETH + 0x014 */
	volatile uint32 r_des_active_cl;	/* MBAR_ETH + 0x018 */
	volatile uint32 x_des_active_cl;	/* MBAR_ETH + 0x01C */
	volatile uint32 ivent_set;		/* MBAR_ETH + 0x020 */
	volatile uint32 ecntrl;			/* MBAR_ETH + 0x024 */

	volatile uint32 RES1[6];		/* MBAR_ETH + 0x028-03C */
	volatile uint32 mii_data;		/* MBAR_ETH + 0x040 */
	volatile uint32 mii_speed;		/* MBAR_ETH + 0x044 */
	volatile uint32 mii_status;		/* MBAR_ETH + 0x048 */

	volatile uint32 RES2[5];		/* MBAR_ETH + 0x04C-05C */
	volatile uint32 mib_data;		/* MBAR_ETH + 0x060 */
	volatile uint32 mib_control;		/* MBAR_ETH + 0x064 */

	volatile uint32 RES3[6];		/* MBAR_ETH + 0x068-7C */
	volatile uint32 r_activate;		/* MBAR_ETH + 0x080 */
	volatile uint32 r_cntrl;		/* MBAR_ETH + 0x084 */
	volatile uint32 r_hash;			/* MBAR_ETH + 0x088 */
	volatile uint32 r_data;			/* MBAR_ETH + 0x08C */
	volatile uint32 ar_done;		/* MBAR_ETH + 0x090 */
	volatile uint32 r_test;			/* MBAR_ETH + 0x094 */
	volatile uint32 r_mib;			/* MBAR_ETH + 0x098 */
	volatile uint32 r_da_low;		/* MBAR_ETH + 0x09C */
	volatile uint32 r_da_high;		/* MBAR_ETH + 0x0A0 */

	volatile uint32 RES4[7];		/* MBAR_ETH + 0x0A4-0BC */
	volatile uint32 x_activate;		/* MBAR_ETH + 0x0C0 */
	volatile uint32 x_cntrl;		/* MBAR_ETH + 0x0C4 */
	volatile uint32 backoff;		/* MBAR_ETH + 0x0C8 */
	volatile uint32 x_data;			/* MBAR_ETH + 0x0CC */
	volatile uint32 x_status;		/* MBAR_ETH + 0x0D0 */
	volatile uint32 x_mib;			/* MBAR_ETH + 0x0D4 */