diff options
Diffstat (limited to 'arm64-dts-marvell-armada-cp110-fix-hang.patch')
| -rw-r--r-- | arm64-dts-marvell-armada-cp110-fix-hang.patch | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arm64-dts-marvell-armada-cp110-fix-hang.patch b/arm64-dts-marvell-armada-cp110-fix-hang.patch new file mode 100644 index 000000000..3f55cd90d --- /dev/null +++ b/arm64-dts-marvell-armada-cp110-fix-hang.patch @@ -0,0 +1,70 @@ +From f43194c1447c9536efb0859c2f3f46f6bf2b9154 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier <maxime.chevallier@bootlin.com> +Date: Wed, 25 Apr 2018 20:19:47 +0200 +Subject: ARM64: dts: marvell: armada-cp110: Add mg_core_clk for ethernet node + +Marvell PPv2.2 controller present on CP-110 need the extra "mg_core_clk" +clock to avoid system hangs when powering some network interfaces up. + +This issue appeared after a recent clock rework on Armada 7K/8K platforms. + +This commit adds the new clock and updates the documentation accordingly. + +[gregory.clement: use the real first commit to fix and add the cc:stable +flag] +Fixes: e3af9f7c6ece ("RM64: dts: marvell: armada-cp110: Fix clock resources for various node") +Cc: <stable@vger.kernel.org> +Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> +Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> +--- + Documentation/devicetree/bindings/net/marvell-pp2.txt | 9 +++++---- + arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 5 +++-- + 2 files changed, 8 insertions(+), 6 deletions(-) + +diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt +index 1814fa1..fc019df 100644 +--- a/Documentation/devicetree/bindings/net/marvell-pp2.txt ++++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt +@@ -21,9 +21,10 @@ Required properties: + - main controller clock (for both armada-375-pp2 and armada-7k-pp2) + - GOP clock (for both armada-375-pp2 and armada-7k-pp2) + - MG clock (only for armada-7k-pp2) ++ - MG Core clock (only for armada-7k-pp2) + - AXI clock (only for armada-7k-pp2) +-- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk" +- and "axi_clk" (the 2 latter only for armada-7k-pp2). ++- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk", ++ "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2). + + The ethernet ports are represented by subnodes. At least one port is + required. +@@ -80,8 +81,8 @@ cpm_ethernet: ethernet@0 { + compatible = "marvell,armada-7k-pp22"; + reg = <0x0 0x100000>, <0x129000 0xb000>; + clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, +- <&cpm_syscon0 1 5>, <&cpm_syscon0 1 18>; +- clock-names = "pp_clk", "gop_clk", "gp_clk", "axi_clk"; ++ <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>; ++ clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk"; + + eth0: eth0 { + interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>, +diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +index ca22f9d..ed2f123 100644 +--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi ++++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +@@ -38,9 +38,10 @@ + compatible = "marvell,armada-7k-pp22"; + reg = <0x0 0x100000>, <0x129000 0xb000>; + clocks = <&CP110_LABEL(clk) 1 3>, <&CP110_LABEL(clk) 1 9>, +- <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 18>; ++ <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>, ++ <&CP110_LABEL(clk) 1 18>; + clock-names = "pp_clk", "gop_clk", +- "mg_clk", "axi_clk"; ++ "mg_clk", "mg_core_clk", "axi_clk"; + marvell,system-controller = <&CP110_LABEL(syscon0)>; + status = "disabled"; + dma-coherent; +-- +cgit v1.1 |