diff options
Diffstat (limited to 'AllWinner-net-emac.patch')
| -rw-r--r-- | AllWinner-net-emac.patch | 1014 |
1 files changed, 0 insertions, 1014 deletions
diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch index 0e0a319d0..6e7438200 100644 --- a/AllWinner-net-emac.patch +++ b/AllWinner-net-emac.patch @@ -1425,698 +1425,6 @@ index 8bb550b..108739f 100644 int mac_port_sel_speed; bool en_tx_lpi_clockgating; -From patchwork Mon May 1 12:45:06 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 06/20] arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control - module -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706459 -Message-Id: <20170501124520.3769-7-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:06 +0200 - -This patch add the dt node for the syscon register present on the -Allwinner H3/H5 - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock.. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 1aeeacb..d9691fc 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -83,6 +83,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@1c00000 { -+ compatible = "allwinner,sun8i-h3-system-controller", -+ "syscon"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - dma: dma-controller@01c02000 { - compatible = "allwinner,sun8i-h3-dma"; - reg = <0x01c02000 0x1000>; - -From patchwork Mon May 1 12:45:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,07/20] arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706465 -Message-Id: <20170501124520.3769-8-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:07 +0200 - -The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 -speed. - -This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. -SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ - 1 file changed, 34 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index d9691fc..45a9a30 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -285,6 +285,14 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ emac_rgmii_pins: emac0 { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - i2c0_pins: i2c0 { - pins = "PA11", "PA12"; - function = "i2c0"; -@@ -381,6 +389,32 @@ - clocks = <&osc24M>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x104>; -+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+ }; -+ - spi0: spi@01c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; - -From patchwork Mon May 1 12:45:08 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,08/20] arm: sun8i: orangepi-pc: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706463 -Message-Id: <20170501124520.3769-9-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:08 +0200 - -The dwmac-sun8i hardware is present on the Orange PI PC. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..52e6575 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -52,6 +52,7 @@ - compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -109,6 +110,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - -From patchwork Mon May 1 12:45:09 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,09/20] arm: sun8i: orangepi-zero: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706461 -Message-Id: <20170501124520.3769-10-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:09 +0200 - -The dwmac-sun8i hardware is present on the Orange PI Zero. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -index 9e8b082..dd3525a 100644 ---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -@@ -57,6 +57,7 @@ - aliases { - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ -+ ethernet0 = &emac; - ethernet1 = &xr819; - }; - -@@ -103,6 +104,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>; - -From patchwork Mon May 1 12:45:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,10/20] arm: sun8i: orangepi-one: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706471 -Message-Id: <20170501124520.3769-11-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:10 +0200 - -The dwmac-sun8i hardware is present on the Orange PI One. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index 5fea430..6880268 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -52,6 +52,7 @@ - compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -97,6 +98,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; - -From patchwork Mon May 1 12:45:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,11/20] arm: sun8i: orangepi-2: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706467 -Message-Id: <20170501124520.3769-12-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:11 +0200 - -The dwmac-sun8i hardware is present on the Orange PI 2. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..cedd326 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -54,6 +54,7 @@ - aliases { - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ -+ ethernet0 = &emac; - ethernet1 = &rtl8189; - }; - -@@ -108,6 +109,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - -From patchwork Mon May 1 12:45:12 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 12/20] arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active - high -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706481 -Message-Id: <20170501124520.3769-13-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:12 +0200 - -On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet -port were changed from active low to active high. - -Signed-off-by: Chen-Yu Tsai <wens@csie.org> -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..a10281b 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -53,6 +53,11 @@ - }; - }; - -+&emac { -+ /* LEDs changed to active high on the plus */ -+ /delete-property/ allwinner,leds-active-low; -+}; -+ - &mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins_a>; - -From patchwork Mon May 1 12:45:13 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, 13/20] arm64: allwinner: sun50i-a64: Add dt node for the syscon - control module -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706477 -Message-Id: <20170501124520.3769-14-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:13 +0200 - -This patch add the dt node for the syscon register present on the -Allwinner A64. - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index c7f669f..d7341ba 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -129,6 +129,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@1c00000 { -+ compatible = "allwinner,sun50i-a64-system-controller", -+ "syscon"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc"; - reg = <0x01c0f000 0x1000>; - -From patchwork Mon May 1 12:45:14 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706485 -Message-Id: <20170501124520.3769-15-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:14 +0200 - -The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit -connections. It is very similar to the device found in the Allwinner -H3, but lacks the internal 100 Mbit PHY and its associated control -bits. -This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps -it disabled at this level. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index d7341ba..18b3642 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -287,6 +287,21 @@ - bias-pull-up; - }; - -+ rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", "PD17", -+ "PD18", "PD19", "PD20", "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ -+ rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", "PD12", -+ "PD13", "PD15", "PD16", "PD17", "PD18", -+ "PD19", "PD20", "PD21", "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - uart0_pins_a: uart0@0 { - pins = "PB8", "PB9"; - function = "uart0"; -@@ -391,6 +406,26 @@ - #size-cells = <0>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun50i-a64-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x100>; -+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - -From patchwork Mon May 1 12:45:15 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,15/20] arm64: allwinner: pine64: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706489 -Message-Id: <20170501124520.3769-16-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:15 +0200 - -The dwmac-sun8i hardware is present on the pine64 -It uses an external PHY via RMII. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..3b491c0 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -70,6 +70,15 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rmii_pins>; -+ phy-mode = "rmii"; -+ phy-handle = <&ext_rmii_phy1>; -+ status = "okay"; -+ -+}; -+ - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -@@ -80,6 +89,13 @@ - bias-pull-up; - }; - -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - -From patchwork Mon May 1 12:45:16 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706511 -Message-Id: <20170501124520.3769-17-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:16 +0200 - -The dwmac-sun8i hardware is present on the pine64 plus. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - .../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..24f1aac 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,20 @@ - model = "Pine64+"; - compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - -- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ -+ /* TODO: Camera, touchscreen, etc. */ -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - -From patchwork Mon May 1 12:45:17 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706509 -Message-Id: <20170501124520.3769-18-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:17 +0200 - -The dwmac-sun8i hardware is present on the BananaPi M64. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..0d1f026 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -67,6 +67,14 @@ - }; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; -+}; -+ - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -@@ -77,6 +85,13 @@ - bias-pull-up; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - From patchwork Mon May 1 12:45:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 @@ -2192,326 +1500,4 @@ index 2685e03..6da6af8 100644 CONFIG_XILINX_EMACLITE=y CONFIG_AT803X_PHY=y -From patchwork Mon May 1 12:45:20 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9706505 -Message-Id: <20170501124520.3769-21-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe <clabbe.montjoie@gmail.com> -Date: Mon, 1 May 2017 14:45:20 +0200 - -Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm64/configs/defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index ce07285..4575fbb 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -193,6 +193,7 @@ CONFIG_RAVB=y - CONFIG_SMC91X=y - CONFIG_SMSC911X=y - CONFIG_STMMAC_ETH=m -+CONFIG_DWMAC_SUN8I=m - CONFIG_MDIO_BUS_MUX_MMIOREG=y - CONFIG_MESON_GXL_PHY=m - CONFIG_MICREL_PHY=y -From patchwork Mon Jun 5 19:21:26 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9767313 -Message-Id: <20170605192130.25320-2-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:26 +0200 - -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7bfa72..331ed683ac62 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -47,6 +47,20 @@ - model = "Xunlong Orange Pi Plus / Plus 2"; - compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; - -+ aliases { -+ ethernet0 = &emac; -+ }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - reg_usb3_vbus: usb3-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; -@@ -64,6 +78,24 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ }; -+}; -+ - &mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_8bit_pins>; -From patchwork Mon Jun 5 19:21:27 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9767321 -Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:27 +0200 - -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 883072b611fa..d756ff825116 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -52,6 +52,7 @@ - compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - serial1 = &uart1; - }; -@@ -84,6 +85,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - wifi_pwrseq: wifi_pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; -@@ -104,12 +115,30 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Mon Jun 5 19:21:28 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9767347 -Message-Id: <20170605192130.25320-4-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:28 +0200 - -The dwmac-sun8i hardware is present on the Orange PI PC2. -It uses an external PHY rtl8211e via RGMII. -This patch create the needed regulator, emac and phy nodes. -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 27 ++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -index dfecc17dcc92..a8296feee884 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -@@ -59,6 +59,7 @@ - }; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -91,6 +92,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - reg_usb0_vbus: usb0-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb0-vbus"; -@@ -126,12 +137,28 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Wed May 31 07:18:44 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v6,13/21] arm: sun8i: nanopi-neo: Enable dwmac-sun8i -From: Corentin LABBE <clabbe.montjoie@gmail.com> -X-Patchwork-Id: 9756089 -Message-Id: <20170531071852.12422-14-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe <clabbe.montjoie@gmail.com>, - linux-arm-kernel@lists.infradead.org -Date: Wed, 31 May 2017 09:18:44 +0200 - -The dwmac-sun8i hardware is present on the NanoPi Neo. -It uses the internal PHY. -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> ---- - arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -index 8d2cc6e9a03f..78f6c24952dd 100644 ---- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -@@ -46,3 +46,10 @@ - model = "FriendlyARM NanoPi NEO"; - compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; - }; -+ -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; |