diff options
41 files changed, 254 insertions, 5852 deletions
diff --git a/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch b/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch deleted file mode 100644 index fcafe4d29..000000000 --- a/0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 4196017cd0e50e434ee72ca706742804f75c8827 Mon Sep 17 00:00:00 2001 -From: Laura Abbott <labbott@fedoraproject.org> -Date: Fri, 8 Jul 2016 11:15:43 -0700 -Subject: [PATCH] Work around for addition of metag def but not relocations - -Caused by commit in sync up from -http://pkgs.fedoraproject.org/cgit/rpms/glibc.git/commit/?id=9a78be1808600ca5e66eab741542447a29cfbeb3 - -Fixes build errors like: - -scripts/recordmcount.c: In function 'do_file': -scripts/recordmcount.c:466:28: error: 'R_METAG_ADDR32' undeclared (first use in this function) - case EM_METAG: reltype = R_METAG_ADDR32; - ^~~~~~~~~~~~~~ -scripts/recordmcount.c:466:28: note: each undeclared identifier is reported only once for each function it appears in -scripts/recordmcount.c:468:20: error: 'R_METAG_NONE' undeclared (first use in this function) - rel_type_nop = R_METAG_NONE; - ^~~~~~~~~~~~ - -Signed-off-by: Laura Abbott <labbott@fedoraproject.org> ---- - scripts/recordmcount.c | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c -index e1675927..42396a7 100644 ---- a/scripts/recordmcount.c -+++ b/scripts/recordmcount.c -@@ -33,10 +33,17 @@ - #include <string.h> - #include <unistd.h> - -+/* -+ * glibc synced up and added the metag number but didn't add the relocations. -+ * Work around this in a crude manner for now. -+ */ - #ifndef EM_METAG --/* Remove this when these make it to the standard system elf.h. */ - #define EM_METAG 174 -+#endif -+#ifndef R_METAG_ADDR32 - #define R_METAG_ADDR32 2 -+#endif -+#ifndef R_METAG_NONE - #define R_METAG_NONE 3 - #endif - --- -2.9.0 - diff --git a/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch b/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch deleted file mode 100644 index f30e32dc4..000000000 --- a/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch +++ /dev/null @@ -1,227 +0,0 @@ -From 0042e1e7a03a2fb5d6c464c03ce84d55b31add11 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:05:55 -0700 -Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state - -Reorganize the nested structures and unions we have for pipe watermark -data in intel_crtc_state so that platform-specific data can be added in -a more sensible manner (and save a bit of memory at the same time). - -The change basically changes the organization from: - - union { - struct intel_pipe_wm ilk; - struct intel_pipe_wm skl; - } optimal; - - struct intel_pipe_wm intermediate /* ILK-only */ - -to - - union { - struct { - struct intel_pipe_wm intermediate; - struct intel_pipe_wm optimal; - } ilk; - - struct { - struct intel_pipe_wm optimal; - } skl; - } - -There should be no functional change here, but it will allow us to add -more platform-specific fields going forward (and more easily extend to -other platform types like VLV). - -While we're at it, let's move the entire watermark substructure out to -its own structure definition to make the code slightly more readable. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_display.c | 2 +- - drivers/gpu/drm/i915/intel_drv.h | 61 +++++++++++++++++++++--------------- - drivers/gpu/drm/i915/intel_pm.c | 18 +++++------ - 3 files changed, 45 insertions(+), 36 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index d19b392..4633aec 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -12027,7 +12027,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc, - } - } else if (dev_priv->display.compute_intermediate_wm) { - if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9) -- pipe_config->wm.intermediate = pipe_config->wm.optimal.ilk; -+ pipe_config->wm.ilk.intermediate = pipe_config->wm.ilk.optimal; - } - - if (INTEL_INFO(dev)->gen >= 9) { -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index 4a24b00..5a186bf 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -405,6 +405,40 @@ struct skl_pipe_wm { - uint32_t linetime; - }; - -+struct intel_crtc_wm_state { -+ union { -+ struct { -+ /* -+ * Intermediate watermarks; these can be -+ * programmed immediately since they satisfy -+ * both the current configuration we're -+ * switching away from and the new -+ * configuration we're switching to. -+ */ -+ struct intel_pipe_wm intermediate; -+ -+ /* -+ * Optimal watermarks, programmed post-vblank -+ * when this state is committed. -+ */ -+ struct intel_pipe_wm optimal; -+ } ilk; -+ -+ struct { -+ /* gen9+ only needs 1-step wm programming */ -+ struct skl_pipe_wm optimal; -+ } skl; -+ }; -+ -+ /* -+ * Platforms with two-step watermark programming will need to -+ * update watermark programming post-vblank to switch from the -+ * safe intermediate watermarks to the optimal final -+ * watermarks. -+ */ -+ bool need_postvbl_update; -+}; -+ - struct intel_crtc_state { - struct drm_crtc_state base; - -@@ -558,32 +592,7 @@ struct intel_crtc_state { - /* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */ - bool disable_lp_wm; - -- struct { -- /* -- * Optimal watermarks, programmed post-vblank when this state -- * is committed. -- */ -- union { -- struct intel_pipe_wm ilk; -- struct skl_pipe_wm skl; -- } optimal; -- -- /* -- * Intermediate watermarks; these can be programmed immediately -- * since they satisfy both the current configuration we're -- * switching away from and the new configuration we're switching -- * to. -- */ -- struct intel_pipe_wm intermediate; -- -- /* -- * Platforms with two-step watermark programming will need to -- * update watermark programming post-vblank to switch from the -- * safe intermediate watermarks to the optimal final -- * watermarks. -- */ -- bool need_postvbl_update; -- } wm; -+ struct intel_crtc_wm_state wm; - - /* Gamma mode programmed on the pipe */ - uint32_t gamma_mode; -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index a7ef45d..4353fec 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2309,7 +2309,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate) - int level, max_level = ilk_wm_max_level(dev), usable_level; - struct ilk_wm_maximums max; - -- pipe_wm = &cstate->wm.optimal.ilk; -+ pipe_wm = &cstate->wm.ilk.optimal; - - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { - struct intel_plane_state *ps; -@@ -2391,7 +2391,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev, - struct intel_crtc *intel_crtc, - struct intel_crtc_state *newstate) - { -- struct intel_pipe_wm *a = &newstate->wm.intermediate; -+ struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; - struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk; - int level, max_level = ilk_wm_max_level(dev); - -@@ -2400,7 +2400,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev, - * currently active watermarks to get values that are safe both before - * and after the vblank. - */ -- *a = newstate->wm.optimal.ilk; -+ *a = newstate->wm.ilk.optimal; - a->pipe_enabled |= b->pipe_enabled; - a->sprites_enabled |= b->sprites_enabled; - a->sprites_scaled |= b->sprites_scaled; -@@ -2429,7 +2429,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev, - * If our intermediate WM are identical to the final WM, then we can - * omit the post-vblank programming; only update if it's different. - */ -- if (memcmp(a, &newstate->wm.optimal.ilk, sizeof(*a)) == 0) -+ if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) == 0) - newstate->wm.need_postvbl_update = false; - - return 0; -@@ -3678,7 +3678,7 @@ static void skl_update_wm(struct drm_crtc *crtc) - struct drm_i915_private *dev_priv = dev->dev_private; - struct skl_wm_values *results = &dev_priv->wm.skl_results; - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); -- struct skl_pipe_wm *pipe_wm = &cstate->wm.optimal.skl; -+ struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; - - - /* Clear all dirty flags */ -@@ -3757,7 +3757,7 @@ static void ilk_initial_watermarks(struct intel_crtc_state *cstate) - struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); - - mutex_lock(&dev_priv->wm.wm_mutex); -- intel_crtc->wm.active.ilk = cstate->wm.intermediate; -+ intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate; - ilk_program_watermarks(dev_priv); - mutex_unlock(&dev_priv->wm.wm_mutex); - } -@@ -3769,7 +3769,7 @@ static void ilk_optimize_watermarks(struct intel_crtc_state *cstate) - - mutex_lock(&dev_priv->wm.wm_mutex); - if (cstate->wm.need_postvbl_update) { -- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk; -+ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal; - ilk_program_watermarks(dev_priv); - } - mutex_unlock(&dev_priv->wm.wm_mutex); -@@ -3826,7 +3826,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) - struct skl_wm_values *hw = &dev_priv->wm.skl_hw; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); -- struct skl_pipe_wm *active = &cstate->wm.optimal.skl; -+ struct skl_pipe_wm *active = &cstate->wm.skl.optimal; - enum pipe pipe = intel_crtc->pipe; - int level, i, max_level; - uint32_t temp; -@@ -3892,7 +3892,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) - struct ilk_wm_values *hw = &dev_priv->wm.hw; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); -- struct intel_pipe_wm *active = &cstate->wm.optimal.ilk; -+ struct intel_pipe_wm *active = &cstate->wm.ilk.optimal; - enum pipe pipe = intel_crtc->pipe; - static const i915_reg_t wm0_pipe_reg[] = { - [PIPE_A] = WM0_PIPEA_ILK, --- -2.7.4 - diff --git a/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch b/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch deleted file mode 100644 index 0415ea294..000000000 --- a/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 95a9343e4b4e61d4c16da8bffc6a6e392d666dea Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:05:56 -0700 -Subject: [PATCH 02/17] drm/i915: Rename - s/skl_compute_pipe_wm/skl_build_pipe_wm/ - -When we added atomic watermarks, we added a new display vfunc -'compute_pipe_wm' that is used to compute any pipe-specific watermark -information that we can at atomic check time. This was a somewhat poor -naming choice since we already had a 'skl_compute_pipe_wm' function that -doesn't quite fit this model --- the existing SKL function is something -that gets used at atomic commit time, after the DDB allocation has been -determined. Let's rename the existing SKL function to avoid confusion. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-3-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_pm.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 4353fec..e15cb2a 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3327,9 +3327,9 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, - } - } - --static void skl_compute_pipe_wm(struct intel_crtc_state *cstate, -- struct skl_ddb_allocation *ddb, -- struct skl_pipe_wm *pipe_wm) -+static void skl_build_pipe_wm(struct intel_crtc_state *cstate, -+ struct skl_ddb_allocation *ddb, -+ struct skl_pipe_wm *pipe_wm) - { - struct drm_device *dev = cstate->base.crtc->dev; - const struct drm_i915_private *dev_priv = dev->dev_private; -@@ -3596,7 +3596,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); - - skl_allocate_pipe_ddb(cstate, ddb); -- skl_compute_pipe_wm(cstate, ddb, pipe_wm); -+ skl_build_pipe_wm(cstate, ddb, pipe_wm); - - if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) - return false; --- -2.7.4 - diff --git a/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch b/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch deleted file mode 100644 index 9dcebc04c..000000000 --- a/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch +++ /dev/null @@ -1,204 +0,0 @@ -From be60f2176911a4ac8e0450ab51f11c235a4984de Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:05:57 -0700 -Subject: [PATCH 03/17] drm/i915/gen9: Cache plane data rates in CRTC state - -This will be important when we start calculating CRTC data rates for -in-flight CRTC states since it will allow us to calculate the total data -rate without needing to grab the plane state for any planes that aren't -updated by the transaction. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-4-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_drv.h | 4 ++ - drivers/gpu/drm/i915/intel_pm.c | 92 ++++++++++++++++++++++++++-------------- - 2 files changed, 63 insertions(+), 33 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index 5a186bf..6a95696 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -427,6 +427,10 @@ struct intel_crtc_wm_state { - struct { - /* gen9+ only needs 1-step wm programming */ - struct skl_pipe_wm optimal; -+ -+ /* cached plane data rate */ -+ unsigned plane_data_rate[I915_MAX_PLANES]; -+ unsigned plane_y_data_rate[I915_MAX_PLANES]; - } skl; - }; - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index e15cb2a..6835614 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2940,6 +2940,14 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, - struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate); - struct drm_framebuffer *fb = pstate->fb; - uint32_t width = 0, height = 0; -+ unsigned format = fb ? fb->pixel_format : DRM_FORMAT_XRGB8888; -+ -+ if (!intel_pstate->visible) -+ return 0; -+ if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR) -+ return 0; -+ if (y && format != DRM_FORMAT_NV12) -+ return 0; - - width = drm_rect_width(&intel_pstate->src) >> 16; - height = drm_rect_height(&intel_pstate->src) >> 16; -@@ -2948,17 +2956,17 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, - swap(width, height); - - /* for planar format */ -- if (fb->pixel_format == DRM_FORMAT_NV12) { -+ if (format == DRM_FORMAT_NV12) { - if (y) /* y-plane data rate */ - return width * height * -- drm_format_plane_cpp(fb->pixel_format, 0); -+ drm_format_plane_cpp(format, 0); - else /* uv-plane data rate */ - return (width / 2) * (height / 2) * -- drm_format_plane_cpp(fb->pixel_format, 1); -+ drm_format_plane_cpp(format, 1); - } - - /* for packed formats */ -- return width * height * drm_format_plane_cpp(fb->pixel_format, 0); -+ return width * height * drm_format_plane_cpp(format, 0); - } - - /* -@@ -2967,32 +2975,34 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, - * 3 * 4096 * 8192 * 4 < 2^32 - */ - static unsigned int --skl_get_total_relative_data_rate(const struct intel_crtc_state *cstate) -+skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) - { - struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); - struct drm_device *dev = intel_crtc->base.dev; - const struct intel_plane *intel_plane; -- unsigned int total_data_rate = 0; -+ unsigned int rate, total_data_rate = 0; - -+ /* Calculate and cache data rate for each plane */ - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { - const struct drm_plane_state *pstate = intel_plane->base.state; -+ int id = skl_wm_plane_id(intel_plane); - -- if (pstate->fb == NULL) -- continue; -+ /* packed/uv */ -+ rate = skl_plane_relative_data_rate(cstate, pstate, 0); -+ cstate->wm.skl.plane_data_rate[id] = rate; - -- if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR) -- continue; -+ /* y-plane */ -+ rate = skl_plane_relative_data_rate(cstate, pstate, 1); -+ cstate->wm.skl.plane_y_data_rate[id] = rate; -+ } - -- /* packed/uv */ -- total_data_rate += skl_plane_relative_data_rate(cstate, -- pstate, -- 0); -+ /* Calculate CRTC's total data rate from cached values */ -+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -+ int id = skl_wm_plane_id(intel_plane); - -- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) -- /* y-plane */ -- total_data_rate += skl_plane_relative_data_rate(cstate, -- pstate, -- 1); -+ /* packed/uv */ -+ total_data_rate += cstate->wm.skl.plane_data_rate[id]; -+ total_data_rate += cstate->wm.skl.plane_y_data_rate[id]; - } - - return total_data_rate; -@@ -3056,6 +3066,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - * FIXME: we may not allocate every single block here. - */ - total_data_rate = skl_get_total_relative_data_rate(cstate); -+ if (total_data_rate == 0) -+ return; - - start = alloc->start; - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -@@ -3070,7 +3082,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - if (plane->type == DRM_PLANE_TYPE_CURSOR) - continue; - -- data_rate = skl_plane_relative_data_rate(cstate, pstate, 0); -+ data_rate = cstate->wm.skl.plane_data_rate[id]; - - /* - * allocation for (packed formats) or (uv-plane part of planar format): -@@ -3089,20 +3101,16 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - /* - * allocation for y_plane part of planar format: - */ -- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) { -- y_data_rate = skl_plane_relative_data_rate(cstate, -- pstate, -- 1); -- y_plane_blocks = y_minimum[id]; -- y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, -- total_data_rate); -- -- ddb->y_plane[pipe][id].start = start; -- ddb->y_plane[pipe][id].end = start + y_plane_blocks; -- -- start += y_plane_blocks; -- } -+ y_data_rate = cstate->wm.skl.plane_y_data_rate[id]; -+ -+ y_plane_blocks = y_minimum[id]; -+ y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, -+ total_data_rate); - -+ ddb->y_plane[pipe][id].start = start; -+ ddb->y_plane[pipe][id].end = start + y_plane_blocks; -+ -+ start += y_plane_blocks; - } - - } -@@ -3879,10 +3887,28 @@ void skl_wm_get_hw_state(struct drm_device *dev) - struct drm_i915_private *dev_priv = dev->dev_private; - struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb; - struct drm_crtc *crtc; -+ struct intel_crtc *intel_crtc; - - skl_ddb_get_hw_state(dev_priv, ddb); - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) - skl_pipe_wm_get_hw_state(crtc); -+ -+ /* Calculate plane data rates */ -+ for_each_intel_crtc(dev, intel_crtc) { -+ struct intel_crtc_state *cstate = intel_crtc->config; -+ struct intel_plane *intel_plane; -+ -+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -+ const struct drm_plane_state *pstate = -+ intel_plane->base.state; -+ int id = skl_wm_plane_id(intel_plane); -+ -+ cstate->wm.skl.plane_data_rate[id] = -+ skl_plane_relative_data_rate(cstate, pstate, 0); -+ cstate->wm.skl.plane_y_data_rate[id] = -+ skl_plane_relative_data_rate(cstate, pstate, 1); -+ } -+ } - } - - static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) --- -2.7.4 - diff --git a/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch b/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch deleted file mode 100644 index 6bb9ea5e3..000000000 --- a/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch +++ /dev/null @@ -1,131 +0,0 @@ -From 2bf927b92091d11f778a2a972b996f24a63281be Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:05:58 -0700 -Subject: [PATCH 04/17] drm/i915/gen9: Allow calculation of data rate for - in-flight state (v2) - -Our skl_get_total_relative_data_rate() function gets passed a crtc state -object to calculate the data rate for, but it currently always looks -up the committed plane states that correspond to that CRTC. Let's -check whether the CRTC state is an in-flight state (meaning -cstate->state is non-NULL) and if so, use the corresponding in-flight -plane states. - -We'll soon be using this function exclusively for in-flight states; at -that time we'll be able to simplify the function a bit, but for now we -allow it to be used in either mode. - -v2: - - Rebase on top of changes to cache plane data rates. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-5-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_pm.c | 74 +++++++++++++++++++++++++++++++++-------- - 1 file changed, 60 insertions(+), 14 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 6835614..5104ba7 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2975,25 +2975,69 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, - * 3 * 4096 * 8192 * 4 < 2^32 - */ - static unsigned int --skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) -+skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) - { -- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); -- struct drm_device *dev = intel_crtc->base.dev; -+ struct drm_crtc_state *cstate = &intel_cstate->base; -+ struct drm_atomic_state *state = cstate->state; -+ struct drm_crtc *crtc = cstate->crtc; -+ struct drm_device *dev = crtc->dev; -+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - const struct intel_plane *intel_plane; - unsigned int rate, total_data_rate = 0; -+ int id; - - /* Calculate and cache data rate for each plane */ -- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -- const struct drm_plane_state *pstate = intel_plane->base.state; -- int id = skl_wm_plane_id(intel_plane); -+ /* -+ * FIXME: At the moment this function can be called on either an -+ * in-flight or a committed state object. If it's in-flight then we -+ * only want to re-calculate the plane data rate for planes that are -+ * part of the transaction (i.e., we don't want to grab any additional -+ * plane states if we don't have to). If we're operating on committed -+ * state, we'll just go ahead and recalculate the plane data rate for -+ * all planes. -+ * -+ * Once we finish moving our DDB allocation to the atomic check phase, -+ * we'll only be calling this function on in-flight state objects, so -+ * the 'else' branch here will go away. -+ */ -+ if (state) { -+ struct drm_plane *plane; -+ struct drm_plane_state *pstate; -+ int i; -+ -+ for_each_plane_in_state(state, plane, pstate, i) { -+ intel_plane = to_intel_plane(plane); -+ id = skl_wm_plane_id(intel_plane); -+ -+ if (intel_plane->pipe != intel_crtc->pipe) -+ continue; -+ -+ /* packed/uv */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 0); -+ intel_cstate->wm.skl.plane_data_rate[id] = rate; -+ -+ /* y-plane */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 1); -+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; -+ } -+ } else { -+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -+ const struct drm_plane_state *pstate = -+ intel_plane->base.state; -+ int id = skl_wm_plane_id(intel_plane); - -- /* packed/uv */ -- rate = skl_plane_relative_data_rate(cstate, pstate, 0); -- cstate->wm.skl.plane_data_rate[id] = rate; -+ /* packed/uv */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 0); -+ intel_cstate->wm.skl.plane_data_rate[id] = rate; - -- /* y-plane */ -- rate = skl_plane_relative_data_rate(cstate, pstate, 1); -- cstate->wm.skl.plane_y_data_rate[id] = rate; -+ /* y-plane */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 1); -+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; -+ } - } - - /* Calculate CRTC's total data rate from cached values */ -@@ -3001,10 +3045,12 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) - int id = skl_wm_plane_id(intel_plane); - - /* packed/uv */ -- total_data_rate += cstate->wm.skl.plane_data_rate[id]; -- total_data_rate += cstate->wm.skl.plane_y_data_rate[id]; -+ total_data_rate += intel_cstate->wm.skl.plane_data_rate[id]; -+ total_data_rate += intel_cstate->wm.skl.plane_y_data_rate[id]; - } - -+ WARN_ON(cstate->plane_mask && total_data_rate == 0); -+ - return total_data_rate; - } - --- -2.7.4 - diff --git a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch deleted file mode 100644 index a5e34c39c..000000000 --- a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch +++ /dev/null @@ -1,57 +0,0 @@ -From f28225dda2a2bf1e2d96bbe44b45d43a7d5071d3 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:05:59 -0700 -Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm - state (v2) - -This will eventually allow us to re-use old values without -re-calculating them for unchanged planes (which also helps us avoid -re-grabbing extra plane states). - -v2: - - Drop unnecessary memset's; they were meant for a later patch (which - got reworked anyway to not need them, but were mis-rebased into this - one. (Maarten) - -Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_drv.h | 4 ++++ - drivers/gpu/drm/i915/intel_pm.c | 4 ++-- - 2 files changed, 6 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index 6a95696..9308cff 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -431,6 +431,10 @@ struct intel_crtc_wm_state { - /* cached plane data rate */ - unsigned plane_data_rate[I915_MAX_PLANES]; - unsigned plane_y_data_rate[I915_MAX_PLANES]; -+ -+ /* minimum block allocation */ -+ uint16_t minimum_blocks[I915_MAX_PLANES]; -+ uint16_t minimum_y_blocks[I915_MAX_PLANES]; - } skl; - }; - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 5104ba7..6c7a048 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - enum pipe pipe = intel_crtc->pipe; - struct skl_ddb_entry *alloc = &ddb->pipe[pipe]; - uint16_t alloc_size, start, cursor_blocks; -- uint16_t minimum[I915_MAX_PLANES]; -- uint16_t y_minimum[I915_MAX_PLANES]; -+ uint16_t *minimum = cstate->wm.skl.minimum_blocks; -+ uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks; - unsigned int total_data_rate; - - skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc); --- -2.7.4 - diff --git a/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch b/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch deleted file mode 100644 index 5a8fd0cf8..000000000 --- a/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 21b8f4f57b5f37796b4aa6d24ad8b326fe68902b Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:00 -0700 -Subject: [PATCH 06/17] drm/i915: Track whether an atomic transaction changes - the active CRTC's - -For the purposes of DDB re-allocation we need to know whether a -transaction changes the list of CRTC's that are active. While -state->modeset could be used for this purpose, that would be slightly -too aggressive since it would lead us to re-allocate the DDB when a -CRTC's mode changes, but not its final active state. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-7-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_display.c | 3 +++ - drivers/gpu/drm/i915/intel_drv.h | 10 ++++++++++ - 2 files changed, 13 insertions(+) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 4633aec..f26d1c5 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13300,6 +13300,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state) - intel_state->active_crtcs |= 1 << i; - else - intel_state->active_crtcs &= ~(1 << i); -+ -+ if (crtc_state->active != crtc->state->active) -+ intel_state->active_pipe_changes |= drm_crtc_mask(crtc); - } - - /* -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index 9308cff..d19e83e 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -291,6 +291,16 @@ struct intel_atomic_state { - - bool dpll_set, modeset; - -+ /* -+ * Does this transaction change the pipes that are active? This mask -+ * tracks which CRTC's have changed their active state at the end of -+ * the transaction (not counting the temporary disable during modesets). -+ * This mask should only be non-zero when intel_state->modeset is true, -+ * but the converse is not necessarily true; simply changing a mode may -+ * not flip the final active status of any CRTC's -+ */ -+ unsigned int active_pipe_changes; -+ - unsigned int active_crtcs; - unsigned int min_pixclk[I915_MAX_PIPES]; - --- -2.7.4 - diff --git a/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch b/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch deleted file mode 100644 index c1d98ba35..000000000 --- a/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch +++ /dev/null @@ -1,342 +0,0 @@ -From c336cf7907da066978af5f2d7d4acd88c78b8c86 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:01 -0700 -Subject: [PATCH 07/17] drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate - on in-flight state (v3) - -We eventually want to calculate watermark values at atomic 'check' time -instead of atomic 'commit' time so that any requested configurations -that result in impossible watermark requirements are properly rejected. -The first step along this path is to allocate the DDB at atomic 'check' -time. As we perform this transition, allow the main allocation function -to operate successfully on either an in-flight state or an -already-commited state. Once we complete the transition in a future -patch, we'll come back and remove the unnecessary logic for the -already-committed case. - -v2: Rebase/refactor; we should no longer need to grab extra plane states - while allocating the DDB since we can pull cached data rates and - minimum block counts from the CRTC state for any planes that aren't - being modified by this transaction. - -v3: - - Simplify memsets to clear DDB plane entries. (Maarten) - - Drop a redundant memset of plane[pipe][PLANE_CURSOR] that was added - by an earlier Coccinelle patch. (Maarten) - - Assign *num_active at the top of skl_ddb_get_pipe_allocation_limits() - so that no code paths return without setting it. (kbuild robot) - -Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-8-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/i915_drv.h | 6 ++ - drivers/gpu/drm/i915/intel_pm.c | 179 +++++++++++++++++++++++++++++----------- - 2 files changed, 139 insertions(+), 46 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index 7c334e9..611c128 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -324,6 +324,12 @@ struct i915_hotplug { - &dev->mode_config.plane_list, \ - base.head) - -+#define for_each_intel_plane_mask(dev, intel_plane, plane_mask) \ -+ list_for_each_entry(intel_plane, &dev->mode_config.plane_list, \ -+ base.head) \ -+ for_each_if ((plane_mask) & \ -+ (1 << drm_plane_index(&intel_plane->base))) -+ - #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ - list_for_each_entry(intel_plane, \ - &(dev)->mode_config.plane_list, \ -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 6c7a048..f009d43 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2849,13 +2849,25 @@ skl_wm_plane_id(const struct intel_plane *plane) - static void - skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - const struct intel_crtc_state *cstate, -- const struct intel_wm_config *config, -- struct skl_ddb_entry *alloc /* out */) -+ struct intel_wm_config *config, -+ struct skl_ddb_entry *alloc, /* out */ -+ int *num_active /* out */) - { -+ struct drm_atomic_state *state = cstate->base.state; -+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); -+ struct drm_i915_private *dev_priv = to_i915(dev); - struct drm_crtc *for_crtc = cstate->base.crtc; - struct drm_crtc *crtc; - unsigned int pipe_size, ddb_size; - int nth_active_pipe; -+ int pipe = to_intel_crtc(for_crtc)->pipe; -+ -+ if (intel_state && intel_state->active_pipe_changes) -+ *num_active = hweight32(intel_state->active_crtcs); -+ else if (intel_state) -+ *num_active = hweight32(dev_priv->active_crtcs); -+ else -+ *num_active = config->num_pipes_active; - - if (!cstate->base.active) { - alloc->start = 0; -@@ -2870,25 +2882,56 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - - ddb_size -= 4; /* 4 blocks for bypass path allocation */ - -- nth_active_pipe = 0; -- for_each_crtc(dev, crtc) { -- if (!to_intel_crtc(crtc)->active) -- continue; -+ /* -+ * FIXME: At the moment we may be called on either in-flight or fully -+ * committed cstate's. Once we fully move DDB allocation in the check -+ * phase, we'll only be called on in-flight states and the 'else' -+ * branch here will go away. -+ * -+ * The 'else' branch is slightly racy here, but it was racy to begin -+ * with; since it's going away soon, no effort is made to address that. -+ */ -+ if (state) { -+ /* -+ * If the state doesn't change the active CRTC's, then there's -+ * no need to recalculate; the existing pipe allocation limits -+ * should remain unchanged. Note that we're safe from racing -+ * commits since any racing commit that changes the active CRTC -+ * list would need to grab _all_ crtc locks, including the one -+ * we currently hold. -+ */ -+ if (!intel_state->active_pipe_changes) { -+ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; -+ return; -+ } - -- if (crtc == for_crtc) -- break; -+ nth_active_pipe = hweight32(intel_state->active_crtcs & -+ (drm_crtc_mask(for_crtc) - 1)); -+ pipe_size = ddb_size / hweight32(intel_state->active_crtcs); -+ alloc->start = nth_active_pipe * ddb_size / *num_active; -+ alloc->end = alloc->start + pipe_size; -+ } else { -+ nth_active_pipe = 0; -+ for_each_crtc(dev, crtc) { -+ if (!to_intel_crtc(crtc)->active) -+ continue; - -- nth_active_pipe++; -- } -+ if (crtc == for_crtc) -+ break; - -- pipe_size = ddb_size / config->num_pipes_active; -- alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active; -- alloc->end = alloc->start + pipe_size; -+ nth_active_pipe++; -+ } -+ -+ pipe_size = ddb_size / config->num_pipes_active; -+ alloc->start = nth_active_pipe * ddb_size / -+ config->num_pipes_active; -+ alloc->end = alloc->start + pipe_size; -+ } - } - --static unsigned int skl_cursor_allocation(const struct intel_wm_config *config) -+static unsigned int skl_cursor_allocation(int num_active) - { -- if (config->num_pipes_active == 1) -+ if (num_active == 1) - return 32; - - return 8; -@@ -3054,33 +3097,44 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) - return total_data_rate; - } - --static void -+static int - skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - struct skl_ddb_allocation *ddb /* out */) - { -+ struct drm_atomic_state *state = cstate->base.state; - struct drm_crtc *crtc = cstate->base.crtc; - struct drm_device *dev = crtc->dev; - struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_wm_config *config = &dev_priv->wm.config; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_plane *intel_plane; -+ struct drm_plane *plane; -+ struct drm_plane_state *pstate; - enum pipe pipe = intel_crtc->pipe; - struct skl_ddb_entry *alloc = &ddb->pipe[pipe]; - uint16_t alloc_size, start, cursor_blocks; - uint16_t *minimum = cstate->wm.skl.minimum_blocks; - uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks; - unsigned int total_data_rate; -+ int num_active; -+ int id, i; - -- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc); -+ if (!cstate->base.active) { -+ ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0; -+ memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); -+ memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe])); -+ return 0; -+ } -+ -+ skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc, -+ &num_active); - alloc_size = skl_ddb_entry_size(alloc); - if (alloc_size == 0) { - memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); -- memset(&ddb->plane[pipe][PLANE_CURSOR], 0, -- sizeof(ddb->plane[pipe][PLANE_CURSOR])); -- return; -+ return 0; - } - -- cursor_blocks = skl_cursor_allocation(config); -+ cursor_blocks = skl_cursor_allocation(num_active); - ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks; - ddb->plane[pipe][PLANE_CURSOR].end = alloc->end; - -@@ -3088,21 +3142,55 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - alloc->end -= cursor_blocks; - - /* 1. Allocate the mininum required blocks for each active plane */ -- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -- struct drm_plane *plane = &intel_plane->base; -- struct drm_framebuffer *fb = plane->state->fb; -- int id = skl_wm_plane_id(intel_plane); -+ /* -+ * TODO: Remove support for already-committed state once we -+ * only allocate DDB on in-flight states. -+ */ -+ if (state) { -+ for_each_plane_in_state(state, plane, pstate, i) { -+ intel_plane = to_intel_plane(plane); -+ id = skl_wm_plane_id(intel_plane); - -- if (!to_intel_plane_state(plane->state)->visible) -- continue; -+ if (intel_plane->pipe != pipe) -+ continue; - -- if (plane->type == DRM_PLANE_TYPE_CURSOR) -- continue; -+ if (!to_intel_plane_state(pstate)->visible) { -+ minimum[id] = 0; -+ y_minimum[id] = 0; -+ continue; -+ } -+ if (plane->type == DRM_PLANE_TYPE_CURSOR) { -+ minimum[id] = 0; -+ y_minimum[id] = 0; -+ continue; -+ } -+ -+ minimum[id] = 8; -+ if (pstate->fb->pixel_format == DRM_FORMAT_NV12) -+ y_minimum[id] = 8; -+ else -+ y_minimum[id] = 0; -+ } -+ } else { -+ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -+ struct drm_plane *plane = &intel_plane->base; -+ struct drm_framebuffer *fb = plane->state->fb; -+ int id = skl_wm_plane_id(intel_plane); -+ -+ if (!to_intel_plane_state(plane->state)->visible) -+ continue; -+ -+ if (plane->type == DRM_PLANE_TYPE_CURSOR) -+ continue; -+ -+ minimum[id] = 8; -+ y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; -+ } -+ } - -- minimum[id] = 8; -- alloc_size -= minimum[id]; -- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; -- alloc_size -= y_minimum[id]; -+ for (i = 0; i < PLANE_CURSOR; i++) { -+ alloc_size -= minimum[i]; -+ alloc_size -= y_minimum[i]; - } - - /* -@@ -3113,21 +3201,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - */ - total_data_rate = skl_get_total_relative_data_rate(cstate); - if (total_data_rate == 0) -- return; -+ return 0; - - start = alloc->start; - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -- struct drm_plane *plane = &intel_plane->base; -- struct drm_plane_state *pstate = intel_plane->base.state; - unsigned int data_rate, y_data_rate; - uint16_t plane_blocks, y_plane_blocks = 0; - int id = skl_wm_plane_id(intel_plane); - -- if (!to_intel_plane_state(pstate)->visible) -- continue; -- if (plane->type == DRM_PLANE_TYPE_CURSOR) -- continue; -- - data_rate = cstate->wm.skl.plane_data_rate[id]; - - /* -@@ -3139,8 +3220,11 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - plane_blocks += div_u64((uint64_t)alloc_size * data_rate, - total_data_rate); - -- ddb->plane[pipe][id].start = start; -- ddb->plane[pipe][id].end = start + plane_blocks; -+ /* Leave disabled planes at (0,0) */ -+ if (data_rate) { -+ ddb->plane[pipe][id].start = start; -+ ddb->plane[pipe][id].end = start + plane_blocks; -+ } - - start += plane_blocks; - -@@ -3153,12 +3237,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, - total_data_rate); - -- ddb->y_plane[pipe][id].start = start; -- ddb->y_plane[pipe][id].end = start + y_plane_blocks; -+ if (y_data_rate) { -+ ddb->y_plane[pipe][id].start = start; -+ ddb->y_plane[pipe][id].end = start + y_plane_blocks; -+ } - - start += y_plane_blocks; - } - -+ return 0; - } - - static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config) -@@ -3649,7 +3736,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); - -- skl_allocate_pipe_ddb(cstate, ddb); -+ WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0); - skl_build_pipe_wm(cstate, ddb, pipe_wm); - - if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) --- -2.7.4 - diff --git a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch deleted file mode 100644 index 9131a60da..000000000 --- a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 7207eecfcb3095442bce30227b551003edc7b908 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:02 -0700 -Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2) - -SKL-style platforms can't fully trust the watermark/DDB settings -programmed by the BIOS and need to do extra sanitization on their first -atomic update. Add a flag to dev_priv that is set during hardware -readout and cleared at the end of the first commit. - -Note that for the somewhat common case where everything is turned off -when the driver starts up, we don't need to bother with a recompute...we -know exactly what the DDB should be (all zero's) so just setup the DDB -directly in that case. - -v2: - - Move clearing of distrust_bios_wm up below the swap_state call since - it's a more natural / self-explanatory location. (Maarten) - - Use dev_priv->active_crtcs to test whether any CRTC's are turned on - during HW WM readout rather than trying to count the active CRTC's - again ourselves. (Maarten) - -Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/i915_drv.h | 7 +++++++ - drivers/gpu/drm/i915/intel_display.c | 1 + - drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ - 3 files changed, 16 insertions(+) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index 611c128..e21960d 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -1981,6 +1981,13 @@ struct drm_i915_private { - * cstate->wm.need_postvbl_update. - */ - struct mutex wm_mutex; -+ -+ /* -+ * Set during HW readout of watermarks/DDB. Some platforms -+ * need to know when we're still using BIOS-provided values -+ * (which we don't fully trust). -+ */ -+ bool distrust_bios_wm; - } wm; - - struct i915_runtime_pm pm; -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index f26d1c5..a9d2e30 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13621,6 +13621,7 @@ static int intel_atomic_commit(struct drm_device *dev, - - drm_atomic_helper_swap_state(dev, state); - dev_priv->wm.config = intel_state->wm_config; -+ dev_priv->wm.distrust_bios_wm = false; - intel_shared_dpll_commit(state); - - if (intel_state->modeset) { -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index f009d43..a49faa7 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -4026,6 +4026,14 @@ void skl_wm_get_hw_state(struct drm_device *dev) - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) - skl_pipe_wm_get_hw_state(crtc); - -+ if (dev_priv->active_crtcs) { -+ /* Fully recompute DDB on first atomic commit */ -+ dev_priv->wm.distrust_bios_wm = true; -+ } else { -+ /* Easy/common case; just sanitize DDB now if everything off */ -+ memset(ddb, 0, sizeof(*ddb)); -+ } -+ - /* Calculate plane data rates */ - for_each_intel_crtc(dev, intel_crtc) { - struct intel_crtc_state *cstate = intel_crtc->config; --- -2.7.4 - diff --git a/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch b/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch deleted file mode 100644 index 80cdacf9a..000000000 --- a/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch +++ /dev/null @@ -1,244 +0,0 @@ -From fbf53d8f1b7d1bcea1411f1f2cd0df6a6cc95332 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:03 -0700 -Subject: [PATCH 09/17] drm/i915/gen9: Compute DDB allocation at atomic check - time (v4) - -Calculate the DDB blocks needed to satisfy the current atomic -transaction at atomic check time. This is a prerequisite to calculating -SKL watermarks during the 'check' phase and rejecting any configurations -that we can't find valid watermarks for. - -Due to the nature of DDB allocation, it's possible for the addition of a -new CRTC to make the watermark configuration already in use on another, -unchanged CRTC become invalid. A change in which CRTC's are active -triggers a recompute of the entire DDB, which unfortunately means we -need to disallow any other atomic commits from racing with such an -update. If the active CRTC's change, we need to grab the lock on all -CRTC's and run all CRTC's through their 'check' handler to recompute and -re-check their per-CRTC DDB allocations. - -Note that with this patch we only compute the DDB allocation but we -don't actually use the computed values during watermark programming yet. -For ease of review/testing/bisecting, we still recompute the DDB at -watermark programming time and just WARN() if it doesn't match the -precomputed values. A future patch will switch over to using the -precomputed values once we're sure they're being properly computed. - -Another clarifying note: DDB allocation itself shouldn't ever fail with -the algorithm we use today (i.e., we have enough DDB blocks on BXT to -support the minimum needs of the worst-case scenario of every pipe/plane -enabled at full size). However the watermarks calculations based on the -DDB may fail and we'll be moving those to the atomic check as well in -future patches. - -v2: - - Skip DDB calculations in the rare case where our transaction doesn't - actually touch any CRTC's at all. Assuming at least one CRTC state - is present in our transaction, then it means we can't race with any - transactions that would update dev_priv->active_crtcs (which requires - _all_ CRTC locks). - -v3: - - Also calculate DDB during initial hw readout, to prevent using - incorrect bios values. (Maarten) - -v4: - - Use new distrust_bios_wm flag instead of skip_initial_wm (which was - never actually set). - - Set intel_state->active_pipe_changes instead of just realloc_pipes - -Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Cc: Lyude Paul <cpaul@redhat.com> -Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/i915_drv.h | 5 +++ - drivers/gpu/drm/i915/intel_display.c | 18 ++++++++ - drivers/gpu/drm/i915/intel_drv.h | 3 ++ - drivers/gpu/drm/i915/intel_pm.c | 79 ++++++++++++++++++++++++++++++++++++ - 4 files changed, 105 insertions(+) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index e21960d..b908a41 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -339,6 +339,10 @@ struct i915_hotplug { - #define for_each_intel_crtc(dev, intel_crtc) \ - list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) - -+#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \ -+ list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) \ -+ for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base))) -+ - #define for_each_intel_encoder(dev, intel_encoder) \ - list_for_each_entry(intel_encoder, \ - &(dev)->mode_config.encoder_list, \ -@@ -594,6 +598,7 @@ struct drm_i915_display_funcs { - struct intel_crtc_state *newstate); - void (*initial_watermarks)(struct intel_crtc_state *cstate); - void (*optimize_watermarks)(struct intel_crtc_state *cstate); -+ int (*compute_global_watermarks)(struct drm_atomic_state *state); - void (*update_wm)(struct drm_crtc *crtc); - int (*modeset_calc_cdclk)(struct drm_atomic_state *state); - void (*modeset_commit_cdclk)(struct drm_atomic_state *state); -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index a9d2e30..ecad0ef 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13342,6 +13342,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state) - static void calc_watermark_data(struct drm_atomic_state *state) - { - struct drm_device *dev = state->dev; -+ struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - struct drm_crtc *crtc; - struct drm_crtc_state *cstate; -@@ -13371,6 +13372,10 @@ static void calc_watermark_data(struct drm_atomic_state *state) - pstate->crtc_h != pstate->src_h >> 16) - intel_state->wm_config.sprites_scaled = true; - } -+ -+ /* Is there platform-specific watermark information to calculate? */ -+ if (dev_priv->display.compute_global_watermarks) -+ dev_priv->display.compute_global_watermarks(state); - } - - /** -@@ -13739,6 +13744,19 @@ static int intel_atomic_commit(struct drm_device *dev, - intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state); - } - -+ /* -+ * Temporary sanity check: make sure our pre-computed DDB matches the -+ * one we actually wind up programming. -+ * -+ * Not a great place to put this, but the easiest place we have access -+ * to both the pre-computed and final DDB's; we'll be removing this -+ * check in the next patch anyway. -+ */ -+ WARN(IS_GEN9(dev) && -+ memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb, -+ sizeof(intel_state->ddb)), -+ "Pre-computed DDB does not match final DDB!\n"); -+ - if (intel_state->modeset) - intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET); - -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index d19e83e..2218290 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -312,6 +312,9 @@ struct intel_atomic_state { - * don't bother calculating intermediate watermarks. - */ - bool skip_intermediate_wm; -+ -+ /* Gen9+ only */ -+ struct skl_ddb_allocation ddb; - }; - - struct intel_plane_state { -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index a49faa7..cfa4f80 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3812,6 +3812,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) - - } - -+static int -+skl_compute_ddb(struct drm_atomic_state *state) -+{ -+ struct drm_device *dev = state->dev; -+ struct drm_i915_private *dev_priv = to_i915(dev); -+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); -+ struct intel_crtc *intel_crtc; -+ unsigned realloc_pipes = dev_priv->active_crtcs; -+ int ret; -+ -+ /* -+ * If this is our first atomic update following hardware readout, -+ * we can't trust the DDB that the BIOS programmed for us. Let's -+ * pretend that all pipes switched active status so that we'll -+ * ensure a full DDB recompute. -+ */ -+ if (dev_priv->wm.distrust_bios_wm) -+ intel_state->active_pipe_changes = ~0; -+ -+ /* -+ * If the modeset changes which CRTC's are active, we need to -+ * recompute the DDB allocation for *all* active pipes, even -+ * those that weren't otherwise being modified in any way by this -+ * atomic commit. Due to the shrinking of the per-pipe allocations -+ * when new active CRTC's are added, it's possible for a pipe that -+ * we were already using and aren't changing at all here to suddenly -+ * become invalid if its DDB needs exceeds its new allocation. -+ * -+ * Note that if we wind up doing a full DDB recompute, we can't let -+ * any other display updates race with this transaction, so we need -+ * to grab the lock on *all* CRTC's. -+ */ -+ if (intel_state->active_pipe_changes) -+ realloc_pipes = ~0; -+ -+ for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) { -+ struct intel_crtc_state *cstate; -+ -+ cstate = intel_atomic_get_crtc_state(state, intel_crtc); -+ if (IS_ERR(cstate)) -+ return PTR_ERR(cstate); -+ -+ ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int -+skl_compute_wm(struct drm_atomic_state *state) -+{ -+ struct drm_crtc *crtc; -+ struct drm_crtc_state *cstate; -+ int ret, i; -+ bool changed = false; -+ -+ /* -+ * If this transaction isn't actually touching any CRTC's, don't -+ * bother with watermark calculation. Note that if we pass this -+ * test, we're guaranteed to hold at least one CRTC state mutex, -+ * which means we can safely use values like dev_priv->active_crtcs -+ * since any racing commits that want to update them would need to -+ * hold _all_ CRTC state mutexes. -+ */ -+ for_each_crtc_in_state(state, crtc, cstate, i) -+ changed = true; -+ if (!changed) -+ return 0; -+ -+ ret = skl_compute_ddb(state); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ - static void skl_update_wm(struct drm_crtc *crtc) - { - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); -@@ -7384,6 +7462,7 @@ void intel_init_pm(struct drm_device *dev) - if (INTEL_INFO(dev)->gen >= 9) { - skl_setup_wm_latency(dev); - dev_priv->display.update_wm = skl_update_wm; -+ dev_priv->display.compute_global_watermarks = skl_compute_wm; - } else if (HAS_PCH_SPLIT(dev)) { - ilk_setup_wm_latency(dev); - --- -2.7.4 - diff --git a/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch b/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch deleted file mode 100644 index 26f7e750c..000000000 --- a/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch +++ /dev/null @@ -1,379 +0,0 @@ -From a9abdc6767855e1668301a1dcc4b5fa8bed1ddfa Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:04 -0700 -Subject: [PATCH 10/17] drm/i915/gen9: Drop re-allocation of DDB at atomic - commit (v2) - -Now that we're properly pre-allocating the DDB during the atomic check -phase and we trust that the allocation is appropriate, let's actually -use the allocation computed and not duplicate that work during the -commit phase. - -v2: - - Significant rebasing now that we can use cached data rates and - minimum block allocations to avoid grabbing additional plane states. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_display.c | 14 +-- - drivers/gpu/drm/i915/intel_pm.c | 224 +++++++++++------------------------ - 2 files changed, 67 insertions(+), 171 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index ecad0ef..4db10d7 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13627,6 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev, - drm_atomic_helper_swap_state(dev, state); - dev_priv->wm.config = intel_state->wm_config; - dev_priv->wm.distrust_bios_wm = false; -+ dev_priv->wm.skl_results.ddb = intel_state->ddb; - intel_shared_dpll_commit(state); - - if (intel_state->modeset) { -@@ -13744,19 +13745,6 @@ static int intel_atomic_commit(struct drm_device *dev, - intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state); - } - -- /* -- * Temporary sanity check: make sure our pre-computed DDB matches the -- * one we actually wind up programming. -- * -- * Not a great place to put this, but the easiest place we have access -- * to both the pre-computed and final DDB's; we'll be removing this -- * check in the next patch anyway. -- */ -- WARN(IS_GEN9(dev) && -- memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb, -- sizeof(intel_state->ddb)), -- "Pre-computed DDB does not match final DDB!\n"); -- - if (intel_state->modeset) - intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET); - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index cfa4f80..0f0d4e1 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2849,7 +2849,6 @@ skl_wm_plane_id(const struct intel_plane *plane) - static void - skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - const struct intel_crtc_state *cstate, -- struct intel_wm_config *config, - struct skl_ddb_entry *alloc, /* out */ - int *num_active /* out */) - { -@@ -2857,24 +2856,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - struct drm_i915_private *dev_priv = to_i915(dev); - struct drm_crtc *for_crtc = cstate->base.crtc; -- struct drm_crtc *crtc; - unsigned int pipe_size, ddb_size; - int nth_active_pipe; - int pipe = to_intel_crtc(for_crtc)->pipe; - -- if (intel_state && intel_state->active_pipe_changes) -- *num_active = hweight32(intel_state->active_crtcs); -- else if (intel_state) -- *num_active = hweight32(dev_priv->active_crtcs); -- else -- *num_active = config->num_pipes_active; -- -- if (!cstate->base.active) { -+ if (WARN_ON(!state) || !cstate->base.active) { - alloc->start = 0; - alloc->end = 0; -+ *num_active = hweight32(dev_priv->active_crtcs); - return; - } - -+ if (intel_state->active_pipe_changes) -+ *num_active = hweight32(intel_state->active_crtcs); -+ else -+ *num_active = hweight32(dev_priv->active_crtcs); -+ - if (IS_BROXTON(dev)) - ddb_size = BXT_DDB_SIZE; - else -@@ -2883,50 +2880,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - ddb_size -= 4; /* 4 blocks for bypass path allocation */ - - /* -- * FIXME: At the moment we may be called on either in-flight or fully -- * committed cstate's. Once we fully move DDB allocation in the check -- * phase, we'll only be called on in-flight states and the 'else' -- * branch here will go away. -- * -- * The 'else' branch is slightly racy here, but it was racy to begin -- * with; since it's going away soon, no effort is made to address that. -+ * If the state doesn't change the active CRTC's, then there's -+ * no need to recalculate; the existing pipe allocation limits -+ * should remain unchanged. Note that we're safe from racing -+ * commits since any racing commit that changes the active CRTC -+ * list would need to grab _all_ crtc locks, including the one -+ * we currently hold. - */ -- if (state) { -- /* -- * If the state doesn't change the active CRTC's, then there's -- * no need to recalculate; the existing pipe allocation limits -- * should remain unchanged. Note that we're safe from racing -- * commits since any racing commit that changes the active CRTC -- * list would need to grab _all_ crtc locks, including the one -- * we currently hold. -- */ -- if (!intel_state->active_pipe_changes) { -- *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; -- return; -- } -- -- nth_active_pipe = hweight32(intel_state->active_crtcs & -- (drm_crtc_mask(for_crtc) - 1)); -- pipe_size = ddb_size / hweight32(intel_state->active_crtcs); -- alloc->start = nth_active_pipe * ddb_size / *num_active; -- alloc->end = alloc->start + pipe_size; -- } else { -- nth_active_pipe = 0; -- for_each_crtc(dev, crtc) { -- if (!to_intel_crtc(crtc)->active) -- continue; -- -- if (crtc == for_crtc) -- break; -- -- nth_active_pipe++; -- } -- -- pipe_size = ddb_size / config->num_pipes_active; -- alloc->start = nth_active_pipe * ddb_size / -- config->num_pipes_active; -- alloc->end = alloc->start + pipe_size; -+ if (!intel_state->active_pipe_changes) { -+ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; -+ return; - } -+ -+ nth_active_pipe = hweight32(intel_state->active_crtcs & -+ (drm_crtc_mask(for_crtc) - 1)); -+ pipe_size = ddb_size / hweight32(intel_state->active_crtcs); -+ alloc->start = nth_active_pipe * ddb_size / *num_active; -+ alloc->end = alloc->start + pipe_size; - } - - static unsigned int skl_cursor_allocation(int num_active) -@@ -3025,62 +2995,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) - struct drm_crtc *crtc = cstate->crtc; - struct drm_device *dev = crtc->dev; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); -+ const struct drm_plane *plane; - const struct intel_plane *intel_plane; -+ struct drm_plane_state *pstate; - unsigned int rate, total_data_rate = 0; - int id; -+ int i; -+ -+ if (WARN_ON(!state)) -+ return 0; - - /* Calculate and cache data rate for each plane */ -- /* -- * FIXME: At the moment this function can be called on either an -- * in-flight or a committed state object. If it's in-flight then we -- * only want to re-calculate the plane data rate for planes that are -- * part of the transaction (i.e., we don't want to grab any additional -- * plane states if we don't have to). If we're operating on committed -- * state, we'll just go ahead and recalculate the plane data rate for -- * all planes. -- * -- * Once we finish moving our DDB allocation to the atomic check phase, -- * we'll only be calling this function on in-flight state objects, so -- * the 'else' branch here will go away. -- */ -- if (state) { -- struct drm_plane *plane; -- struct drm_plane_state *pstate; -- int i; -- -- for_each_plane_in_state(state, plane, pstate, i) { -- intel_plane = to_intel_plane(plane); -- id = skl_wm_plane_id(intel_plane); -- -- if (intel_plane->pipe != intel_crtc->pipe) -- continue; -- -- /* packed/uv */ -- rate = skl_plane_relative_data_rate(intel_cstate, -- pstate, 0); -- intel_cstate->wm.skl.plane_data_rate[id] = rate; -- -- /* y-plane */ -- rate = skl_plane_relative_data_rate(intel_cstate, -- pstate, 1); -- intel_cstate->wm.skl.plane_y_data_rate[id] = rate; -- } -- } else { -- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -- const struct drm_plane_state *pstate = -- intel_plane->base.state; -- int id = skl_wm_plane_id(intel_plane); -+ for_each_plane_in_state(state, plane, pstate, i) { -+ id = skl_wm_plane_id(to_intel_plane(plane)); -+ intel_plane = to_intel_plane(plane); - -- /* packed/uv */ -- rate = skl_plane_relative_data_rate(intel_cstate, -- pstate, 0); -- intel_cstate->wm.skl.plane_data_rate[id] = rate; -+ if (intel_plane->pipe != intel_crtc->pipe) -+ continue; - -- /* y-plane */ -- rate = skl_plane_relative_data_rate(intel_cstate, -- pstate, 1); -- intel_cstate->wm.skl.plane_y_data_rate[id] = rate; -- } -+ /* packed/uv */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 0); -+ intel_cstate->wm.skl.plane_data_rate[id] = rate; -+ -+ /* y-plane */ -+ rate = skl_plane_relative_data_rate(intel_cstate, -+ pstate, 1); -+ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; - } - - /* Calculate CRTC's total data rate from cached values */ -@@ -3104,8 +3045,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - struct drm_atomic_state *state = cstate->base.state; - struct drm_crtc *crtc = cstate->base.crtc; - struct drm_device *dev = crtc->dev; -- struct drm_i915_private *dev_priv = to_i915(dev); -- struct intel_wm_config *config = &dev_priv->wm.config; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_plane *intel_plane; - struct drm_plane *plane; -@@ -3119,6 +3058,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - int num_active; - int id, i; - -+ if (WARN_ON(!state)) -+ return 0; -+ - if (!cstate->base.active) { - ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0; - memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); -@@ -3126,8 +3068,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - return 0; - } - -- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc, -- &num_active); -+ skl_ddb_get_pipe_allocation_limits(dev, cstate, alloc, &num_active); - alloc_size = skl_ddb_entry_size(alloc); - if (alloc_size == 0) { - memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); -@@ -3139,53 +3080,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, - ddb->plane[pipe][PLANE_CURSOR].end = alloc->end; - - alloc_size -= cursor_blocks; -- alloc->end -= cursor_blocks; - - /* 1. Allocate the mininum required blocks for each active plane */ -- /* -- * TODO: Remove support for already-committed state once we -- * only allocate DDB on in-flight states. -- */ -- if (state) { -- for_each_plane_in_state(state, plane, pstate, i) { -- intel_plane = to_intel_plane(plane); -- id = skl_wm_plane_id(intel_plane); -- -- if (intel_plane->pipe != pipe) -- continue; -- -- if (!to_intel_plane_state(pstate)->visible) { -- minimum[id] = 0; -- y_minimum[id] = 0; -- continue; -- } -- if (plane->type == DRM_PLANE_TYPE_CURSOR) { -- minimum[id] = 0; -- y_minimum[id] = 0; -- continue; -- } -- -- minimum[id] = 8; -- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) -- y_minimum[id] = 8; -- else -- y_minimum[id] = 0; -- } -- } else { -- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -- struct drm_plane *plane = &intel_plane->base; -- struct drm_framebuffer *fb = plane->state->fb; -- int id = skl_wm_plane_id(intel_plane); -- -- if (!to_intel_plane_state(plane->state)->visible) -- continue; -+ for_each_plane_in_state(state, plane, pstate, i) { -+ intel_plane = to_intel_plane(plane); -+ id = skl_wm_plane_id(intel_plane); - -- if (plane->type == DRM_PLANE_TYPE_CURSOR) -- continue; -+ if (intel_plane->pipe != pipe) -+ continue; - -- minimum[id] = 8; -- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; -+ if (!to_intel_plane_state(pstate)->visible) { -+ minimum[id] = 0; -+ y_minimum[id] = 0; -+ continue; -+ } -+ if (plane->type == DRM_PLANE_TYPE_CURSOR) { -+ minimum[id] = 0; -+ y_minimum[id] = 0; -+ continue; - } -+ -+ minimum[id] = 8; -+ if (pstate->fb->pixel_format == DRM_FORMAT_NV12) -+ y_minimum[id] = 8; -+ else -+ y_minimum[id] = 0; - } - - for (i = 0; i < PLANE_CURSOR; i++) { -@@ -3736,7 +3655,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); - -- WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0); - skl_build_pipe_wm(cstate, ddb, pipe_wm); - - if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) -@@ -3800,16 +3718,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) - memset(watermarks->plane_trans[pipe], - 0, sizeof(uint32_t) * I915_MAX_PLANES); - watermarks->plane_trans[pipe][PLANE_CURSOR] = 0; -- -- /* Clear ddb entries for pipe */ -- memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry)); -- memset(&watermarks->ddb.plane[pipe], 0, -- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES); -- memset(&watermarks->ddb.y_plane[pipe], 0, -- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES); -- memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0, -- sizeof(struct skl_ddb_entry)); -- - } - - static int --- -2.7.4 - diff --git a/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch b/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch deleted file mode 100644 index ddcb70f1e..000000000 --- a/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch +++ /dev/null @@ -1,81 +0,0 @@ -From dede2d508785eda5affae9d3ac2e245e0d864144 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:05 -0700 -Subject: [PATCH 11/17] drm/i915/gen9: Calculate plane WM's from state - -In a future patch we'll want to calculate plane watermarks for in-flight -atomic state rather than the already-committed state. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-12-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 0f0d4e1..518178a 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3240,16 +3240,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, - - static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - struct intel_crtc_state *cstate, -- struct intel_plane *intel_plane, -+ struct intel_plane_state *intel_pstate, - uint16_t ddb_allocation, - int level, - uint16_t *out_blocks, /* out */ - uint8_t *out_lines /* out */) - { -- struct drm_plane *plane = &intel_plane->base; -- struct drm_framebuffer *fb = plane->state->fb; -- struct intel_plane_state *intel_pstate = -- to_intel_plane_state(plane->state); -+ struct drm_plane_state *pstate = &intel_pstate->base; -+ struct drm_framebuffer *fb = pstate->fb; - uint32_t latency = dev_priv->wm.skl_latency[level]; - uint32_t method1, method2; - uint32_t plane_bytes_per_line, plane_blocks_per_line; -@@ -3264,7 +3262,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - width = drm_rect_width(&intel_pstate->src) >> 16; - height = drm_rect_height(&intel_pstate->src) >> 16; - -- if (intel_rotation_90_or_270(plane->state->rotation)) -+ if (intel_rotation_90_or_270(pstate->rotation)) - swap(width, height); - - cpp = drm_format_plane_cpp(fb->pixel_format, 0); -@@ -3284,7 +3282,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { - uint32_t min_scanlines = 4; - uint32_t y_tile_minimum; -- if (intel_rotation_90_or_270(plane->state->rotation)) { -+ if (intel_rotation_90_or_270(pstate->rotation)) { - int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? - drm_format_plane_cpp(fb->pixel_format, 1) : - drm_format_plane_cpp(fb->pixel_format, 0); -@@ -3338,17 +3336,19 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, - struct drm_device *dev = dev_priv->dev; - struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); - struct intel_plane *intel_plane; -+ struct intel_plane_state *intel_pstate; - uint16_t ddb_blocks; - enum pipe pipe = intel_crtc->pipe; - - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { - int i = skl_wm_plane_id(intel_plane); - -+ intel_pstate = to_intel_plane_state(intel_plane->base.state); - ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); - - result->plane_en[i] = skl_compute_plane_wm(dev_priv, - cstate, -- intel_plane, -+ intel_pstate, - ddb_blocks, - level, - &result->plane_res_b[i], --- -2.7.4 - diff --git a/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch b/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch deleted file mode 100644 index a5314d69c..000000000 --- a/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 5f63c44c510f45953a6b2387799baac49da2ffb5 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:06 -0700 -Subject: [PATCH 12/17] drm/i915/gen9: Allow watermark calculation on in-flight - atomic state (v3) - -In an upcoming patch we'll move this calculation to the atomic 'check' -phase so that the display update can be rejected early if no valid -watermark programming is possible. - -v2: - - Drop intel_pstate_for_cstate_plane() helper and add note about how - the code needs to evolve in the future if we start allowing more than - one pending commit against a CRTC. (Maarten) - -v3: - - Only have skl_compute_wm_level calculate watermarks for enabled - planes; we can just set the other planes on a CRTC to disabled - without having to look at the plane state. This is important because - despite our CRTC lock we can still have racing commits that modify - a disabled plane's property without turning it on. (Maarten) - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-13-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_pm.c | 61 ++++++++++++++++++++++++++++++++--------- - 1 file changed, 48 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 518178a..c9f050e 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3327,23 +3327,56 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - return true; - } - --static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, -- struct skl_ddb_allocation *ddb, -- struct intel_crtc_state *cstate, -- int level, -- struct skl_wm_level *result) -+static int -+skl_compute_wm_level(const struct drm_i915_private *dev_priv, -+ struct skl_ddb_allocation *ddb, -+ struct intel_crtc_state *cstate, -+ int level, -+ struct skl_wm_level *result) - { - struct drm_device *dev = dev_priv->dev; -+ struct drm_atomic_state *state = cstate->base.state; - struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); -+ struct drm_plane *plane; - struct intel_plane *intel_plane; - struct intel_plane_state *intel_pstate; - uint16_t ddb_blocks; - enum pipe pipe = intel_crtc->pipe; - -- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { -+ /* -+ * We'll only calculate watermarks for planes that are actually -+ * enabled, so make sure all other planes are set as disabled. -+ */ -+ memset(result, 0, sizeof(*result)); -+ -+ for_each_intel_plane_mask(dev, intel_plane, cstate->base.plane_mask) { - int i = skl_wm_plane_id(intel_plane); - -- intel_pstate = to_intel_plane_state(intel_plane->base.state); -+ plane = &intel_plane->base; -+ intel_pstate = NULL; -+ if (state) -+ intel_pstate = -+ intel_atomic_get_existing_plane_state(state, -+ intel_plane); -+ -+ /* -+ * Note: If we start supporting multiple pending atomic commits -+ * against the same planes/CRTC's in the future, plane->state -+ * will no longer be the correct pre-state to use for the -+ * calculations here and we'll need to change where we get the -+ * 'unchanged' plane data from. -+ * -+ * For now this is fine because we only allow one queued commit -+ * against a CRTC. Even if the plane isn't modified by this -+ * transaction and we don't have a plane lock, we still have -+ * the CRTC's lock, so we know that no other transactions are -+ * racing with us to update it. -+ */ -+ if (!intel_pstate) -+ intel_pstate = to_intel_plane_state(plane->state); -+ -+ WARN_ON(!intel_pstate->base.fb); -+ - ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); - - result->plane_en[i] = skl_compute_plane_wm(dev_priv, -@@ -3354,6 +3387,8 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, - &result->plane_res_b[i], - &result->plane_res_l[i]); - } -+ -+ return 0; - } - - static uint32_t -@@ -3648,14 +3683,14 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv, - } - } - --static bool skl_update_pipe_wm(struct drm_crtc *crtc, -+static bool skl_update_pipe_wm(struct drm_crtc_state *cstate, - struct skl_ddb_allocation *ddb, /* out */ - struct skl_pipe_wm *pipe_wm /* out */) - { -- struct intel_crtc *intel_crtc = to_intel_crtc(crtc); -- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); -+ struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc); -+ struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate); - -- skl_build_pipe_wm(cstate, ddb, pipe_wm); -+ skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); - - if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) - return false; -@@ -3695,7 +3730,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, - if (!intel_crtc->active) - continue; - -- wm_changed = skl_update_pipe_wm(&intel_crtc->base, -+ wm_changed = skl_update_pipe_wm(intel_crtc->base.state, - &r->ddb, &pipe_wm); - - /* -@@ -3813,7 +3848,7 @@ static void skl_update_wm(struct drm_crtc *crtc) - - skl_clear_wm(results, intel_crtc->pipe); - -- if (!skl_update_pipe_wm(crtc, &results->ddb, pipe_wm)) -+ if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm)) - return; - - skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); --- -2.7.4 - diff --git a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch deleted file mode 100644 index 1eafe831b..000000000 --- a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch +++ /dev/null @@ -1,81 +0,0 @@ -From bb7c6f4efe65f77ba2ed3a09e6d6bc4d021a395d Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:07 -0700 -Subject: [PATCH 13/17] drm/i915/gen9: Use a bitmask to track dirty pipe - watermarks - -Slightly easier to work with than an array of bools. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/i915_drv.h | 2 +- - drivers/gpu/drm/i915/intel_pm.c | 10 +++++----- - 2 files changed, 6 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index b908a41..e7bde72 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -1591,7 +1591,7 @@ struct skl_ddb_allocation { - }; - - struct skl_wm_values { -- bool dirty[I915_MAX_PIPES]; -+ unsigned dirty_pipes; - struct skl_ddb_allocation ddb; - uint32_t wm_linetime[I915_MAX_PIPES]; - uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8]; -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index c9f050e..cb6b6f4 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3516,7 +3516,7 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, - int i, level, max_level = ilk_wm_max_level(dev); - enum pipe pipe = crtc->pipe; - -- if (!new->dirty[pipe]) -+ if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) - continue; - - I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); -@@ -3741,7 +3741,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, - WARN_ON(!wm_changed); - - skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc); -- r->dirty[intel_crtc->pipe] = true; -+ r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); - } - } - -@@ -3844,7 +3844,7 @@ static void skl_update_wm(struct drm_crtc *crtc) - - - /* Clear all dirty flags */ -- memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES); -+ results->dirty_pipes = 0; - - skl_clear_wm(results, intel_crtc->pipe); - -@@ -3852,7 +3852,7 @@ static void skl_update_wm(struct drm_crtc *crtc) - return; - - skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); -- results->dirty[intel_crtc->pipe] = true; -+ results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); - - skl_update_other_pipe_wm(dev, crtc, results); - skl_write_wm_values(dev_priv, results); -@@ -4011,7 +4011,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) - if (!intel_crtc->active) - return; - -- hw->dirty[pipe] = true; -+ hw->dirty_pipes |= drm_crtc_mask(crtc); - - active->linetime = hw->wm_linetime[pipe]; - --- -2.7.4 - diff --git a/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch b/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch deleted file mode 100644 index 134ffad16..000000000 --- a/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch +++ /dev/null @@ -1,244 +0,0 @@ -From 0830cf3698b5966d3409745f751fb6d3a555c254 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:08 -0700 -Subject: [PATCH 14/17] drm/i915/gen9: Propagate watermark calculation failures - up the call chain - -Once we move watermark calculation to the atomic check phase, we'll want -to start rejecting display configurations that exceed out watermark -limits. At the moment we just assume that there's always a valid set of -watermarks, even though this may not actually be true. Let's prepare by -passing return codes up through the call stack in preparation. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-15-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_display.c | 10 ++-- - drivers/gpu/drm/i915/intel_pm.c | 90 ++++++++++++++++++++++-------------- - 2 files changed, 61 insertions(+), 39 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 4db10d7..2190bac 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13339,7 +13339,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state) - * phase. The code here should be run after the per-crtc and per-plane 'check' - * handlers to ensure that all derived state has been updated. - */ --static void calc_watermark_data(struct drm_atomic_state *state) -+static int calc_watermark_data(struct drm_atomic_state *state) - { - struct drm_device *dev = state->dev; - struct drm_i915_private *dev_priv = to_i915(dev); -@@ -13375,7 +13375,9 @@ static void calc_watermark_data(struct drm_atomic_state *state) - - /* Is there platform-specific watermark information to calculate? */ - if (dev_priv->display.compute_global_watermarks) -- dev_priv->display.compute_global_watermarks(state); -+ return dev_priv->display.compute_global_watermarks(state); -+ -+ return 0; - } - - /** -@@ -13459,9 +13461,7 @@ static int intel_atomic_check(struct drm_device *dev, - return ret; - - intel_fbc_choose_crtc(dev_priv, state); -- calc_watermark_data(state); -- -- return 0; -+ return calc_watermark_data(state); - } - - static int intel_atomic_prepare_commit(struct drm_device *dev, -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index cb6b6f4..342aa66 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3238,13 +3238,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, - return false; - } - --static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, -- struct intel_crtc_state *cstate, -- struct intel_plane_state *intel_pstate, -- uint16_t ddb_allocation, -- int level, -- uint16_t *out_blocks, /* out */ -- uint8_t *out_lines /* out */) -+static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, -+ struct intel_crtc_state *cstate, -+ struct intel_plane_state *intel_pstate, -+ uint16_t ddb_allocation, -+ int level, -+ uint16_t *out_blocks, /* out */ -+ uint8_t *out_lines, /* out */ -+ bool *enabled /* out */) - { - struct drm_plane_state *pstate = &intel_pstate->base; - struct drm_framebuffer *fb = pstate->fb; -@@ -3256,8 +3257,10 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - uint8_t cpp; - uint32_t width = 0, height = 0; - -- if (latency == 0 || !cstate->base.active || !intel_pstate->visible) -- return false; -+ if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { -+ *enabled = false; -+ return 0; -+ } - - width = drm_rect_width(&intel_pstate->src) >> 16; - height = drm_rect_height(&intel_pstate->src) >> 16; -@@ -3318,13 +3321,16 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - res_blocks++; - } - -- if (res_blocks >= ddb_allocation || res_lines > 31) -- return false; -+ if (res_blocks >= ddb_allocation || res_lines > 31) { -+ *enabled = false; -+ return 0; -+ } - - *out_blocks = res_blocks; - *out_lines = res_lines; -+ *enabled = true; - -- return true; -+ return 0; - } - - static int -@@ -3342,6 +3348,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, - struct intel_plane_state *intel_pstate; - uint16_t ddb_blocks; - enum pipe pipe = intel_crtc->pipe; -+ int ret; - - /* - * We'll only calculate watermarks for planes that are actually -@@ -3379,13 +3386,16 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, - - ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); - -- result->plane_en[i] = skl_compute_plane_wm(dev_priv, -- cstate, -- intel_pstate, -- ddb_blocks, -- level, -- &result->plane_res_b[i], -- &result->plane_res_l[i]); -+ ret = skl_compute_plane_wm(dev_priv, -+ cstate, -+ intel_pstate, -+ ddb_blocks, -+ level, -+ &result->plane_res_b[i], -+ &result->plane_res_l[i], -+ &result->plane_en[i]); -+ if (ret) -+ return ret; - } - - return 0; -@@ -3422,21 +3432,26 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, - } - } - --static void skl_build_pipe_wm(struct intel_crtc_state *cstate, -- struct skl_ddb_allocation *ddb, -- struct skl_pipe_wm *pipe_wm) -+static int skl_build_pipe_wm(struct intel_crtc_state *cstate, -+ struct skl_ddb_allocation *ddb, -+ struct skl_pipe_wm *pipe_wm) - { - struct drm_device *dev = cstate->base.crtc->dev; - const struct drm_i915_private *dev_priv = dev->dev_private; - int level, max_level = ilk_wm_max_level(dev); -+ int ret; - - for (level = 0; level <= max_level; level++) { -- skl_compute_wm_level(dev_priv, ddb, cstate, -- level, &pipe_wm->wm[level]); -+ ret = skl_compute_wm_level(dev_priv, ddb, cstate, -+ level, &pipe_wm->wm[level]); -+ if (ret) -+ return ret; - } - pipe_wm->linetime = skl_compute_linetime_wm(cstate); - - skl_compute_transition_wm(cstate, &pipe_wm->trans_wm); -+ -+ return 0; - } - - static void skl_compute_wm_results(struct drm_device *dev, -@@ -3683,21 +3698,27 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv, - } - } - --static bool skl_update_pipe_wm(struct drm_crtc_state *cstate, -- struct skl_ddb_allocation *ddb, /* out */ -- struct skl_pipe_wm *pipe_wm /* out */) -+static int skl_update_pipe_wm(struct drm_crtc_state *cstate, -+ struct skl_ddb_allocation *ddb, /* out */ -+ struct skl_pipe_wm *pipe_wm, /* out */ -+ bool *changed /* out */) - { - struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc); - struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate); -+ int ret; - -- skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); -+ ret = skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); -+ if (ret) -+ return ret; - - if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) -- return false; -+ *changed = false; -+ else -+ *changed = true; - - intel_crtc->wm.active.skl = *pipe_wm; - -- return true; -+ return 0; - } - - static void skl_update_other_pipe_wm(struct drm_device *dev, -@@ -3730,8 +3751,8 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, - if (!intel_crtc->active) - continue; - -- wm_changed = skl_update_pipe_wm(intel_crtc->base.state, -- &r->ddb, &pipe_wm); -+ skl_update_pipe_wm(intel_crtc->base.state, -+ &r->ddb, &pipe_wm, &wm_changed); - - /* - * If we end up re-computing the other pipe WM values, it's -@@ -3841,14 +3862,15 @@ static void skl_update_wm(struct drm_crtc *crtc) - struct skl_wm_values *results = &dev_priv->wm.skl_results; - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); - struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; -- -+ bool wm_changed; - - /* Clear all dirty flags */ - results->dirty_pipes = 0; - - skl_clear_wm(results, intel_crtc->pipe); - -- if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm)) -+ skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed); -+ if (!wm_changed) - return; - - skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); --- -2.7.4 - diff --git a/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch b/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch deleted file mode 100644 index 691b6b985..000000000 --- a/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch +++ /dev/null @@ -1,302 +0,0 @@ -From 664f87c5bfcc7798bd5b16e14792f1e9ba2956ea Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 15:11:40 -0700 -Subject: [PATCH 15/17] drm/i915/gen9: Calculate watermarks during atomic - 'check' (v2) - -Moving watermark calculation into the check phase will allow us to to -reject display configurations for which there are no valid watermark -values before we start trying to program the hardware (although those -tests will come in a subsequent patch). - -Another advantage of moving this calculation to the check phase is that -we can calculate the watermarks in a single shot as part of the atomic -transaction. The watermark interfaces we inherited from our legacy -modesetting days are a bit broken in the atomic design because they use -per-crtc entry points but actually re-calculate and re-program something -that is really more of a global state. That worked okay in the legacy -modesetting world because operations only ever updated a single CRTC at -a time. However in the atomic world, a transaction can involve multiple -CRTC's, which means we wind up computing and programming the watermarks -NxN times (where N is the number of CRTC's involved). With this patch -we eliminate the redundant re-calculation of watermark data for atomic -states (which was the cause of the WARN_ON(!wm_changed) problems that -have plagued us for a while). - -We still need to work on the 'commit' side of watermark handling so that -we aren't doing redundant NxN programming of watermarks, but that's -content for future patches. - -v2: - - Bail out of skl_write_wm_values() if the CRTC isn't active. Now that - we set dirty_pipes to ~0 if the active pipes change (because - we need to deal with DDB changes), we can now wind up here for - disabled pipes, whereas we couldn't before. - -Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055 -Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181 -Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Tested-by: Daniel Stone <daniels@collabora.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_display.c | 2 +- - drivers/gpu/drm/i915/intel_drv.h | 2 +- - drivers/gpu/drm/i915/intel_pm.c | 140 +++++++++++++---------------------- - 3 files changed, 54 insertions(+), 90 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 2190bac..a75daac 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13627,7 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev, - drm_atomic_helper_swap_state(dev, state); - dev_priv->wm.config = intel_state->wm_config; - dev_priv->wm.distrust_bios_wm = false; -- dev_priv->wm.skl_results.ddb = intel_state->ddb; -+ dev_priv->wm.skl_results = intel_state->wm_results; - intel_shared_dpll_commit(state); - - if (intel_state->modeset) { -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index 2218290..ab0be7a 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -314,7 +314,7 @@ struct intel_atomic_state { - bool skip_intermediate_wm; - - /* Gen9+ only */ -- struct skl_ddb_allocation ddb; -+ struct skl_wm_values wm_results; - }; - - struct intel_plane_state { -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 342aa66..b072417 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3221,23 +3221,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, - return ret; - } - --static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, -- const struct intel_crtc *intel_crtc) --{ -- struct drm_device *dev = intel_crtc->base.dev; -- struct drm_i915_private *dev_priv = dev->dev_private; -- const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; -- -- /* -- * If ddb allocation of pipes changed, it may require recalculation of -- * watermarks -- */ -- if (memcmp(new_ddb->pipe, cur_ddb->pipe, sizeof(new_ddb->pipe))) -- return true; -- -- return false; --} -- - static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - struct intel_crtc_state *cstate, - struct intel_plane_state *intel_pstate, -@@ -3533,6 +3516,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, - - if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) - continue; -+ if (!crtc->active) -+ continue; - - I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); - -@@ -3716,66 +3701,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate, - else - *changed = true; - -- intel_crtc->wm.active.skl = *pipe_wm; -- - return 0; - } - --static void skl_update_other_pipe_wm(struct drm_device *dev, -- struct drm_crtc *crtc, -- struct skl_wm_values *r) --{ -- struct intel_crtc *intel_crtc; -- struct intel_crtc *this_crtc = to_intel_crtc(crtc); -- -- /* -- * If the WM update hasn't changed the allocation for this_crtc (the -- * crtc we are currently computing the new WM values for), other -- * enabled crtcs will keep the same allocation and we don't need to -- * recompute anything for them. -- */ -- if (!skl_ddb_allocation_changed(&r->ddb, this_crtc)) -- return; -- -- /* -- * Otherwise, because of this_crtc being freshly enabled/disabled, the -- * other active pipes need new DDB allocation and WM values. -- */ -- for_each_intel_crtc(dev, intel_crtc) { -- struct skl_pipe_wm pipe_wm = {}; -- bool wm_changed; -- -- if (this_crtc->pipe == intel_crtc->pipe) -- continue; -- -- if (!intel_crtc->active) -- continue; -- -- skl_update_pipe_wm(intel_crtc->base.state, -- &r->ddb, &pipe_wm, &wm_changed); -- -- /* -- * If we end up re-computing the other pipe WM values, it's -- * because it was really needed, so we expect the WM values to -- * be different. -- */ -- WARN_ON(!wm_changed); -- -- skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc); -- r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); -- } --} -- --static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) --{ -- watermarks->wm_linetime[pipe] = 0; -- memset(watermarks->plane[pipe], 0, -- sizeof(uint32_t) * 8 * I915_MAX_PLANES); -- memset(watermarks->plane_trans[pipe], -- 0, sizeof(uint32_t) * I915_MAX_PLANES); -- watermarks->plane_trans[pipe][PLANE_CURSOR] = 0; --} -- - static int - skl_compute_ddb(struct drm_atomic_state *state) - { -@@ -3783,6 +3711,7 @@ skl_compute_ddb(struct drm_atomic_state *state) - struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_atomic_state *intel_state = to_intel_atomic_state(state); - struct intel_crtc *intel_crtc; -+ struct skl_ddb_allocation *ddb = &intel_state->wm_results.ddb; - unsigned realloc_pipes = dev_priv->active_crtcs; - int ret; - -@@ -3808,8 +3737,10 @@ skl_compute_ddb(struct drm_atomic_state *state) - * any other display updates race with this transaction, so we need - * to grab the lock on *all* CRTC's. - */ -- if (intel_state->active_pipe_changes) -+ if (intel_state->active_pipe_changes) { - realloc_pipes = ~0; -+ intel_state->wm_results.dirty_pipes = ~0; -+ } - - for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) { - struct intel_crtc_state *cstate; -@@ -3818,7 +3749,7 @@ skl_compute_ddb(struct drm_atomic_state *state) - if (IS_ERR(cstate)) - return PTR_ERR(cstate); - -- ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb); -+ ret = skl_allocate_pipe_ddb(cstate, ddb); - if (ret) - return ret; - } -@@ -3831,8 +3762,11 @@ skl_compute_wm(struct drm_atomic_state *state) - { - struct drm_crtc *crtc; - struct drm_crtc_state *cstate; -- int ret, i; -+ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); -+ struct skl_wm_values *results = &intel_state->wm_results; -+ struct skl_pipe_wm *pipe_wm; - bool changed = false; -+ int ret, i; - - /* - * If this transaction isn't actually touching any CRTC's, don't -@@ -3847,10 +3781,45 @@ skl_compute_wm(struct drm_atomic_state *state) - if (!changed) - return 0; - -+ /* Clear all dirty flags */ -+ results->dirty_pipes = 0; -+ - ret = skl_compute_ddb(state); - if (ret) - return ret; - -+ /* -+ * Calculate WM's for all pipes that are part of this transaction. -+ * Note that the DDB allocation above may have added more CRTC's that -+ * weren't otherwise being modified (and set bits in dirty_pipes) if -+ * pipe allocations had to change. -+ * -+ * FIXME: Now that we're doing this in the atomic check phase, we -+ * should allow skl_update_pipe_wm() to return failure in cases where -+ * no suitable watermark values can be found. -+ */ -+ for_each_crtc_in_state(state, crtc, cstate, i) { -+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); -+ struct intel_crtc_state *intel_cstate = -+ to_intel_crtc_state(cstate); -+ -+ pipe_wm = &intel_cstate->wm.skl.optimal; -+ ret = skl_update_pipe_wm(cstate, &results->ddb, pipe_wm, -+ &changed); -+ if (ret) -+ return ret; -+ -+ if (changed) -+ results->dirty_pipes |= drm_crtc_mask(crtc); -+ -+ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0) -+ /* This pipe's WM's did not change */ -+ continue; -+ -+ intel_cstate->update_wm_pre = true; -+ skl_compute_wm_results(crtc->dev, pipe_wm, results, intel_crtc); -+ } -+ - return 0; - } - -@@ -3862,26 +3831,21 @@ static void skl_update_wm(struct drm_crtc *crtc) - struct skl_wm_values *results = &dev_priv->wm.skl_results; - struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); - struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; -- bool wm_changed; -- -- /* Clear all dirty flags */ -- results->dirty_pipes = 0; - -- skl_clear_wm(results, intel_crtc->pipe); -- -- skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed); -- if (!wm_changed) -+ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0) - return; - -- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); -- results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); -+ intel_crtc->wm.active.skl = *pipe_wm; -+ -+ mutex_lock(&dev_priv->wm.wm_mutex); - -- skl_update_other_pipe_wm(dev, crtc, results); - skl_write_wm_values(dev_priv, results); - skl_flush_wm_values(dev_priv, results); - - /* store the new configuration */ - dev_priv->wm.skl_hw = *results; -+ -+ mutex_unlock(&dev_priv->wm.wm_mutex); - } - - static void ilk_compute_wm_config(struct drm_device *dev, --- -2.7.4 - diff --git a/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch b/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch deleted file mode 100644 index 4fe8d8a98..000000000 --- a/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 2ad01780bf59b3a785975bf48a066645e5b6f7f5 Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:10 -0700 -Subject: [PATCH 16/17] drm/i915/gen9: Reject display updates that exceed wm - limitations (v2) - -If we can't find any valid level 0 watermark values for the requested -atomic transaction, reject the configuration before we try to start -programming the hardware. - -v2: - - Add extra debugging output when we reject level 0 watermarks so that - we can more easily debug how/why they were rejected. - -Cc: Lyude Paul <cpaul@redhat.com> -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index b072417..f764d28 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -3306,7 +3306,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, - - if (res_blocks >= ddb_allocation || res_lines > 31) { - *enabled = false; -- return 0; -+ -+ /* -+ * If there are no valid level 0 watermarks, then we can't -+ * support this display configuration. -+ */ -+ if (level) { -+ return 0; -+ } else { -+ DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n"); -+ DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n", -+ to_intel_crtc(cstate->base.crtc)->pipe, -+ skl_wm_plane_id(to_intel_plane(pstate->plane)), -+ res_blocks, ddb_allocation, res_lines); -+ -+ return -EINVAL; -+ } - } - - *out_blocks = res_blocks; --- -2.7.4 - diff --git a/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch b/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch deleted file mode 100644 index 73a6dacc6..000000000 --- a/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 73a35468564f4e47deade0a4a5eb7ec289611ebc Mon Sep 17 00:00:00 2001 -From: Matt Roper <matthew.d.roper@intel.com> -Date: Thu, 12 May 2016 07:06:11 -0700 -Subject: [PATCH 17/17] drm/i915: Remove wm_config from - dev_priv/intel_atomic_state - -We calculate the watermark config into intel_atomic_state and then save -it into dev_priv, but never actually use it from there. This is -left-over from some early ILK-style watermark programming designs that -got changed over time. - -Signed-off-by: Matt Roper <matthew.d.roper@intel.com> -Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> -Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com ---- - drivers/gpu/drm/i915/i915_drv.h | 3 --- - drivers/gpu/drm/i915/intel_display.c | 31 ------------------------------- - drivers/gpu/drm/i915/intel_drv.h | 1 - - 3 files changed, 35 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index e7bde72..608f8e4 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -1961,9 +1961,6 @@ struct drm_i915_private { - */ - uint16_t skl_latency[8]; - -- /* Committed wm config */ -- struct intel_wm_config config; -- - /* - * The skl_wm_values structure is a bit too big for stack - * allocation, so we keep the staging struct where we store -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index a75daac..9c109c6 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13343,35 +13343,6 @@ static int calc_watermark_data(struct drm_atomic_state *state) - { - struct drm_device *dev = state->dev; - struct drm_i915_private *dev_priv = to_i915(dev); -- struct intel_atomic_state *intel_state = to_intel_atomic_state(state); -- struct drm_crtc *crtc; -- struct drm_crtc_state *cstate; -- struct drm_plane *plane; -- struct drm_plane_state *pstate; -- -- /* -- * Calculate watermark configuration details now that derived -- * plane/crtc state is all properly updated. -- */ -- drm_for_each_crtc(crtc, dev) { -- cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?: -- crtc->state; -- -- if (cstate->active) -- intel_state->wm_config.num_pipes_active++; -- } -- drm_for_each_legacy_plane(plane, dev) { -- pstate = drm_atomic_get_existing_plane_state(state, plane) ?: -- plane->state; -- -- if (!to_intel_plane_state(pstate)->visible) -- continue; -- -- intel_state->wm_config.sprites_enabled = true; -- if (pstate->crtc_w != pstate->src_w >> 16 || -- pstate->crtc_h != pstate->src_h >> 16) -- intel_state->wm_config.sprites_scaled = true; -- } - - /* Is there platform-specific watermark information to calculate? */ - if (dev_priv->display.compute_global_watermarks) -@@ -13625,7 +13596,6 @@ static int intel_atomic_commit(struct drm_device *dev, - } - - drm_atomic_helper_swap_state(dev, state); -- dev_priv->wm.config = intel_state->wm_config; - dev_priv->wm.distrust_bios_wm = false; - dev_priv->wm.skl_results = intel_state->wm_results; - intel_shared_dpll_commit(state); -@@ -15405,7 +15375,6 @@ retry: - } - - /* Write calculated watermark values back */ -- to_i915(dev)->wm.config = to_intel_atomic_state(state)->wm_config; - for_each_crtc_in_state(state, crtc, cstate, i) { - struct intel_crtc_state *cs = to_intel_crtc_state(cstate); - -diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h -index ab0be7a..8d73c20 100644 ---- a/drivers/gpu/drm/i915/intel_drv.h -+++ b/drivers/gpu/drm/i915/intel_drv.h -@@ -305,7 +305,6 @@ struct intel_atomic_state { - unsigned int min_pixclk[I915_MAX_PIPES]; - - struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS]; -- struct intel_wm_config wm_config; - - /* - * Current watermarks can't be trusted during hardware readout, so --- -2.7.4 - diff --git a/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch b/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch index 23a514f3b..9500b96d2 100644 --- a/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch +++ b/PCI-Lock-down-BAR-access-when-module-security-is-ena.patch @@ -1,8 +1,7 @@ -From 655fbf360e1481db4f06001f893d388c15ac307f Mon Sep 17 00:00:00 2001 +From 6f756b32a45b022428e33ce20181e874c73ca82e Mon Sep 17 00:00:00 2001 From: Matthew Garrett <matthew.garrett@nebula.com> Date: Thu, 8 Mar 2012 10:10:38 -0500 -Subject: [PATCH 02/20] PCI: Lock down BAR access when module security is - enabled +Subject: [PATCH] PCI: Lock down BAR access when module security is enabled Any hardware that can potentially generate DMA has to be locked down from userspace in order to avoid it being possible for an attacker to modify @@ -18,7 +17,7 @@ Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com> 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c -index 312f23a8429c..93e6ac103dd0 100644 +index bcd10c7..a950301 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -30,6 +30,7 @@ @@ -29,7 +28,7 @@ index 312f23a8429c..93e6ac103dd0 100644 #include "pci.h" static int sysfs_initialized; /* = 0 */ -@@ -710,6 +711,9 @@ static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, +@@ -716,6 +717,9 @@ static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, loff_t init_off = off; u8 *data = (u8 *) buf; @@ -39,7 +38,7 @@ index 312f23a8429c..93e6ac103dd0 100644 if (off > dev->cfg_size) return 0; if (off + count > dev->cfg_size) { -@@ -1004,6 +1008,9 @@ static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, +@@ -1007,6 +1011,9 @@ static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, resource_size_t start, end; int i; @@ -49,7 +48,7 @@ index 312f23a8429c..93e6ac103dd0 100644 for (i = 0; i < PCI_ROM_RESOURCE; i++) if (res == &pdev->resource[i]) break; -@@ -1105,6 +1112,9 @@ static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, +@@ -1106,6 +1113,9 @@ static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, char *buf, loff_t off, size_t count) { @@ -60,7 +59,7 @@ index 312f23a8429c..93e6ac103dd0 100644 } diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c -index 3f155e78513f..4265ea07e3b0 100644 +index 2408abe..59f321c 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -116,6 +116,9 @@ static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf, @@ -85,7 +84,7 @@ index 3f155e78513f..4265ea07e3b0 100644 ret = pci_domain_nr(dev->bus); @@ -233,7 +239,7 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) struct pci_filp_private *fpriv = file->private_data; - int i, ret; + int i, ret, write_combine; - if (!capable(CAP_SYS_RAWIO)) + if (!capable(CAP_SYS_RAWIO) || secure_modules()) @@ -93,7 +92,7 @@ index 3f155e78513f..4265ea07e3b0 100644 /* Make sure the caller is mapping a real resource for this device */ diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c -index b91c4da68365..98f5637304d1 100644 +index b91c4da..98f5637 100644 --- a/drivers/pci/syscall.c +++ b/drivers/pci/syscall.c @@ -10,6 +10,7 @@ @@ -114,5 +113,5 @@ index b91c4da68365..98f5637304d1 100644 dev = pci_get_bus_and_slot(bus, dfn); -- -2.4.3 +2.9.2 diff --git a/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch b/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch deleted file mode 100644 index 657f7aab8..000000000 --- a/Revert-ALSA-hda-remove-controller-dependency-on-i915.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 89b9366047f51fcef7f7e36f2b351a98326c8656 Mon Sep 17 00:00:00 2001 -From: Hans de Goede <hdegoede@redhat.com> -Date: Tue, 12 Jul 2016 22:40:01 +0200 -Subject: [PATCH] Revert "ALSA: hda - remove controller dependency on i915 - power well for SKL" - -This reverts commit 03b135cebc47d75ea2dc346770374ab741966955. ---- - sound/pci/hda/hda_intel.c | 4 +++- - sound/pci/hda/patch_hdmi.c | 2 +- - 2 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c -index e320c44..290d60f 100644 ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -361,7 +361,9 @@ enum { - #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \ - ((pci)->device == 0x0c0c) || \ - ((pci)->device == 0x0d0c) || \ -- ((pci)->device == 0x160c)) -+ ((pci)->device == 0x160c) || \ -+ ((pci)->device == 0xa170) || \ -+ ((pci)->device == 0x9d70)) - - #define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170) - #define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70) -diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c -index d0d5ad8..9203da1 100644 ---- a/sound/pci/hda/patch_hdmi.c -+++ b/sound/pci/hda/patch_hdmi.c -@@ -2379,7 +2379,7 @@ static int patch_i915_hsw_hdmi(struct hda_codec *codec) - /* For Haswell/Broadwell, the controller is also in the power well and - * can cover the codec power request, and so need not set this flag. - */ -- if (!is_haswell(codec) && !is_broadwell(codec)) -+ if (!is_haswell(codec) && !is_broadwell(codec) && !is_skylake(codec)) - codec->core.link_power_control = 1; - - codec->patch_ops.set_power_state = haswell_set_power_state; --- -2.7.4 - diff --git a/arm-i.MX6-Utilite-device-dtb.patch b/arm-i.MX6-Utilite-device-dtb.patch deleted file mode 100644 index efffd77bd..000000000 --- a/arm-i.MX6-Utilite-device-dtb.patch +++ /dev/null @@ -1,354 +0,0 @@ -From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx> - -The CompuLab Utilite Pro is a miniature fanless desktop pc based on -the i.MX6 Quad powered cm-fx6 module. It features two serial ports, -USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and -DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt. - -Add initial support for it including USB, Ethernet (both ports), sata -and HDMI support. - -Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++++ - 2 files changed, 129 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 515a428..287044c 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -369,6 +369,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-tx6q-1110.dtb \ - imx6q-tx6q-11x0-mb7.dtb \ - imx6q-udoo.dtb \ -+ imx6q-utilite-pro.dtb \ - imx6q-wandboard.dtb \ - imx6q-wandboard-revb1.dtb \ - imx6qp-nitrogen6_max.dtb \ -diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts -new file mode 100644 -index 0000000..bcd8e0d ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts -@@ -0,0 +1,128 @@ -+/* -+ * Copyright 2016 Christopher Spinrath -+ * Copyright 2013 CompuLab Ltd. -+ * -+ * Based on the GPLv2 licensed devicetree distributed with the vendor -+ * kernel for the Utilite Pro: -+ * Copyright 2013 CompuLab Ltd. -+ * Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx> -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+#include "imx6q-cm-fx6.dts" -+ -+/ { -+ model = "CompuLab Utilite Pro"; -+ compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q"; -+ -+ aliases { -+ ethernet1 = ð1; -+ rtc0 = &em3027; -+ rtc1 = &snvs_rtc; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ power { -+ label = "Power Button"; -+ gpios = <&gpio1 29 1>; -+ linux,code = <116>; /* KEY_POWER */ -+ gpio-key,wakeup; -+ }; -+ }; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c2>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ em3027: rtc@56 { -+ compatible = "emmicro,em3027"; -+ reg = <0x56>; -+ }; -+}; -+ -+&i2c2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ /* power button */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -+ >; -+ }; -+ }; -+ -+ imx6q-utilite-pro { -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 -+ >; -+ }; -+ }; -+}; -+ -+&pcie { -+ pcie@0,0 { -+ reg = <0x000000 0 0 0 0>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ /* non-removable i211 ethernet card */ -+ eth1: intel,i211@pcie0,0 { -+ reg = <0x010000 0 0 0 0>; -+ }; -+ }; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ fsl,uart-has-rtscts; -+ dma-names = "rx", "tx"; -+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; -+ status = "okay"; -+}; --- -2.8.2 -From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx> - -The cm-fx6 module has an on-board spi-flash chip for its firmware, an -eeprom (containing e.g. the mac address of the on-board Ethernet), -a sata port, a pcie controller, an USB hub, and an USB otg port. -Enable support for them. In addition, enable syscon poweroff support. - -Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx> ---- - arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 136 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts -index 99b46f8..f4fc22e 100644 ---- a/arch/arm/boot/dts/imx6q-cm-fx6.dts -+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts -@@ -31,6 +31,61 @@ - linux,default-trigger = "heartbeat"; - }; - }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_usb_otg_vbus: usb_otg_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio7 8 0>; -+ enable-active-high; -+ }; -+ }; -+}; -+ -+&ecspi1 { -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25p", "jedec,spi-nor"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0x0 0xc0000>; -+ }; -+ -+ partition@c0000 { -+ label = "uboot environment"; -+ reg = <0xc0000 0x40000>; -+ }; -+ -+ partition@100000 { -+ label = "reserved"; -+ reg = <0x100000 0x100000>; -+ }; -+ }; - }; - - &fec { -@@ -46,8 +101,31 @@ - status = "okay"; - }; - -+&i2c3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ clock-frequency = <100000>; -+ -+ eeprom@50 { -+ compatible = "at24,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+}; -+ - &iomuxc { - imx6q-cm-fx6 { -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 -+ >; -+ }; -+ - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -@@ -91,17 +169,75 @@ - >; - }; - -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 -+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 -+ >; -+ }; -+ - pinctrl_uart4: uart4grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 - MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 - >; - }; -+ -+ pinctrl_usbh1: usbh1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ >; -+ }; - }; - }; - -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 26 0>; -+ power-on-gpio = <&gpio2 24 0>; -+ status = "okay"; -+}; -+ -+&sata { -+ status = "okay"; -+}; -+ -+&snvs_poweroff { -+ status = "okay"; -+}; -+ - &uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4>; - status = "okay"; - }; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ dr_mode = "otg"; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbh1>; -+ status = "okay"; -+}; --- -2.8.2 - diff --git a/arm64-pcie-acpi.patch b/arm64-pcie-acpi.patch deleted file mode 100644 index 50c646870..000000000 --- a/arm64-pcie-acpi.patch +++ /dev/null @@ -1,1247 +0,0 @@ -From 1fc02559de87cd88339a83ad05baa9c2b5bd1ac0 Mon Sep 17 00:00:00 2001 -From: Jayachandran C <jchandra@broadcom.com> -Date: Fri, 10 Jun 2016 21:55:09 +0200 -Subject: [PATCH 01/11] PCI/ECAM: Move ecam.h to linux/include/pci-ecam.h - -This header will be used from arch/arm64 for ACPI PCI implementation -so it needs to be moved out of drivers/pci. - -Update users of the header file to use the new name. No functional -changes. - -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/pci/ecam.c | 3 +- - drivers/pci/ecam.h | 67 ------------------------------------- - drivers/pci/host/pci-host-common.c | 3 +- - drivers/pci/host/pci-host-generic.c | 3 +- - drivers/pci/host/pci-thunder-ecam.c | 3 +- - drivers/pci/host/pci-thunder-pem.c | 3 +- - include/linux/pci-ecam.h | 67 +++++++++++++++++++++++++++++++++++++ - 7 files changed, 72 insertions(+), 77 deletions(-) - delete mode 100644 drivers/pci/ecam.h - create mode 100644 include/linux/pci-ecam.h - -diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c -index f9832ad..820e26b 100644 ---- a/drivers/pci/ecam.c -+++ b/drivers/pci/ecam.c -@@ -19,10 +19,9 @@ - #include <linux/kernel.h> - #include <linux/module.h> - #include <linux/pci.h> -+#include <linux/pci-ecam.h> - #include <linux/slab.h> - --#include "ecam.h" -- - /* - * On 64-bit systems, we do a single ioremap for the whole config space - * since we have enough virtual address range available. On 32-bit, we -diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h -deleted file mode 100644 -index 9878beb..0000000 ---- a/drivers/pci/ecam.h -+++ /dev/null -@@ -1,67 +0,0 @@ --/* -- * Copyright 2016 Broadcom -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License, version 2, as -- * published by the Free Software Foundation (the "GPL"). -- * -- * This program is distributed in the hope that it will be useful, but -- * WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -- * General Public License version 2 (GPLv2) for more details. -- * -- * You should have received a copy of the GNU General Public License -- * version 2 (GPLv2) along with this source code. -- */ --#ifndef DRIVERS_PCI_ECAM_H --#define DRIVERS_PCI_ECAM_H -- --#include <linux/kernel.h> --#include <linux/platform_device.h> -- --/* -- * struct to hold pci ops and bus shift of the config window -- * for a PCI controller. -- */ --struct pci_config_window; --struct pci_ecam_ops { -- unsigned int bus_shift; -- struct pci_ops pci_ops; -- int (*init)(struct device *, -- struct pci_config_window *); --}; -- --/* -- * struct to hold the mappings of a config space window. This -- * is expected to be used as sysdata for PCI controllers that -- * use ECAM. -- */ --struct pci_config_window { -- struct resource res; -- struct resource busr; -- void *priv; -- struct pci_ecam_ops *ops; -- union { -- void __iomem *win; /* 64-bit single mapping */ -- void __iomem **winp; /* 32-bit per-bus mapping */ -- }; --}; -- --/* create and free pci_config_window */ --struct pci_config_window *pci_ecam_create(struct device *dev, -- struct resource *cfgres, struct resource *busr, -- struct pci_ecam_ops *ops); --void pci_ecam_free(struct pci_config_window *cfg); -- --/* map_bus when ->sysdata is an instance of pci_config_window */ --void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, -- int where); --/* default ECAM ops */ --extern struct pci_ecam_ops pci_generic_ecam_ops; -- --#ifdef CONFIG_PCI_HOST_GENERIC --/* for DT-based PCI controllers that support ECAM */ --int pci_host_common_probe(struct platform_device *pdev, -- struct pci_ecam_ops *ops); --#endif --#endif -diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c -index 8cba7ab..c18b9e3 100644 ---- a/drivers/pci/host/pci-host-common.c -+++ b/drivers/pci/host/pci-host-common.c -@@ -20,10 +20,9 @@ - #include <linux/module.h> - #include <linux/of_address.h> - #include <linux/of_pci.h> -+#include <linux/pci-ecam.h> - #include <linux/platform_device.h> - --#include "../ecam.h" -- - static int gen_pci_parse_request_of_pci_ranges(struct device *dev, - struct list_head *resources, struct resource **bus_range) - { -diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c -index 6eaceab..f0ca6de 100644 ---- a/drivers/pci/host/pci-host-generic.c -+++ b/drivers/pci/host/pci-host-generic.c -@@ -23,10 +23,9 @@ - #include <linux/module.h> - #include <linux/of_address.h> - #include <linux/of_pci.h> -+#include <linux/pci-ecam.h> - #include <linux/platform_device.h> - --#include "../ecam.h" -- - static struct pci_ecam_ops gen_pci_cfg_cam_bus_ops = { - .bus_shift = 16, - .pci_ops = { -diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c -index 540d030..a9fc1c9 100644 ---- a/drivers/pci/host/pci-thunder-ecam.c -+++ b/drivers/pci/host/pci-thunder-ecam.c -@@ -11,10 +11,9 @@ - #include <linux/ioport.h> - #include <linux/of_pci.h> - #include <linux/of.h> -+#include <linux/pci-ecam.h> - #include <linux/platform_device.h> - --#include "../ecam.h" -- - static void set_val(u32 v, int where, int size, u32 *val) - { - int shift = (where & 3) * 8; -diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c -index 9b8ab94..5020d3d 100644 ---- a/drivers/pci/host/pci-thunder-pem.c -+++ b/drivers/pci/host/pci-thunder-pem.c -@@ -18,10 +18,9 @@ - #include <linux/module.h> - #include <linux/of_address.h> - #include <linux/of_pci.h> -+#include <linux/pci-ecam.h> - #include <linux/platform_device.h> - --#include "../ecam.h" -- - #define PEM_CFG_WR 0x28 - #define PEM_CFG_RD 0x30 - -diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h -new file mode 100644 -index 0000000..9878beb ---- /dev/null -+++ b/include/linux/pci-ecam.h -@@ -0,0 +1,67 @@ -+/* -+ * Copyright 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+#ifndef DRIVERS_PCI_ECAM_H -+#define DRIVERS_PCI_ECAM_H -+ -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+ -+/* -+ * struct to hold pci ops and bus shift of the config window -+ * for a PCI controller. -+ */ -+struct pci_config_window; -+struct pci_ecam_ops { -+ unsigned int bus_shift; -+ struct pci_ops pci_ops; -+ int (*init)(struct device *, -+ struct pci_config_window *); -+}; -+ -+/* -+ * struct to hold the mappings of a config space window. This -+ * is expected to be used as sysdata for PCI controllers that -+ * use ECAM. -+ */ -+struct pci_config_window { -+ struct resource res; -+ struct resource busr; -+ void *priv; -+ struct pci_ecam_ops *ops; -+ union { -+ void __iomem *win; /* 64-bit single mapping */ -+ void __iomem **winp; /* 32-bit per-bus mapping */ -+ }; -+}; -+ -+/* create and free pci_config_window */ -+struct pci_config_window *pci_ecam_create(struct device *dev, -+ struct resource *cfgres, struct resource *busr, -+ struct pci_ecam_ops *ops); -+void pci_ecam_free(struct pci_config_window *cfg); -+ -+/* map_bus when ->sysdata is an instance of pci_config_window */ -+void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, -+ int where); -+/* default ECAM ops */ -+extern struct pci_ecam_ops pci_generic_ecam_ops; -+ -+#ifdef CONFIG_PCI_HOST_GENERIC -+/* for DT-based PCI controllers that support ECAM */ -+int pci_host_common_probe(struct platform_device *pdev, -+ struct pci_ecam_ops *ops); -+#endif -+#endif --- -2.7.4 - -From 5eb9996fc097629854f359f9ad3d959fdacb7f8f Mon Sep 17 00:00:00 2001 -From: Jayachandran C <jchandra@broadcom.com> -Date: Fri, 10 Jun 2016 21:55:10 +0200 -Subject: [PATCH 02/11] PCI/ECAM: Add parent device field to pci_config_window - -Add a parent device field to struct pci_config_window. The parent -is not saved now, but will be useful to save it in some cases. -Specifically in case of ACPI for ARM64, it can be used to setup -ACPI companion and domain. - -Since the parent dev is in struct pci_config_window now, we need -not pass it to the init function as a separate argument. - -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/pci/ecam.c | 3 ++- - drivers/pci/host/pci-thunder-pem.c | 3 ++- - include/linux/pci-ecam.h | 4 ++-- - 3 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c -index 820e26b..66e0d71 100644 ---- a/drivers/pci/ecam.c -+++ b/drivers/pci/ecam.c -@@ -51,6 +51,7 @@ struct pci_config_window *pci_ecam_create(struct device *dev, - if (!cfg) - return ERR_PTR(-ENOMEM); - -+ cfg->parent = dev; - cfg->ops = ops; - cfg->busr.start = busr->start; - cfg->busr.end = busr->end; -@@ -94,7 +95,7 @@ struct pci_config_window *pci_ecam_create(struct device *dev, - } - - if (ops->init) { -- err = ops->init(dev, cfg); -+ err = ops->init(cfg); - if (err) - goto err_exit; - } -diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c -index 5020d3d..91f6fc6 100644 ---- a/drivers/pci/host/pci-thunder-pem.c -+++ b/drivers/pci/host/pci-thunder-pem.c -@@ -284,8 +284,9 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn, - return pci_generic_config_write(bus, devfn, where, size, val); - } - --static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg) -+static int thunder_pem_init(struct pci_config_window *cfg) - { -+ struct device *dev = cfg->parent; - resource_size_t bar4_start; - struct resource *res_pem; - struct thunder_pem_pci *pem_pci; -diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h -index 9878beb..7adad20 100644 ---- a/include/linux/pci-ecam.h -+++ b/include/linux/pci-ecam.h -@@ -27,8 +27,7 @@ struct pci_config_window; - struct pci_ecam_ops { - unsigned int bus_shift; - struct pci_ops pci_ops; -- int (*init)(struct device *, -- struct pci_config_window *); -+ int (*init)(struct pci_config_window *); - }; - - /* -@@ -45,6 +44,7 @@ struct pci_config_window { - void __iomem *win; /* 64-bit single mapping */ - void __iomem **winp; /* 32-bit per-bus mapping */ - }; -+ struct device *parent;/* ECAM res was from this dev */ - }; - - /* create and free pci_config_window */ --- -2.7.4 - -From 6ed6c1365df5c9201e9b275e8ed4eaa64ef2ec0d Mon Sep 17 00:00:00 2001 -From: Sinan Kaya <okaya@codeaurora.org> -Date: Fri, 10 Jun 2016 21:55:11 +0200 -Subject: [PATCH 03/11] PCI: Add new function to unmap IO resources - -We need to release I/O resources so that the same I/O resources -can be allocated again in pci_remap_iospace(), like in PCI hotplug removal -scenario. Therefore implement new pci_unmap_iospace() call which -unmaps I/O space as the symmetry to pci_remap_iospace(). - -Signed-off-by: Sinan Kaya <okaya@codeaurora.org> -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/pci/pci.c | 18 ++++++++++++++++++ - include/linux/pci.h | 1 + - 2 files changed, 19 insertions(+) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index c8b4dbd..eb431b5 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -25,6 +25,7 @@ - #include <linux/device.h> - #include <linux/pm_runtime.h> - #include <linux/pci_hotplug.h> -+#include <linux/vmalloc.h> - #include <asm/setup.h> - #include <linux/aer.h> - #include "pci.h" -@@ -3165,6 +3166,23 @@ int __weak pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) - #endif - } - -+/** -+ * pci_unmap_iospace - Unmap the memory mapped I/O space -+ * @res: resource to be unmapped -+ * -+ * Unmap the CPU virtual address @res from virtual address space. -+ * Only architectures that have memory mapped IO functions defined -+ * (and the PCI_IOBASE value defined) should call this function. -+ */ -+void pci_unmap_iospace(struct resource *res) -+{ -+#if defined(PCI_IOBASE) && defined(CONFIG_MMU) -+ unsigned long vaddr = (unsigned long)PCI_IOBASE + res->start; -+ -+ unmap_kernel_range(vaddr, resource_size(res)); -+#endif -+} -+ - static void __pci_set_master(struct pci_dev *dev, bool enable) - { - u16 old_cmd, cmd; -diff --git a/include/linux/pci.h b/include/linux/pci.h -index b67e4df..12349de 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1167,6 +1167,7 @@ int pci_register_io_range(phys_addr_t addr, resource_size_t size); - unsigned long pci_address_to_pio(phys_addr_t addr); - phys_addr_t pci_pio_to_address(unsigned long pio); - int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); -+void pci_unmap_iospace(struct resource *res); - - static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) - { --- -2.7.4 - -From 62f4d54fc2d2882b9ebaa920189574f422e12207 Mon Sep 17 00:00:00 2001 -From: Jayachandran C <jchandra@broadcom.com> -Date: Fri, 10 Jun 2016 21:55:12 +0200 -Subject: [PATCH 04/11] ACPI/PCI: Support IO resources when parsing PCI host - bridge resources - -Platforms that have memory mapped IO port (such as ARM64) need special -handling for PCI I/O resources. For host bridge's resource probing case -these resources need to be fixed up with -pci_register_io_range()/pci_remap_iospace() etc. - -The same I/O resources need to be released after hotplug -removal so that it can be re-added back by the pci_remap_iospace() -function during insertion. As a consequence unmap I/O resources -with pci_unmap_iospace() when we release host bridge resources. - -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Signed-off-by: Sinan Kaya <okaya@codeaurora.org> -[ Tomasz: merged in Sinan's patch to unmap IO resources properly, updated changelog] -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/acpi/pci_root.c | 39 +++++++++++++++++++++++++++++++++++++++ - 1 file changed, 39 insertions(+) - -diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c -index ae3fe4e..9a26dd1 100644 ---- a/drivers/acpi/pci_root.c -+++ b/drivers/acpi/pci_root.c -@@ -720,6 +720,40 @@ next: - } - } - -+#ifdef PCI_IOBASE -+static void acpi_pci_root_remap_iospace(struct resource_entry *entry) -+{ -+ struct resource *res = entry->res; -+ resource_size_t cpu_addr = res->start; -+ resource_size_t pci_addr = cpu_addr - entry->offset; -+ resource_size_t length = resource_size(res); -+ unsigned long port; -+ -+ if (pci_register_io_range(cpu_addr, length)) -+ goto err; -+ -+ port = pci_address_to_pio(cpu_addr); -+ if (port == (unsigned long)-1) -+ goto err; -+ -+ res->start = port; -+ res->end = port + length - 1; -+ entry->offset = port - pci_addr; -+ -+ if (pci_remap_iospace(res, cpu_addr) < 0) -+ goto err; -+ -+ pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); -+ return; -+err: -+ res->flags |= IORESOURCE_DISABLED; -+} -+#else -+static inline void acpi_pci_root_remap_iospace(struct resource_entry *entry) -+{ -+} -+#endif -+ - int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) - { - int ret; -@@ -740,6 +774,9 @@ int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) - "no IO and memory resources present in _CRS\n"); - else { - resource_list_for_each_entry_safe(entry, tmp, list) { -+ if (entry->res->flags & IORESOURCE_IO) -+ acpi_pci_root_remap_iospace(entry); -+ - if (entry->res->flags & IORESOURCE_DISABLED) - resource_list_destroy_entry(entry); - else -@@ -811,6 +848,8 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) - - resource_list_for_each_entry(entry, &bridge->windows) { - res = entry->res; -+ if (res->flags & IORESOURCE_IO) -+ pci_unmap_iospace(res); - if (res->parent && - (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) - release_resource(res); --- -2.7.4 - -From dd4f7822d702cca83baa1de7a5f69344ffb82af9 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:13 +0200 -Subject: [PATCH 05/11] ACPI/PCI: Add generic MCFG table handling - -According to PCI firmware specifications, on systems booting with ACPI, -PCI configuration for a host bridge must be set-up through the MCFG table -regions for non-hotpluggable bridges and _CBA method for hotpluggable ones. - -Current MCFG table handling code, as implemented for x86, cannot be -easily generalized owing to x86 specific quirks handling and related -code, which makes it hard to reuse on other architectures. - -In order to implement MCFG PCI configuration handling for new platforms -booting with ACPI (eg ARM64) this patch re-implements MCFG handling from -scratch in a streamlined fashion and provides (through a generic -interface available to all arches): - -- Simplified MCFG table parsing (executed through the pci_mmcfg_late_init() - hook as in current x86) -- MCFG regions look-up interface through domain:bus_start:bus_end tuple - -The new MCFG regions handling interface is added to generic ACPI code -so that existing architectures (eg x86) can be moved over to it and -architectures relying on MCFG for ACPI PCI config space can rely on it -without having to resort to arch specific implementations. - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/acpi/Kconfig | 3 ++ - drivers/acpi/Makefile | 1 + - drivers/acpi/pci_mcfg.c | 92 ++++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/pci-acpi.h | 2 ++ - include/linux/pci.h | 2 +- - 5 files changed, 99 insertions(+), 1 deletion(-) - create mode 100644 drivers/acpi/pci_mcfg.c - -diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig -index b7e2e77..f98c328 100644 ---- a/drivers/acpi/Kconfig -+++ b/drivers/acpi/Kconfig -@@ -217,6 +217,9 @@ config ACPI_PROCESSOR_IDLE - bool - select CPU_IDLE - -+config ACPI_MCFG -+ bool -+ - config ACPI_CPPC_LIB - bool - depends on ACPI_PROCESSOR -diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile -index 251ce85..632e81f 100644 ---- a/drivers/acpi/Makefile -+++ b/drivers/acpi/Makefile -@@ -40,6 +40,7 @@ acpi-$(CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC) += processor_pdc.o - acpi-y += ec.o - acpi-$(CONFIG_ACPI_DOCK) += dock.o - acpi-y += pci_root.o pci_link.o pci_irq.o -+obj-$(CONFIG_ACPI_MCFG) += pci_mcfg.o - acpi-y += acpi_lpss.o acpi_apd.o - acpi-y += acpi_platform.o - acpi-y += acpi_pnp.o -diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -new file mode 100644 -index 0000000..d3c3e85 ---- /dev/null -+++ b/drivers/acpi/pci_mcfg.c -@@ -0,0 +1,92 @@ -+/* -+ * Copyright (C) 2016 Broadcom -+ * Author: Jayachandran C <jchandra@broadcom.com> -+ * Copyright (C) 2016 Semihalf -+ * Author: Tomasz Nowicki <tn@semihalf.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+ -+#define pr_fmt(fmt) "ACPI: " fmt -+ -+#include <linux/kernel.h> -+#include <linux/pci.h> -+#include <linux/pci-acpi.h> -+ -+/* Structure to hold entries from the MCFG table */ -+struct mcfg_entry { -+ struct list_head list; -+ phys_addr_t addr; -+ u16 segment; -+ u8 bus_start; -+ u8 bus_end; -+}; -+ -+/* List to save mcfg entries */ -+static LIST_HEAD(pci_mcfg_list); -+ -+phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) -+{ -+ struct mcfg_entry *e; -+ -+ /* -+ * We expect exact match, unless MCFG entry end bus covers more than -+ * specified by caller. -+ */ -+ list_for_each_entry(e, &pci_mcfg_list, list) { -+ if (e->segment == seg && e->bus_start == bus_res->start && -+ e->bus_end >= bus_res->end) -+ return e->addr; -+ } -+ -+ return 0; -+} -+ -+static __init int pci_mcfg_parse(struct acpi_table_header *header) -+{ -+ struct acpi_table_mcfg *mcfg; -+ struct acpi_mcfg_allocation *mptr; -+ struct mcfg_entry *e, *arr; -+ int i, n; -+ -+ if (header->length < sizeof(struct acpi_table_mcfg)) -+ return -EINVAL; -+ -+ n = (header->length - sizeof(struct acpi_table_mcfg)) / -+ sizeof(struct acpi_mcfg_allocation); -+ mcfg = (struct acpi_table_mcfg *)header; -+ mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; -+ -+ arr = kcalloc(n, sizeof(*arr), GFP_KERNEL); -+ if (!arr) -+ return -ENOMEM; -+ -+ for (i = 0, e = arr; i < n; i++, mptr++, e++) { -+ e->segment = mptr->pci_segment; -+ e->addr = mptr->address; -+ e->bus_start = mptr->start_bus_number; -+ e->bus_end = mptr->end_bus_number; -+ list_add(&e->list, &pci_mcfg_list); -+ } -+ -+ pr_info("MCFG table detected, %d entries\n", n); -+ return 0; -+} -+ -+/* Interface called by ACPI - parse and save MCFG table */ -+void __init pci_mmcfg_late_init(void) -+{ -+ int err = acpi_table_parse(ACPI_SIG_MCFG, pci_mcfg_parse); -+ if (err) -+ pr_err("Failed to parse MCFG (%d)\n", err); -+} -diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h -index 89ab057..7d63a66 100644 ---- a/include/linux/pci-acpi.h -+++ b/include/linux/pci-acpi.h -@@ -24,6 +24,8 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) - } - extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); - -+extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res); -+ - static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) - { - struct pci_bus *pbus = pdev->bus; -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 12349de..ce03d65 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1723,7 +1723,7 @@ void pcibios_free_irq(struct pci_dev *dev); - extern struct dev_pm_ops pcibios_pm_ops; - #endif - --#ifdef CONFIG_PCI_MMCONFIG -+#if defined(CONFIG_PCI_MMCONFIG) || defined(CONFIG_ACPI_MCFG) - void __init pci_mmcfg_early_init(void); - void __init pci_mmcfg_late_init(void); - #else --- -2.7.4 - -From fc1907f9c79f9a0a0c2f4d579896e678915fec48 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:14 +0200 -Subject: [PATCH 06/11] PCI: Refactor generic bus domain assignment - -Change the way PCI bus domain number is assigned and improve function -name to reflect what function does. No functional changes. - -Instead of assigning bus domain number inside of pci_bus_assign_domain_nr() -simply return domain number and let pci_create_root_bus() do assignment. -This way pci_create_root_bus() setups bus structure data in the consistent -way. Since pci_bus_assign_domain_nr() now does not assign but retrieves -domain number instead, rename it to pci_bus_find_domain_nr(). - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/pci/pci.c | 4 ++-- - drivers/pci/probe.c | 4 +++- - include/linux/pci.h | 7 +------ - 3 files changed, 6 insertions(+), 9 deletions(-) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index eb431b5..b9a7833 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -4941,7 +4941,7 @@ int pci_get_new_domain_nr(void) - } - - #ifdef CONFIG_PCI_DOMAINS_GENERIC --void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - { - static int use_dt_domains = -1; - int domain = -1; -@@ -4985,7 +4985,7 @@ void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) - domain = -1; - } - -- bus->domain_nr = domain; -+ return domain; - } - #endif - #endif -diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c -index 8e3ef72..380d46d 100644 ---- a/drivers/pci/probe.c -+++ b/drivers/pci/probe.c -@@ -2127,7 +2127,9 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, - b->sysdata = sysdata; - b->ops = ops; - b->number = b->busn_res.start = bus; -- pci_bus_assign_domain_nr(b, parent); -+#ifdef CONFIG_PCI_DOMAINS_GENERIC -+ b->domain_nr = pci_bus_find_domain_nr(b, parent); -+#endif - b2 = pci_find_bus(pci_domain_nr(b), bus); - if (b2) { - /* If we already got to this bus through a different bridge, ignore it */ -diff --git a/include/linux/pci.h b/include/linux/pci.h -index ce03d65..48839e8 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1390,12 +1390,7 @@ static inline int pci_domain_nr(struct pci_bus *bus) - { - return bus->domain_nr; - } --void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); --#else --static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, -- struct device *parent) --{ --} -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); - #endif - - /* some architectures require additional setup to direct VGA traffic */ --- -2.7.4 - -From d6d45ae1d58658111d5e838c41b9ed4729bbb81e Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:15 +0200 -Subject: [PATCH 07/11] PCI: Factor DT specific pci_bus_find_domain_nr() code - out - -pci_bus_find_domain_nr() retrieves the host bridge domain number in a DT -specific way. Factor our pci_bus_find_domain_nr() in a separate DT -function (ie of_pci_bus_find_domain_nr()) so that DT code is self -contained, paving the way for retrieving domain number in -pci_bus_find_domain_nr() with additional firmware methods (ie ACPI). - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - drivers/pci/pci.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index b9a7833..97f7cd4 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -4941,7 +4941,7 @@ int pci_get_new_domain_nr(void) - } - - #ifdef CONFIG_PCI_DOMAINS_GENERIC --int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) -+static int of_pci_bus_find_domain_nr(struct device *parent) - { - static int use_dt_domains = -1; - int domain = -1; -@@ -4987,6 +4987,11 @@ int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - - return domain; - } -+ -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) -+{ -+ return of_pci_bus_find_domain_nr(parent); -+} - #endif - #endif - --- -2.7.4 - -From 92d59511fd365d3c0c31d074b5e96cf48c58f68b Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Thu, 30 Jun 2016 16:56:24 +0100 -Subject: [PATCH 08/11] ARM64/PCI: Add ACPI hook to assign domain number - -PCI core code provides a config option (CONFIG_PCI_DOMAINS_GENERIC) -that allows assigning the PCI bus domain number generically by -relying on device tree bindings, and falling back to a simple counter -when the respective DT properties (ie "linux,pci-domain") are not -specified in the host bridge device tree node. - -In a similar way, when a system is booted through ACPI, architectures -that are selecting CONFIG_PCI_DOMAINS_GENERIC (ie ARM64) require kernel -hooks to retrieve the domain number so that the PCI bus domain number -set-up can be handled seamlessly with DT and ACPI in generic core code -when CONFIG_PCI_DOMAINS_GENERIC is selected. - -Since currently it is not possible to retrieve a pointer to the PCI -host bridge ACPI device backing the host bridge from core PCI code -(which would allow retrieving the domain number in an arch agnostic -way through the ACPI _SEG method), an arch specific ACPI hook has to -be declared and implemented by all arches that rely on -CONFIG_PCI_DOMAINS_GENERIC to retrieve the domain number and set it -up in core PCI code. - -For the aforementioned reasons, introduce acpi_pci_bus_find_domain_nr() -hook to retrieve the domain number on a per-arch basis when the system -boots through ACPI. ARM64 dummy implementation of the same is provided -in first place in preparation for ARM64 ACPI based PCI host controller -driver. - -acpi_pci_bus_find_domain_nr() is called from generic -pci_bus_find_domain_nr() as an ACPI option to DT domain assignment. - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - arch/arm64/kernel/pci.c | 7 +++++++ - drivers/pci/pci.c | 4 +++- - include/linux/pci.h | 7 +++++++ - 3 files changed, 17 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 3c4e308..d5d3d26 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -17,6 +17,7 @@ - #include <linux/mm.h> - #include <linux/of_pci.h> - #include <linux/of_platform.h> -+#include <linux/pci.h> - #include <linux/slab.h> - - /* -@@ -85,6 +86,12 @@ EXPORT_SYMBOL(pcibus_to_node); - #endif - - #ifdef CONFIG_ACPI -+ -+int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -+{ -+ return 0; -+} -+ - /* Root bridge scanning */ - struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) - { -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index 97f7cd4..4834cee 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -7,6 +7,7 @@ - * Copyright 1997 -- 2000 Martin Mares <mj@ucw.cz> - */ - -+#include <linux/acpi.h> - #include <linux/kernel.h> - #include <linux/delay.h> - #include <linux/init.h> -@@ -4990,7 +4991,8 @@ static int of_pci_bus_find_domain_nr(struct device *parent) - - int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - { -- return of_pci_bus_find_domain_nr(parent); -+ return acpi_disabled ? of_pci_bus_find_domain_nr(parent) : -+ acpi_pci_bus_find_domain_nr(bus); - } - #endif - #endif -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 48839e8..49ba8af 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1390,6 +1390,13 @@ static inline int pci_domain_nr(struct pci_bus *bus) - { - return bus->domain_nr; - } -+/* Arch specific ACPI hook to set-up domain number */ -+#ifdef CONFIG_ACPI -+int acpi_pci_bus_find_domain_nr(struct pci_bus *bus); -+#else -+static inline int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -+{ return 0; } -+#endif - int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); - #endif - --- -2.7.4 - -From bb06753d2e163d8100a017f06a6d9dd195d68a76 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:17 +0200 -Subject: [PATCH 09/11] ARM64/PCI: ACPI support for legacy IRQs parsing and - consolidation with DT code - -To enable PCI legacy IRQs on platforms booting with ACPI, arch code -should include ACPI specific callbacks that parse and set-up the -device IRQ number, equivalent to the DT boot path. Owing to the current -ACPI core scan handlers implementation, ACPI PCI legacy IRQs bindings -cannot be parsed at device add time, since that would trigger ACPI scan -handlers ordering issues depending on how the ACPI tables are defined. - -To solve this problem and consolidate FW PCI legacy IRQs parsing in -one single pcibios callback (pending final removal), this patch moves -DT PCI IRQ parsing to the pcibios_alloc_irq() callback (called by -PCI core code at device probe time) and adds ACPI PCI legacy IRQs -parsing to the same callback too, so that FW PCI legacy IRQs parsing -is confined in one single arch callback that can be easily removed -when code parsing PCI legacy IRQs is consolidated and moved to core -PCI code. - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Suggested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - arch/arm64/kernel/pci.c | 11 ++++++++--- - 1 file changed, 8 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index d5d3d26..b3b8a2c 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -51,11 +51,16 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) - } - - /* -- * Try to assign the IRQ number from DT when adding a new device -+ * Try to assign the IRQ number when probing a new device - */ --int pcibios_add_device(struct pci_dev *dev) -+int pcibios_alloc_irq(struct pci_dev *dev) - { -- dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); -+ if (acpi_disabled) -+ dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); -+#ifdef CONFIG_ACPI -+ else -+ return acpi_pci_irq_enable(dev); -+#endif - - return 0; - } --- -2.7.4 - -From b6e298840f532192a589f8ade128dec3fef3a4c6 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:18 +0200 -Subject: [PATCH 10/11] ARM64/PCI: Implement ACPI low-level calls to access - PCI_Config region from AML - -ACPI spec6.1 - chapter: 5.5.2.4 defines OperationRegion (Declare Operation -Region). Following the spec: " [...] An Operation Region is a specific -region of operation within an address space that is declared as a subset -of the entire address space using a starting address (offset) and a length. -Control methods must have exclusive access to any address accessed via -fields declared in Operation Regions. [...]". - -OperationRegion allows to declare various of operation region address space -identifiers including PCI_Config. PCI_Config is meant to access PCI -configuration space from the ASL. So every time ASL opcode operates -on PCI_Config space region, ASL interpreter dispatches accesses to OS -low-level calls - raw_pci_write() and raw_pci_read() for Linux - so-called -ACPI RAW accessors. - -In order to support PCI_Config operation region, implement mentioned -raw_pci_write() and raw_pci_read() calls so they find associated bus -and call read/write ops. - -Waiting for clarification in the ACPI specifications in relation -to PCI_Config space handling before PCI bus enumeration is completed, -current code does not support PCI_Config region accesses before PCI bus -enumeration whilst providing full AML PCI_Config access availability -when the PCI bus enumeration is completed by the kernel so that -RAW accessors can look-up PCI operations through the struct pci_bus -associated with a PCI bus. - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - arch/arm64/kernel/pci.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index b3b8a2c..328f857 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -71,13 +71,21 @@ int pcibios_alloc_irq(struct pci_dev *dev) - int raw_pci_read(unsigned int domain, unsigned int bus, - unsigned int devfn, int reg, int len, u32 *val) - { -- return -ENXIO; -+ struct pci_bus *b = pci_find_bus(domain, bus); -+ -+ if (!b) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ return b->ops->read(b, devfn, reg, len, val); - } - - int raw_pci_write(unsigned int domain, unsigned int bus, - unsigned int devfn, int reg, int len, u32 val) - { -- return -ENXIO; -+ struct pci_bus *b = pci_find_bus(domain, bus); -+ -+ if (!b) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ return b->ops->write(b, devfn, reg, len, val); - } - - #ifdef CONFIG_NUMA --- -2.7.4 - -From 3b8cff3fa89ba3ef6f1cf09a0667aa470b7fad0b Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki <tn@semihalf.com> -Date: Fri, 10 Jun 2016 21:55:19 +0200 -Subject: [PATCH 11/11] ARM64/PCI: Support for ACPI based PCI host controller - -Implement pci_acpi_scan_root and other arch-specific call so that ARM64 -can start using ACPI to setup and enumerate PCI buses. - -Prior to buses enumeration the pci_acpi_scan_root() implementation looks -for configuration space start address (obtained through ACPI _CBA method or -MCFG interface). If succeed, it uses ECAM library to create new mapping. -Then it attaches generic ECAM ops (pci_generic_ecam_ops) which are used -for accessing configuration space later on. - -On ARM64, we need to use generic domains (CONFIG_PCI_DOMAINS_GENERIC). -In order to achieve that for ACPI case implement -acpi_pci_bus_find_domain_nr() body so that it retrieves pci_config_window -structure from bus sysdata and eventually gets domain number from -acpi_pci_root structure. - -ACPI requires to run acpi_pci_{add|remove}_bus while new PCI bus is created. -This allows to do some ACPI-specific additional configuration, like -PCI hotplug slot enumeration. In order to fulfill these requirements, -we implement arch-specific pcibios_{add|remove}_bus calls -and call acpi_pci_{add|remove}_bus from there. - -Signed-off-by: Tomasz Nowicki <tn@semihalf.com> -Signed-off-by: Jayachandran C <jchandra@broadcom.com> -Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> ---- - arch/arm64/Kconfig | 2 + - arch/arm64/kernel/pci.c | 116 ++++++++++++++++++++++++++++++++++++++++++++++-- - 2 files changed, 115 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig -index 5a0a691..4806cde 100644 ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -3,6 +3,7 @@ config ARM64 - select ACPI_CCA_REQUIRED if ACPI - select ACPI_GENERIC_GSI if ACPI - select ACPI_REDUCED_HARDWARE_ONLY if ACPI -+ select ACPI_MCFG if ACPI - select ARCH_HAS_DEVMEM_IS_ALLOWED - select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE -@@ -96,6 +97,7 @@ config ARM64 - select OF_EARLY_FLATTREE - select OF_NUMA if NUMA && OF - select OF_RESERVED_MEM -+ select PCI_ECAM if ACPI - select PERF_USE_VMALLOC - select POWER_RESET - select POWER_SUPPLY -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 328f857..94cd43c 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -18,6 +18,8 @@ - #include <linux/of_pci.h> - #include <linux/of_platform.h> - #include <linux/pci.h> -+#include <linux/pci-acpi.h> -+#include <linux/pci-ecam.h> - #include <linux/slab.h> - - /* -@@ -100,15 +102,123 @@ EXPORT_SYMBOL(pcibus_to_node); - - #ifdef CONFIG_ACPI - -+struct acpi_pci_generic_root_info { -+ struct acpi_pci_root_info common; -+ struct pci_config_window *cfg; /* config space mapping */ -+}; -+ - int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) - { -+ struct pci_config_window *cfg = bus->sysdata; -+ struct acpi_device *adev = to_acpi_device(cfg->parent); -+ struct acpi_pci_root *root = acpi_driver_data(adev); -+ -+ return root->segment; -+} -+ -+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -+{ -+ if (!acpi_disabled) { -+ struct pci_config_window *cfg = bridge->bus->sysdata; -+ struct acpi_device *adev = to_acpi_device(cfg->parent); -+ ACPI_COMPANION_SET(&bridge->dev, adev); -+ } -+ - return 0; - } - --/* Root bridge scanning */ -+/* -+ * Lookup the bus range for the domain in MCFG, and set up config space -+ * mapping. -+ */ -+static struct pci_config_window * -+pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) -+{ -+ struct resource *bus_res = &root->secondary; -+ u16 seg = root->segment; -+ struct pci_config_window *cfg; -+ struct resource cfgres; -+ unsigned int bsz; -+ -+ /* Use address from _CBA if present, otherwise lookup MCFG */ -+ if (!root->mcfg_addr) -+ root->mcfg_addr = pci_mcfg_lookup(seg, bus_res); -+ -+ if (!root->mcfg_addr) { -+ dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n", -+ seg, bus_res); -+ return NULL; -+ } -+ -+ bsz = 1 << pci_generic_ecam_ops.bus_shift; -+ cfgres.start = root->mcfg_addr + bus_res->start * bsz; -+ cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1; -+ cfgres.flags = IORESOURCE_MEM; -+ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, -+ &pci_generic_ecam_ops); -+ if (IS_ERR(cfg)) { -+ dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", -+ seg, bus_res, PTR_ERR(cfg)); -+ return NULL; -+ } -+ -+ return cfg; -+} -+ -+/* release_info: free resources allocated by init_info */ -+static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) -+{ -+ struct acpi_pci_generic_root_info *ri; -+ -+ ri = container_of(ci, struct acpi_pci_generic_root_info, common); -+ pci_ecam_free(ri->cfg); -+ kfree(ri); -+} -+ -+static struct acpi_pci_root_ops acpi_pci_root_ops = { -+ .release_info = pci_acpi_generic_release_info, -+}; -+ -+/* Interface called from ACPI code to setup PCI host controller */ - struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) - { -- /* TODO: Should be revisited when implementing PCI on ACPI */ -- return NULL; -+ int node = acpi_get_node(root->device->handle); -+ struct acpi_pci_generic_root_info *ri; -+ struct pci_bus *bus, *child; -+ -+ ri = kzalloc_node(sizeof(*ri), GFP_KERNEL, node); -+ if (!ri) -+ return NULL; -+ -+ ri->cfg = pci_acpi_setup_ecam_mapping(root); -+ if (!ri->cfg) { -+ kfree(ri); -+ return NULL; -+ } -+ -+ acpi_pci_root_ops.pci_ops = &ri->cfg->ops->pci_ops; -+ bus = acpi_pci_root_create(root, &acpi_pci_root_ops, &ri->common, -+ ri->cfg); -+ if (!bus) -+ return NULL; -+ -+ pci_bus_size_bridges(bus); -+ pci_bus_assign_resources(bus); -+ -+ list_for_each_entry(child, &bus->children, node) -+ pcie_bus_configure_settings(child); -+ -+ return bus; -+} -+ -+void pcibios_add_bus(struct pci_bus *bus) -+{ -+ acpi_pci_add_bus(bus); - } -+ -+void pcibios_remove_bus(struct pci_bus *bus) -+{ -+ acpi_pci_remove_bus(bus); -+} -+ - #endif --- -2.7.4 - diff --git a/arm64-pcie-quirks-xgene.patch b/arm64-pcie-quirks-xgene.patch index 8e6805df6..9defc1763 100644 --- a/arm64-pcie-quirks-xgene.patch +++ b/arm64-pcie-quirks-xgene.patch @@ -1,13 +1,13 @@ -From 767b70aa55d013f0c7589955f410d488fed5776a Mon Sep 17 00:00:00 2001 +From 965e95a91066290f6555546f066a6e2aaba1199e Mon Sep 17 00:00:00 2001 From: Peter Robinson <pbrobinson@gmail.com> Date: Tue, 5 Jul 2016 23:49:39 +0100 -Subject: [PATCH 1/4] Some platforms may not be fully compliant with generic - set of PCI config accessors. For these cases we implement the way to - overwrite accessors set. Algorithm traverses available quirk list, matches - against <oem_id, oem_table_id, domain, bus number> tuple and returns - corresponding PCI config ops. oem_id and oem_table_id come from MCFG table - standard header. All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() - macro and kept self contained. Example: +Subject: [PATCH] Some platforms may not be fully compliant with generic set of + PCI config accessors. For these cases we implement the way to overwrite + accessors set. Algorithm traverses available quirk list, matches against + <oem_id, oem_table_id, domain, bus number> tuple and returns corresponding + PCI config ops. oem_id and oem_table_id come from MCFG table standard header. + All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() macro and kept self + contained. Example: /* Custom PCI config ops */ static struct pci_generic_ecam_ops foo_pci_ops = { @@ -30,7 +30,7 @@ Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> 3 files changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -index d3c3e85..deb0077 100644 +index b5b376e..a5c9067 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -22,6 +22,10 @@ @@ -45,7 +45,7 @@ index d3c3e85..deb0077 100644 /* Structure to hold entries from the MCFG table */ struct mcfg_entry { @@ -35,6 +39,38 @@ struct mcfg_entry { - /* List to save mcfg entries */ + /* List to save MCFG entries */ static LIST_HEAD(pci_mcfg_list); +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[]; @@ -103,10 +103,10 @@ index d3c3e85..deb0077 100644 arr = kcalloc(n, sizeof(*arr), GFP_KERNEL); if (!arr) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h -index 6a67ab9..43604fc 100644 +index 2456397..c49bd36 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h -@@ -300,6 +300,13 @@ +@@ -308,6 +308,13 @@ VMLINUX_SYMBOL(__end_pci_fixups_suspend_late) = .; \ } \ \ @@ -159,12 +159,12 @@ index 7d63a66..c8a6559 100644 extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, struct acpi_pci_root_ops *ops, -- -2.7.4 +2.9.2 -From 4f86a9b006b25dd7336043dab26058ed6fb2802d Mon Sep 17 00:00:00 2001 +From 817d09d7650319a827f00bd3b4c9b407d3977ba0 Mon Sep 17 00:00:00 2001 From: Peter Robinson <pbrobinson@gmail.com> Date: Tue, 5 Jul 2016 23:52:46 +0100 -Subject: [PATCH 2/4] pci_generic_ecam_ops is used by default. Since there are +Subject: [PATCH] pci_generic_ecam_ops is used by default. Since there are platforms which have non-compliant ECAM space we need to overwrite these accessors prior to PCI buses enumeration. In order to do that we call pci_mcfg_get_ops to retrieve pci_ecam_ops structure so that we can use proper @@ -178,10 +178,10 @@ Signed-off-by: Tomasz Nowicki <tn@semihalf.com> 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 94cd43c..a891bda 100644 +index acf3872..ec513f1 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c -@@ -139,6 +139,7 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +@@ -126,6 +126,7 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) struct pci_config_window *cfg; struct resource cfgres; unsigned int bsz; @@ -189,7 +189,7 @@ index 94cd43c..a891bda 100644 /* Use address from _CBA if present, otherwise lookup MCFG */ if (!root->mcfg_addr) -@@ -150,12 +151,12 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +@@ -137,12 +138,12 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) return NULL; } @@ -206,12 +206,12 @@ index 94cd43c..a891bda 100644 dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, PTR_ERR(cfg)); -- -2.7.4 +2.9.2 -From cbdbd697bd6d716eb9d1705ee55445432e73eabb Mon Sep 17 00:00:00 2001 +From ac5cff2e2304a1969e39e967567aa41cade1839f Mon Sep 17 00:00:00 2001 From: Peter Robinson <pbrobinson@gmail.com> Date: Tue, 5 Jul 2016 23:53:59 +0100 -Subject: [PATCH 3/4] The ECAM quirk matching criteria per the discussion on +Subject: [PATCH] The ECAM quirk matching criteria per the discussion on https://lkml.org/lkml/2016/6/13/944 includes: OEM ID, OEM Table ID and OEM Revision. So this patch adds OEM Table ID into the check to match platform specific ECAM quirks as well. @@ -227,7 +227,7 @@ Signed-off-by: Duc Dang <dhdang@apm.com> 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -index deb0077..307ca9a 100644 +index a5c9067..5137d16 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -62,9 +62,12 @@ struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) @@ -274,12 +274,12 @@ index c8a6559..5148c8d 100644 extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info); extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, -- -2.7.4 +2.9.2 -From 78766cf255bc6aafac2f57372a0446f78322da19 Mon Sep 17 00:00:00 2001 +From b9c1592c6b615da0c26168c5c3e0f8fc256a23ca Mon Sep 17 00:00:00 2001 From: Peter Robinson <pbrobinson@gmail.com> Date: Tue, 5 Jul 2016 23:55:11 +0100 -Subject: [PATCH 4/4] X-Gene PCIe controller does not fully support ECAM. This +Subject: [PATCH] X-Gene PCIe controller does not fully support ECAM. This patch adds required ECAM fixup to allow X-Gene PCIe controller to be functional in ACPI boot mode. @@ -291,10 +291,10 @@ Signed-off-by: Duc Dang <dhdang@apm.com> create mode 100644 drivers/pci/host/pci-xgene-ecam.c diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile -index 9c8698e..3480696 100644 +index 8843410..af4f505 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile -@@ -14,7 +14,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o +@@ -15,7 +15,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o @@ -504,5 +504,5 @@ index 0000000..1bea63f + PCI_MCFG_DOMAIN_ANY, PCI_MCFG_BUS_ANY); +#endif -- -2.7.4 +2.9.2 diff --git a/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch b/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch deleted file mode 100644 index 6ee750466..000000000 --- a/audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch +++ /dev/null @@ -1,413 +0,0 @@ -From 43761473c254b45883a64441dd0bc85a42f3645c Mon Sep 17 00:00:00 2001 -From: Paul Moore <paul@paul-moore.com> -Date: Tue, 19 Jul 2016 17:42:57 -0400 -Subject: [PATCH] audit: fix a double fetch in audit_log_single_execve_arg() - -There is a double fetch problem in audit_log_single_execve_arg() -where we first check the execve(2) argumnets for any "bad" characters -which would require hex encoding and then re-fetch the arguments for -logging in the audit record[1]. Of course this leaves a window of -opportunity for an unsavory application to munge with the data. - -This patch reworks things by only fetching the argument data once[2] -into a buffer where it is scanned and logged into the audit -records(s). In addition to fixing the double fetch, this patch -improves on the original code in a few other ways: better handling -of large arguments which require encoding, stricter record length -checking, and some performance improvements (completely unverified, -but we got rid of some strlen() calls, that's got to be a good -thing). - -As part of the development of this patch, I've also created a basic -regression test for the audit-testsuite, the test can be tracked on -GitHub at the following link: - - * https://github.com/linux-audit/audit-testsuite/issues/25 - -[1] If you pay careful attention, there is actually a triple fetch -problem due to a strnlen_user() call at the top of the function. - -[2] This is a tiny white lie, we do make a call to strnlen_user() -prior to fetching the argument data. I don't like it, but due to the -way the audit record is structured we really have no choice unless we -copy the entire argument at once (which would require a rather -wasteful allocation). The good news is that with this patch the -kernel no longer relies on this strnlen_user() value for anything -beyond recording it in the log, we also update it with a trustworthy -value whenever possible. - -Reported-by: Pengfei Wang <wpengfeinudt@gmail.com> -Cc: <stable@vger.kernel.org> -Signed-off-by: Paul Moore <paul@paul-moore.com> ---- - kernel/auditsc.c | 332 +++++++++++++++++++++++++++---------------------------- - 1 file changed, 164 insertions(+), 168 deletions(-) - -diff --git a/kernel/auditsc.c b/kernel/auditsc.c -index aa3feec..c65af21 100644 ---- a/kernel/auditsc.c -+++ b/kernel/auditsc.c -@@ -73,6 +73,7 @@ - #include <linux/compat.h> - #include <linux/ctype.h> - #include <linux/string.h> -+#include <linux/uaccess.h> - #include <uapi/linux/limits.h> - - #include "audit.h" -@@ -82,7 +83,8 @@ - #define AUDITSC_SUCCESS 1 - #define AUDITSC_FAILURE 2 - --/* no execve audit message should be longer than this (userspace limits) */ -+/* no execve audit message should be longer than this (userspace limits), -+ * see the note near the top of audit_log_execve_info() about this value */ - #define MAX_EXECVE_AUDIT_LEN 7500 - - /* max length to print of cmdline/proctitle value during audit */ -@@ -992,184 +994,178 @@ static int audit_log_pid_context(struct audit_context *context, pid_t pid, - return rc; - } - --/* -- * to_send and len_sent accounting are very loose estimates. We aren't -- * really worried about a hard cap to MAX_EXECVE_AUDIT_LEN so much as being -- * within about 500 bytes (next page boundary) -- * -- * why snprintf? an int is up to 12 digits long. if we just assumed when -- * logging that a[%d]= was going to be 16 characters long we would be wasting -- * space in every audit message. In one 7500 byte message we can log up to -- * about 1000 min size arguments. That comes down to about 50% waste of space -- * if we didn't do the snprintf to find out how long arg_num_len was. -- */ --static int audit_log_single_execve_arg(struct audit_context *context, -- struct audit_buffer **ab, -- int arg_num, -- size_t *len_sent, -- const char __user *p, -- char *buf) -+static void audit_log_execve_info(struct audit_context *context, -+ struct audit_buffer **ab) - { -- char arg_num_len_buf[12]; -- const char __user *tmp_p = p; -- /* how many digits are in arg_num? 5 is the length of ' a=""' */ -- size_t arg_num_len = snprintf(arg_num_len_buf, 12, "%d", arg_num) + 5; -- size_t len, len_left, to_send; -- size_t max_execve_audit_len = MAX_EXECVE_AUDIT_LEN; -- unsigned int i, has_cntl = 0, too_long = 0; -- int ret; -- -- /* strnlen_user includes the null we don't want to send */ -- len_left = len = strnlen_user(p, MAX_ARG_STRLEN) - 1; -- -- /* -- * We just created this mm, if we can't find the strings -- * we just copied into it something is _very_ wrong. Similar -- * for strings that are too long, we should not have created -- * any. -- */ -- if (WARN_ON_ONCE(len < 0 || len > MAX_ARG_STRLEN - 1)) { -- send_sig(SIGKILL, current, 0); -- return -1; -+ long len_max; -+ long len_rem; -+ long len_full; -+ long len_buf; -+ long len_abuf; -+ long len_tmp; -+ bool require_data; -+ bool encode; -+ unsigned int iter; -+ unsigned int arg; -+ char *buf_head; -+ char *buf; -+ const char __user *p = (const char __user *)current->mm->arg_start; -+ -+ /* NOTE: this buffer needs to be large enough to hold all the non-arg -+ * data we put in the audit record for this argument (see the -+ * code below) ... at this point in time 96 is plenty */ -+ char abuf[96]; -+ -+ /* NOTE: we set MAX_EXECVE_AUDIT_LEN to a rather arbitrary limit, the -+ * current value of 7500 is not as important as the fact that it -+ * is less than 8k, a setting of 7500 gives us plenty of wiggle -+ * room if we go over a little bit in the logging below */ -+ WARN_ON_ONCE(MAX_EXECVE_AUDIT_LEN > 7500); -+ len_max = MAX_EXECVE_AUDIT_LEN; -+ -+ /* scratch buffer to hold the userspace args */ -+ buf_head = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL); -+ if (!buf_head) { -+ audit_panic("out of memory for argv string"); -+ return; - } -+ buf = buf_head; - -- /* walk the whole argument looking for non-ascii chars */ -+ audit_log_format(*ab, "argc=%d", context->execve.argc); -+ -+ len_rem = len_max; -+ len_buf = 0; -+ len_full = 0; -+ require_data = true; -+ encode = false; -+ iter = 0; -+ arg = 0; - do { -- if (len_left > MAX_EXECVE_AUDIT_LEN) -- to_send = MAX_EXECVE_AUDIT_LEN; -- else -- to_send = len_left; -- ret = copy_from_user(buf, tmp_p, to_send); -- /* -- * There is no reason for this copy to be short. We just -- * copied them here, and the mm hasn't been exposed to user- -- * space yet. -- */ -- if (ret) { -- WARN_ON(1); -- send_sig(SIGKILL, current, 0); -- return -1; -- } -- buf[to_send] = '\0'; -- has_cntl = audit_string_contains_control(buf, to_send); -- if (has_cntl) { -- /* -- * hex messages get logged as 2 bytes, so we can only -- * send half as much in each message -- */ -- max_execve_audit_len = MAX_EXECVE_AUDIT_LEN / 2; -- break; -- } -- len_left -= to_send; -- tmp_p += to_send; -- } while (len_left > 0); -- -- len_left = len; -- -- if (len > max_execve_audit_len) -- too_long = 1; -- -- /* rewalk the argument actually logging the message */ -- for (i = 0; len_left > 0; i++) { -- int room_left; -- -- if (len_left > max_execve_audit_len) -- to_send = max_execve_audit_len; -- else -- to_send = len_left; -- -- /* do we have space left to send this argument in this ab? */ -- room_left = MAX_EXECVE_AUDIT_LEN - arg_num_len - *len_sent; -- if (has_cntl) -- room_left -= (to_send * 2); -- else -- room_left -= to_send; -- if (room_left < 0) { -- *len_sent = 0; -- audit_log_end(*ab); -- *ab = audit_log_start(context, GFP_KERNEL, AUDIT_EXECVE); -- if (!*ab) -- return 0; -- } -+ /* NOTE: we don't ever want to trust this value for anything -+ * serious, but the audit record format insists we -+ * provide an argument length for really long arguments, -+ * e.g. > MAX_EXECVE_AUDIT_LEN, so we have no choice but -+ * to use strncpy_from_user() to obtain this value for -+ * recording in the log, although we don't use it -+ * anywhere here to avoid a double-fetch problem */ -+ if (len_full == 0) -+ len_full = strnlen_user(p, MAX_ARG_STRLEN) - 1; -+ -+ /* read more data from userspace */ -+ if (require_data) { -+ /* can we make more room in the buffer? */ -+ if (buf != buf_head) { -+ memmove(buf_head, buf, len_buf); -+ buf = buf_head; -+ } -+ -+ /* fetch as much as we can of the argument */ -+ len_tmp = strncpy_from_user(&buf_head[len_buf], p, -+ len_max - len_buf); -+ if (len_tmp == -EFAULT) { -+ /* unable to copy from userspace */ -+ send_sig(SIGKILL, current, 0); -+ goto out; -+ } else if (len_tmp == (len_max - len_buf)) { -+ /* buffer is not large enough */ -+ require_data = true; -+ /* NOTE: if we are going to span multiple -+ * buffers force the encoding so we stand -+ * a chance at a sane len_full value and -+ * consistent record encoding */ -+ encode = true; -+ len_full = len_full * 2; -+ p += len_tmp; -+ } else { -+ require_data = false; -+ if (!encode) -+ encode = audit_string_contains_control( -+ buf, len_tmp); -+ /* try to use a trusted value for len_full */ -+ if (len_full < len_max) -+ len_full = (encode ? -+ len_tmp * 2 : len_tmp); -+ p += len_tmp + 1; -+ } -+ len_buf += len_tmp; -+ buf_head[len_buf] = '\0'; - -- /* -- * first record needs to say how long the original string was -- * so we can be sure nothing was lost. -- */ -- if ((i == 0) && (too_long)) -- audit_log_format(*ab, " a%d_len=%zu", arg_num, -- has_cntl ? 2*len : len); -- -- /* -- * normally arguments are small enough to fit and we already -- * filled buf above when we checked for control characters -- * so don't bother with another copy_from_user -- */ -- if (len >= max_execve_audit_len) -- ret = copy_from_user(buf, p, to_send); -- else -- ret = 0; -- if (ret) { -- WARN_ON(1); -- send_sig(SIGKILL, current, 0); -- return -1; -+ /* length of the buffer in the audit record? */ -+ len_abuf = (encode ? len_buf * 2 : len_buf + 2); - } -- buf[to_send] = '\0'; -- -- /* actually log it */ -- audit_log_format(*ab, " a%d", arg_num); -- if (too_long) -- audit_log_format(*ab, "[%d]", i); -- audit_log_format(*ab, "="); -- if (has_cntl) -- audit_log_n_hex(*ab, buf, to_send); -- else -- audit_log_string(*ab, buf); -- -- p += to_send; -- len_left -= to_send; -- *len_sent += arg_num_len; -- if (has_cntl) -- *len_sent += to_send * 2; -- else -- *len_sent += to_send; -- } -- /* include the null we didn't log */ -- return len + 1; --} - --static void audit_log_execve_info(struct audit_context *context, -- struct audit_buffer **ab) --{ -- int i, len; -- size_t len_sent = 0; -- const char __user *p; -- char *buf; -+ /* write as much as we can to the audit log */ -+ if (len_buf > 0) { -+ /* NOTE: some magic numbers here - basically if we -+ * can't fit a reasonable amount of data into the -+ * existing audit buffer, flush it and start with -+ * a new buffer */ -+ if ((sizeof(abuf) + 8) > len_rem) { -+ len_rem = len_max; -+ audit_log_end(*ab); -+ *ab = audit_log_start(context, -+ GFP_KERNEL, AUDIT_EXECVE); -+ if (!*ab) -+ goto out; -+ } - -- p = (const char __user *)current->mm->arg_start; -+ /* create the non-arg portion of the arg record */ -+ len_tmp = 0; -+ if (require_data || (iter > 0) || -+ ((len_abuf + sizeof(abuf)) > len_rem)) { -+ if (iter == 0) { -+ len_tmp += snprintf(&abuf[len_tmp], -+ sizeof(abuf) - len_tmp, -+ " a%d_len=%lu", -+ arg, len_full); -+ } -+ len_tmp += snprintf(&abuf[len_tmp], -+ sizeof(abuf) - len_tmp, -+ " a%d[%d]=", arg, iter++); -+ } else -+ len_tmp += snprintf(&abuf[len_tmp], -+ sizeof(abuf) - len_tmp, -+ " a%d=", arg); -+ WARN_ON(len_tmp >= sizeof(abuf)); -+ abuf[sizeof(abuf) - 1] = '\0'; -+ -+ /* log the arg in the audit record */ -+ audit_log_format(*ab, "%s", abuf); -+ len_rem -= len_tmp; -+ len_tmp = len_buf; -+ if (encode) { -+ if (len_abuf > len_rem) -+ len_tmp = len_rem / 2; /* encoding */ -+ audit_log_n_hex(*ab, buf, len_tmp); -+ len_rem -= len_tmp * 2; -+ len_abuf -= len_tmp * 2; -+ } else { -+ if (len_abuf > len_rem) -+ len_tmp = len_rem - 2; /* quotes */ -+ audit_log_n_string(*ab, buf, len_tmp); -+ len_rem -= len_tmp + 2; -+ /* don't subtract the "2" because we still need -+ * to add quotes to the remaining string */ -+ len_abuf -= len_tmp; -+ } -+ len_buf -= len_tmp; -+ buf += len_tmp; -+ } - -- audit_log_format(*ab, "argc=%d", context->execve.argc); -+ /* ready to move to the next argument? */ -+ if ((len_buf == 0) && !require_data) { -+ arg++; -+ iter = 0; -+ len_full = 0; -+ require_data = true; -+ encode = false; -+ } -+ } while (arg < context->execve.argc); - -- /* -- * we need some kernel buffer to hold the userspace args. Just -- * allocate one big one rather than allocating one of the right size -- * for every single argument inside audit_log_single_execve_arg() -- * should be <8k allocation so should be pretty safe. -- */ -- buf = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL); -- if (!buf) { -- audit_panic("out of memory for argv string"); -- return; -- } -+ /* NOTE: the caller handles the final audit_log_end() call */ - -- for (i = 0; i < context->execve.argc; i++) { -- len = audit_log_single_execve_arg(context, ab, i, -- &len_sent, p, buf); -- if (len <= 0) -- break; -- p += len; -- } -- kfree(buf); -+out: -+ kfree(buf_head); - } - - static void show_special(struct audit_context *context, int *call_panic) diff --git a/bcm283x-upstream-fixes.patch b/bcm283x-upstream-fixes.patch index c5ee31784..fbb170650 100644 --- a/bcm283x-upstream-fixes.patch +++ b/bcm283x-upstream-fixes.patch @@ -1,32 +1,3 @@ -From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 4 Mar 2016 10:39:28 -0800 -Subject: [PATCH 27/36] dt-bindings: Add root properties for Raspberry Pi 3 - -Signed-off-by: Eric Anholt <eric@anholt.net> -Acked-by: Rob Herring <robh@kernel.org> ---- - Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -index 11d3056..6ffe087 100644 ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B - Required root node properties: - compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; - -+Raspberry Pi 3 Model B -+Required root node properties: -+compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -+ - Raspberry Pi Compute Module - Required root node properties: - compatible = "raspberrypi,compute-module", "brcm,bcm2835"; --- -2.7.3 - From b76b1cdf2e569cceab41dcf3b3f6a90965d0a02c Mon Sep 17 00:00:00 2001 From: Eric Anholt <eric@anholt.net> Date: Fri, 4 Mar 2016 10:39:29 -0800 diff --git a/config-arm-generic b/config-arm-generic index f81cdb1f8..cc5314aa9 100644 --- a/config-arm-generic +++ b/config-arm-generic @@ -145,6 +145,7 @@ CONFIG_PHY_MVEBU_SATA=y CONFIG_AHCI_MVEBU=m # CONFIG_CACHE_FEROCEON_L2 is not set # CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set +# CONFIG_PCI_AARDVARK is not set # Rockchips CONFIG_ARCH_ROCKCHIP=y @@ -294,6 +295,7 @@ CONFIG_MAILBOX=y CONFIG_ARM_MHU=m # CONFIG_PL320_MBOX is not set CONFIG_ARM_SCPI_PROTOCOL=m +# CONFIG_ARM_SCPI_POWER_DOMAIN is not set # NVMem CONFIG_NVMEM=m diff --git a/config-arm64 b/config-arm64 index 9e68302ff..2fc5f6d27 100644 --- a/config-arm64 +++ b/config-arm64 @@ -10,6 +10,7 @@ CONFIG_ARCH_TEGRA=y CONFIG_ARCH_XGENE=y # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BCM2835 is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_LAYERSCAPE is not set @@ -170,6 +171,7 @@ CONFIG_TEGRA210_ADMA=y CONFIG_MFD_MAX77620=y CONFIG_REGULATOR_MAX77620=m # CONFIG_GPIO_TEGRA is not set +# CONFIG_TEGRA_ACONNECT is not set # AllWinner CONFIG_MACH_SUN50I=y @@ -190,6 +192,8 @@ CONFIG_PWM_SUN4I=m # CONFIG_PHY_SUN4I_USB is not set # CONFIG_PHY_SUN9I_USB is not set CONFIG_NVMEM_SUNXI_SID=m +# CONFIG_SUNXI_CCU is not set +# CONFIG_SUN8I_H3_CCU is not set # qcom # MSM8996 = SD-820, MSM8916 = SD-410 @@ -299,3 +303,4 @@ CONFIG_DEBUG_SECTION_MISMATCH=y # Will probably need to be changed later # CONFIG_NUMA is not set +# CONFIG_BCM_PDC_MBOX is not set diff --git a/config-armv7 b/config-armv7 index d3882566a..64b095c43 100644 --- a/config-armv7 +++ b/config-armv7 @@ -9,6 +9,7 @@ CONFIG_ARCH_OMAP4=y CONFIG_ARCH_QCOM=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_ZYNQ=y +# CONFIG_ARCH_MDM9615 is not set # These are supported in the LPAE kernel # CONFIG_ARM_LPAE is not set @@ -154,6 +155,21 @@ CONFIG_DRM_OMAP_NUM_CRTCS=2 CONFIG_OMAP2_VRFB=y # CONFIG_FB_OMAP2 is not set # CONFIG_FB_DA8XX is not set +# CONFIG_DRM_OMAP_ENCODER_OPA362 is not set +# CONFIG_DRM_OMAP_ENCODER_TFP410 is not set +# CONFIG_DRM_OMAP_ENCODER_TPD12S015 is not set +# CONFIG_DRM_OMAP_CONNECTOR_DVI is not set +# CONFIG_DRM_OMAP_CONNECTOR_HDMI is not set +# CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV is not set +# CONFIG_DRM_OMAP_PANEL_DPI is not set +# CONFIG_DRM_OMAP_PANEL_DSI_CM is not set +# CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02 is not set +# CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11 is not set + CONFIG_OMAP2_DSS=m # CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set @@ -350,6 +366,7 @@ CONFIG_QCOM_SMP2P=m CONFIG_PCIE_QCOM=y CONFIG_MTD_NAND_QCOM=m # CONFIG_QCOM_Q6V5_PIL is not set +# CONFIG_MSM_IOMMU is not set # i.MX # CONFIG_MXC_DEBUG_BOARD is not set diff --git a/config-armv7-generic b/config-armv7-generic index 443720a34..27e416e41 100644 --- a/config-armv7-generic +++ b/config-armv7-generic @@ -75,6 +75,7 @@ CONFIG_ARCH_VIRT=y # CONFIG_ARCH_BCM_281XX is not set # CONFIG_ARCH_BCM_21664 is not set # CONFIG_ARCH_BCM_63XX is not set +# CONFIG_ARCH_BCM_23550 is not set # CONFIG_ARCH_BRCMSTB is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_HI3xxx is not set @@ -131,6 +132,12 @@ CONFIG_PJ4B_ERRATA_4742=y # Cortex-A15 # CONFIG_ARM_ERRATA_798181 is not set # CONFIG_ARM_ERRATA_773022 is not set +# CONFIG_ARM_ERRATA_818325_852422 is not set +# CONFIG_ARM_ERRATA_821420 is not set +# CONFIG_ARM_ERRATA_825619 is not set +# CONFIG_ARM_ERRATA_852421 is not set +# CONFIG_ARM_ERRATA_852423 is not set + # generic that deviates from or should be merged into config-generic CONFIG_SMP_ON_UP=y @@ -233,8 +240,11 @@ CONFIG_USB_MUSB_SUNXI=m CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_SND_SUN4I_CODEC=m CONFIG_SND_SUN4I_SPDIF=m +CONFIG_SND_SUN4I_I2S=m CONFIG_SUNXI_RSB=m CONFIG_NVMEM_SUNXI_SID=m +# CONFIG_SUNXI_CCU is not set +# CONFIG_SUN8I_H3_CCU is not set # BCM 283x CONFIG_SERIAL_AMBA_PL011=y @@ -350,6 +360,7 @@ CONFIG_SND_SOC_ODROIDX2=m # CONFIG_EXYNOS_IOMMU_DEBUG is not set # CONFIG_SAMSUNG_PM_DEBUG is not set # CONFIG_SAMSUNG_PM_CHECK is not set +# CONFIG_EXYNOS_AUDSS_CLK_CON is not set # Arndale/Origen CONFIG_MFD_MAX8997=y @@ -529,6 +540,7 @@ CONFIG_MTD_NAND_PXA3xx=m CONFIG_MTD_NAND_RICOH=m CONFIG_MTD_NAND_TMIO=m # CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MTK is not set # CONFIG_MTD_MT81xx_NOR is not set CONFIG_MTD_SPI_NOR=m # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set @@ -748,6 +760,7 @@ CONFIG_R8188EU=m # CONFIG_DM9000 is not set # CONFIG_MTD_AFS_PARTS is not set # CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_DEPRECATED_PARAM_STRUCT is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SERIAL_8250_EM is not set diff --git a/config-generic b/config-generic index 6bdf8e4f9..005adb193 100644 --- a/config-generic +++ b/config-generic @@ -9,6 +9,7 @@ CONFIG_HOTPLUG_CPU=y CONFIG_LOCALVERSION="" CONFIG_CROSS_COMPILE="" CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_GCC_PLUGINS is not set # # Code maturity level options @@ -113,7 +114,7 @@ CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_SHPC is not set CONFIG_HOTPLUG_PCI_PCIE=y # CONFIG_PCIE_DW_PLAT is not set -CONFIG_PCIE_DPC=m +CONFIG_PCIE_DPC=y # CONFIG_SGI_IOC4 is not set @@ -219,6 +220,7 @@ CONFIG_BINFMT_MISC=m # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_COMMON_CLK_OXNAS is not set # CONFIG_COMMON_CLK_HI3519 is not set +# CONFIG_SUNXI_CCU is not set # # Generic Driver Options @@ -2637,6 +2639,11 @@ CONFIG_TCG_ATMEL=m # CONFIG_TCG_INFINEON is not set # CONFIG_TCG_TIS_ST33ZP24 is not set # CONFIG_TCG_XEN is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set + CONFIG_TELCLOCK=m # @@ -3401,6 +3408,7 @@ CONFIG_DRM_MGAG200=m # do not enable on f17 or older CONFIG_DRM_I915=m # CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set CONFIG_DRM_I915_USERPTR=y +CONFIG_DRM_I915_GVT=y CONFIG_DRM_VIA=m CONFIG_DRM_NOUVEAU=m CONFIG_NOUVEAU_DEBUG=5 @@ -3422,6 +3430,11 @@ CONFIG_DRM_VIRTIO_GPU=m # CONFIG_DRM_PANEL_SIMPLE is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set CONFIG_DRM_VGEM=m +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_I2C_ADV7533 is not set + # # PCMCIA character devices @@ -5309,22 +5322,27 @@ CONFIG_SND_INDIGODJX=m CONFIG_SND_SOC=m CONFIG_SND_SIMPLE_CARD=m CONFIG_SND_DESIGNWARE_I2S=m +CONFIG_SND_DESIGNWARE_PCM=m CONFIG_SND_SOC_ALL_CODECS=m CONFIG_SND_SOC_DMIC=m CONFIG_SND_SOC_SPDIF=m CONFIG_SND_DMAENGINE_PCM=m CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU7002 is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271 is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS53L30 is not set # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM179X is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set @@ -5399,6 +5417,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y CONFIG_SND_SOC_AMD_ACP=m # CONFIG_SND_SOC_TAS5720 is not set # CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_WM8985 is not set CONFIG_BALLOON_COMPACTION=y @@ -5576,6 +5597,7 @@ CONFIG_POWER_RESET=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_POWER_RESET_RESTART is not set # CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_POWER_RESET_BRCMKONA is not set # CONFIG_PDA_POWER is not set @@ -5972,7 +5994,7 @@ CONFIG_IOMMU_SUPPORT=y # CONFIG_MAILBOX_TEST is not set # CONFIG_RESET_CONTROLLER is not set - +# CONFIG_TI_SYSCON_RESET is not set CONFIG_FMC=m CONFIG_FMC_FAKEDEV=m CONFIG_FMC_TRIVIAL=m diff --git a/config-powerpc64-generic b/config-powerpc64-generic index 6d0b57d44..8e19373c9 100644 --- a/config-powerpc64-generic +++ b/config-powerpc64-generic @@ -120,6 +120,8 @@ CONFIG_IPMI_POWERNV=m CONFIG_RTAS_FLASH=y CONFIG_OPAL_PRD=m CONFIG_MTD_POWERNV_FLASH=m +# CONFIG_HOTPLUG_PCI_POWERNV is not set +# CONFIG_POWERNV_OP_PANEL is not set # Power 7 and later CONFIG_PPC_TRANSACTIONAL_MEM=y diff --git a/config-x86-generic b/config-x86-generic index a4a1640c6..b925fbd05 100644 --- a/config-x86-generic +++ b/config-x86-generic @@ -568,10 +568,12 @@ CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m +CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m CONFIG_SND_SOC_AC97_CODEC=m # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SUN4I_CODEC is not set # CONFIG_SND_SUN4I_SPDIF is not set +# CONFIG_SND_SUN4I_I2S is not set CONFIG_INTEL_POWERCLAMP=m CONFIG_X86_PKG_TEMP_THERMAL=m diff --git a/crash-driver.patch b/crash-driver.patch index d88138440..a622d2fc5 100644 --- a/crash-driver.patch +++ b/crash-driver.patch @@ -1,3 +1,4 @@ +From 3fbd61fbbbfa7ae15cd3f3e2ff7a97e106be2b43 Mon Sep 17 00:00:00 2001 From: Dave Anderson <anderson@redhat.com> Date: Tue, 26 Nov 2013 12:42:46 -0500 Subject: [PATCH] crash-driver @@ -29,7 +30,7 @@ Upstream-status: Fedora mustard diff --git a/arch/arm/include/asm/crash-driver.h b/arch/arm/include/asm/crash-driver.h new file mode 100644 -index 000000000000..06e7ae916601 +index 0000000..06e7ae9 --- /dev/null +++ b/arch/arm/include/asm/crash-driver.h @@ -0,0 +1,6 @@ @@ -41,7 +42,7 @@ index 000000000000..06e7ae916601 +#endif /* _ARM_CRASH_H */ diff --git a/arch/arm64/include/asm/crash-driver.h b/arch/arm64/include/asm/crash-driver.h new file mode 100644 -index 000000000000..43b26da0c5d6 +index 0000000..43b26da --- /dev/null +++ b/arch/arm64/include/asm/crash-driver.h @@ -0,0 +1,6 @@ @@ -53,7 +54,7 @@ index 000000000000..43b26da0c5d6 +#endif /* _ARM64_CRASH_H */ diff --git a/arch/ia64/include/asm/crash-driver.h b/arch/ia64/include/asm/crash-driver.h new file mode 100644 -index 000000000000..404bcb93c112 +index 0000000..404bcb9 --- /dev/null +++ b/arch/ia64/include/asm/crash-driver.h @@ -0,0 +1,90 @@ @@ -148,7 +149,7 @@ index 000000000000..404bcb93c112 + +#endif /* _ASM_IA64_CRASH_H */ diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c -index 096731049538..e88887827906 100644 +index 0967310..e888878 100644 --- a/arch/ia64/kernel/ia64_ksyms.c +++ b/arch/ia64/kernel/ia64_ksyms.c @@ -84,6 +84,9 @@ EXPORT_SYMBOL(ia64_save_scratch_fpregs); @@ -163,7 +164,7 @@ index 096731049538..e88887827906 100644 EXPORT_SYMBOL_GPL(esi_call_phys); diff --git a/arch/powerpc/include/asm/crash-driver.h b/arch/powerpc/include/asm/crash-driver.h new file mode 100644 -index 000000000000..50092d965dc5 +index 0000000..50092d9 --- /dev/null +++ b/arch/powerpc/include/asm/crash-driver.h @@ -0,0 +1,6 @@ @@ -175,7 +176,7 @@ index 000000000000..50092d965dc5 +#endif /* _PPC64_CRASH_H */ diff --git a/arch/s390/include/asm/crash-driver.h b/arch/s390/include/asm/crash-driver.h new file mode 100644 -index 000000000000..552be5e2c571 +index 0000000..552be5e --- /dev/null +++ b/arch/s390/include/asm/crash-driver.h @@ -0,0 +1,60 @@ @@ -240,10 +241,10 @@ index 000000000000..552be5e2c571 + +#endif /* _S390_CRASH_H */ diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c -index 8a993a53fcd6..8f511795b52e 100644 +index 792f9c6..3197995 100644 --- a/arch/s390/mm/maccess.c +++ b/arch/s390/mm/maccess.c -@@ -197,6 +197,7 @@ void *xlate_dev_mem_ptr(phys_addr_t addr) +@@ -201,6 +201,7 @@ void *xlate_dev_mem_ptr(phys_addr_t addr) put_online_cpus(); return bounce; } @@ -251,14 +252,14 @@ index 8a993a53fcd6..8f511795b52e 100644 /* * Free converted buffer for /dev/mem access (if necessary) -@@ -206,3 +207,4 @@ void unxlate_dev_mem_ptr(phys_addr_t addr, void *buf) +@@ -210,3 +211,4 @@ void unxlate_dev_mem_ptr(phys_addr_t addr, void *buf) if ((void *) addr != buf) free_page((unsigned long) buf); } +EXPORT_SYMBOL_GPL(unxlate_dev_mem_ptr); diff --git a/arch/x86/include/asm/crash-driver.h b/arch/x86/include/asm/crash-driver.h new file mode 100644 -index 000000000000..fd4736ec99f5 +index 0000000..fd4736e --- /dev/null +++ b/arch/x86/include/asm/crash-driver.h @@ -0,0 +1,6 @@ @@ -269,7 +270,7 @@ index 000000000000..fd4736ec99f5 + +#endif /* _X86_CRASH_H */ diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig -index a043107da2af..b272397f306a 100644 +index fdb8f3e..7dd3a49 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -4,6 +4,9 @@ @@ -283,18 +284,18 @@ index a043107da2af..b272397f306a 100644 config DEVMEM diff --git a/drivers/char/Makefile b/drivers/char/Makefile -index d8a7579300d2..31c83630f593 100644 +index 55d16bf..a40ace9 100644 --- a/drivers/char/Makefile +++ b/drivers/char/Makefile -@@ -60,3 +60,5 @@ js-rtc-y = rtc.o - +@@ -61,3 +61,5 @@ js-rtc-y = rtc.o obj-$(CONFIG_TILE_SROM) += tile-srom.o obj-$(CONFIG_XILLYBUS) += xillybus/ + obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o + +obj-$(CONFIG_CRASH) += crash.o diff --git a/drivers/char/crash.c b/drivers/char/crash.c new file mode 100644 -index 000000000000..085378a1d539 +index 0000000..085378a --- /dev/null +++ b/drivers/char/crash.c @@ -0,0 +1,128 @@ @@ -428,7 +429,7 @@ index 000000000000..085378a1d539 +MODULE_LICENSE("GPL"); diff --git a/include/asm-generic/crash-driver.h b/include/asm-generic/crash-driver.h new file mode 100644 -index 000000000000..25ab9869d566 +index 0000000..25ab986 --- /dev/null +++ b/include/asm-generic/crash-driver.h @@ -0,0 +1,72 @@ @@ -504,3 +505,6 @@ index 000000000000..25ab9869d566 +#endif /* __KERNEL__ */ + +#endif /* __CRASH_H__ */ +-- +2.9.2 + diff --git a/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch b/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch new file mode 100644 index 000000000..a5dc6f3a2 --- /dev/null +++ b/drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch @@ -0,0 +1,64 @@ +From 74f829a6e44fe217b6161f8935524fc807be0648 Mon Sep 17 00:00:00 2001 +From: Chris Wilson <chris@chris-wilson.co.uk> +Date: Sat, 9 Jul 2016 11:01:20 +0100 +Subject: [PATCH] drm/i915: Acquire audio powerwell for HD-Audio registers + +On Haswell/Broadwell, the HD-Audio block is inside the HDMI/display +power well and so the sna-hda audio codec acquires the display power +well while it is operational. However, Skylake separates the powerwells +again, but yet we still need the audio powerwell to setup the registers. +(But then the hardware uses those registers even while powered off???) + +v2: Grab both rpm wakelock and audio wakelock + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96214 +Fixes: 03b135cebc47 "ALSA: hda - remove dependency on i915 power well for SKL") +Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> +Cc: Libin Yang <libin.yang@intel.com> +Cc: Takashi Iwai <tiwai@suse.de> +Cc: Marius Vlad <marius.c.vlad@intel.com> +--- + drivers/gpu/drm/i915/intel_audio.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c +index 5d5f6bc10e85..948a7a52e3f8 100644 +--- a/drivers/gpu/drm/i915/intel_audio.c ++++ b/drivers/gpu/drm/i915/intel_audio.c +@@ -600,6 +600,8 @@ static void i915_audio_component_codec_wake_override(struct device *dev, + if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)) + return; + ++ i915_audio_component_get_power(dev); ++ + /* + * Enable/disable generating the codec wake signal, overriding the + * internal logic to generate the codec wake to controller. +@@ -615,6 +617,8 @@ static void i915_audio_component_codec_wake_override(struct device *dev, + I915_WRITE(HSW_AUD_CHICKENBIT, tmp); + usleep_range(1000, 1500); + } ++ ++ i915_audio_component_put_power(dev); + } + + /* Get CDCLK in kHz */ +@@ -648,6 +652,7 @@ static int i915_audio_component_sync_audio_rate(struct device *dev, + !IS_HASWELL(dev_priv)) + return 0; + ++ i915_audio_component_get_power(dev); + mutex_lock(&dev_priv->av_mutex); + /* 1. get the pipe */ + intel_encoder = dev_priv->dig_port_map[port]; +@@ -698,6 +703,7 @@ static int i915_audio_component_sync_audio_rate(struct device *dev, + + unlock: + mutex_unlock(&dev_priv->av_mutex); ++ i915_audio_component_put_power(dev); + return err; + } + +-- +2.8.1 + diff --git a/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch b/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch deleted file mode 100644 index a7680e283..000000000 --- a/drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch +++ /dev/null @@ -1,230 +0,0 @@ -From 5fc9d375bac02e054fcaaf14a06bebc6c7118008 Mon Sep 17 00:00:00 2001 -From: "cpaul@redhat.com" <cpaul@redhat.com> -Date: Tue, 12 Jul 2016 13:36:03 -0400 -Subject: [PATCH] drm/i915/skl: Add support for the SAGV, fix underrun hangs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Since the watermark calculations for Skylake are still broken, we're apt -to hitting underruns very easily under multi-monitor configurations. -While it would be lovely if this was fixed, it's not. Another problem -that's been coming from this however, is the mysterious issue of -underruns causing full system hangs. An easy way to reproduce this with -a skylake system: - -- Get a laptop with a skylake GPU, and hook up two external monitors to - it -- Move the cursor from the built-in LCD to one of the external displays - as quickly as you can -- You'll get a few pipe underruns, and eventually the entire system will - just freeze. - -After doing a lot of investigation and reading through the bspec, I -found the existence of the SAGV, which is responsible for adjusting the -system agent voltage and clock frequencies depending on how much power -we need. According to the bspec: - -"The display engine access to system memory is blocked during the - adjustment time. SAGV defaults to enabled. Software must use the - GT-driver pcode mailbox to disable SAGV when the display engine is not - able to tolerate the blocking time." - -The rest of the bspec goes on to explain that software can simply leave -the SAGV enabled, and disable it when we use interlaced pipes/have more -then one pipe active. - -Sure enough, with this patchset the system hangs resulting from pipe -underruns on Skylake have completely vanished on my T460s. Additionally, -the bspec mentions turning off the SAGV with more then one pipe enabled -as a workaround for display underruns. While this patch doesn't entirely -fix that, it looks like it does improve the situation a little bit so -it's likely this is going to be required to make watermarks on Skylake -fully functional. - -Changes since v2: - - Really apply minor style nitpicks to patch this time -Changes since v1: - - Added comments about this probably being one of the requirements to - fixing Skylake's watermark issues - - Minor style nitpicks from Matt Roper - - Disable these functions on Broxton, since it doesn't have an SAGV - -Cc: Matt Roper <matthew.d.roper@intel.com> -Cc: Daniel Vetter <daniel.vetter@ffwll.ch> -Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> -Signed-off-by: Lyude <cpaul@redhat.com> -Reviewed-by: Matt Roper <matthew.d.roper@intel.com> ---- - drivers/gpu/drm/i915/i915_drv.h | 2 + - drivers/gpu/drm/i915/i915_reg.h | 5 ++ - drivers/gpu/drm/i915/intel_pm.c | 110 ++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 117 insertions(+) - -diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h -index 608f8e44f353..274b57ac1a91 100644 ---- a/drivers/gpu/drm/i915/i915_drv.h -+++ b/drivers/gpu/drm/i915/i915_drv.h -@@ -1942,6 +1942,8 @@ struct drm_i915_private { - struct i915_suspend_saved_registers regfile; - struct vlv_s0ix_state vlv_s0ix_state; - -+ bool skl_sagv_enabled; -+ - struct { - /* - * Raw watermark latency values: -diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h -index b407411e31ba..9472949e8442 100644 ---- a/drivers/gpu/drm/i915/i915_reg.h -+++ b/drivers/gpu/drm/i915/i915_reg.h -@@ -7094,6 +7094,11 @@ enum skl_disp_power_wells { - #define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17 - #define DISPLAY_IPS_CONTROL 0x19 - #define HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL 0x1A -+#define GEN9_PCODE_SAGV_CONTROL 0x21 -+#define GEN9_SAGV_DISABLE 0x0 -+#define GEN9_SAGV_LOW_FREQ 0x1 -+#define GEN9_SAGV_HIGH_FREQ 0x2 -+#define GEN9_SAGV_DYNAMIC_FREQ 0x3 - #define GEN6_PCODE_DATA _MMIO(0x138128) - #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 - #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16 -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index f764d284e6a0..439a38b08760 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -2847,6 +2847,109 @@ skl_wm_plane_id(const struct intel_plane *plane) - } - - static void -+skl_sagv_get_hw_state(struct drm_i915_private *dev_priv) -+{ -+ u32 temp; -+ int ret; -+ -+ if (IS_BROXTON(dev_priv)) -+ return; -+ -+ mutex_lock(&dev_priv->rps.hw_lock); -+ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, &temp); -+ mutex_unlock(&dev_priv->rps.hw_lock); -+ -+ if (!ret) { -+ dev_priv->skl_sagv_enabled = !!(temp & GEN9_SAGV_DYNAMIC_FREQ); -+ } else { -+ /* -+ * If for some reason we can't access the SAGV state, follow -+ * the bspec and assume it's enabled -+ */ -+ DRM_ERROR("Failed to get SAGV state, assuming enabled\n"); -+ dev_priv->skl_sagv_enabled = true; -+ } -+} -+ -+/* -+ * SAGV dynamically adjusts the system agent voltage and clock frequencies -+ * depending on power and performance requirements. The display engine access -+ * to system memory is blocked during the adjustment time. Having this enabled -+ * in multi-pipe configurations can cause issues (such as underruns causing -+ * full system hangs), and the bspec also suggests that software disable it -+ * when more then one pipe is enabled. -+ */ -+static int -+skl_enable_sagv(struct drm_i915_private *dev_priv) -+{ -+ int ret; -+ -+ if (IS_BROXTON(dev_priv)) -+ return 0; -+ if (dev_priv->skl_sagv_enabled) -+ return 0; -+ -+ mutex_lock(&dev_priv->rps.hw_lock); -+ DRM_DEBUG_KMS("Enabling the SAGV\n"); -+ -+ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, -+ GEN9_SAGV_DYNAMIC_FREQ); -+ if (!ret) -+ dev_priv->skl_sagv_enabled = true; -+ else -+ DRM_ERROR("Failed to enable the SAGV\n"); -+ -+ /* We don't need to wait for SAGV when enabling */ -+ mutex_unlock(&dev_priv->rps.hw_lock); -+ return ret; -+} -+ -+static int -+skl_disable_sagv(struct drm_i915_private *dev_priv) -+{ -+ int ret = 0; -+ unsigned long timeout; -+ u32 temp; -+ -+ if (IS_BROXTON(dev_priv)) -+ return 0; -+ if (!dev_priv->skl_sagv_enabled) -+ return 0; -+ -+ mutex_lock(&dev_priv->rps.hw_lock); -+ DRM_DEBUG_KMS("Disabling the SAGV\n"); -+ -+ /* bspec says to keep retrying for at least 1 ms */ -+ timeout = jiffies + msecs_to_jiffies(1); -+ do { -+ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL, -+ GEN9_SAGV_DISABLE); -+ if (ret) { -+ DRM_ERROR("Failed to disable the SAGV\n"); -+ goto out; -+ } -+ -+ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, -+ &temp); -+ if (ret) { -+ DRM_ERROR("Failed to check the status of the SAGV\n"); -+ goto out; -+ } -+ } while (!(temp & 0x1) && jiffies < timeout); -+ -+ if (temp & 0x1) { -+ dev_priv->skl_sagv_enabled = false; -+ } else { -+ ret = -1; -+ DRM_ERROR("Request to disable SAGV timed out\n"); -+ } -+ -+out: -+ mutex_unlock(&dev_priv->rps.hw_lock); -+ return ret; -+} -+ -+static void - skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - const struct intel_crtc_state *cstate, - struct skl_ddb_entry *alloc, /* out */ -@@ -3525,6 +3628,11 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, - struct drm_device *dev = dev_priv->dev; - struct intel_crtc *crtc; - -+ if (dev_priv->active_crtcs == 1) -+ skl_enable_sagv(dev_priv); -+ else -+ skl_disable_sagv(dev_priv); -+ - for_each_intel_crtc(dev, crtc) { - int i, level, max_level = ilk_wm_max_level(dev); - enum pipe pipe = crtc->pipe; -@@ -4072,6 +4180,8 @@ void skl_wm_get_hw_state(struct drm_device *dev) - skl_plane_relative_data_rate(cstate, pstate, 1); - } - } -+ -+ skl_sagv_get_hw_state(dev_priv); - } - - static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) --- -2.7.4 - @@ -1 +1 @@ -c624c86615fb8aa61fa76ed8c935446d06c80e77 +96b585267f552d4b6a28ea8bd75e5ed03deb6e71 diff --git a/kernel.spec b/kernel.spec index 25678a33c..f30607d07 100644 --- a/kernel.spec +++ b/kernel.spec @@ -77,7 +77,7 @@ Summary: The Linux kernel # The rc snapshot level %define rcrev 0 # The git snapshot level -%define gitrev 3 +%define gitrev 6 # Set rpm version accordingly %define rpmversion 4.%{upstream_sublevel}.0 %endif @@ -508,9 +508,6 @@ Source5000: patch-4.%{base_sublevel}-git%{gitrev}.xz # build tweak for build ID magic, even for -vanilla Source5005: kbuild-AFTER_LINK.patch -#Workaround for glibc update -Patch835: 0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch - %if !%{nopatches} # Git trees. @@ -526,7 +523,6 @@ Patch422: geekbox-v4-device-tree-support.patch # This has major conflicts and needs to be rebased # Patch423: Initial-AllWinner-A64-and-PINE64-support.patch -Patch424: arm64-pcie-acpi.patch Patch425: arm64-pcie-quirks-xgene.patch # http://www.spinics.net/lists/linux-tegra/msg26029.html @@ -537,8 +533,6 @@ Patch430: ARM-tegra-usb-no-reset.patch Patch431: bcm283x-upstream-fixes.patch -Patch432: arm-i.MX6-Utilite-device-dtb.patch - Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch Patch466: input-kill-stupid-messages.patch @@ -621,39 +615,8 @@ Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch #CVE-2016-3134 rhbz 1317383 1317384 Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch -#skl_update_other_pipe_wm issue patch-series from drm-next, rhbz 1305038 -Patch801: 0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch -Patch802: 0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch -Patch803: 0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch -Patch804: 0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch -Patch805: 0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch -Patch806: 0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch -Patch807: 0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch -Patch808: 0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch -Patch809: 0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch -Patch810: 0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch -Patch811: 0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch -Patch812: 0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch -Patch813: 0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch -Patch814: 0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch -Patch815: 0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch -Patch816: 0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch -Patch817: 0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch - -#CVE-2016-5389 CVE-2016-5969 rhbz 1354708 1355615 -Patch836: tcp-make-challenge-acks-less-predictable.patch - # https://lists.fedoraproject.org/archives/list/kernel@lists.fedoraproject.org/message/A4YCP7OGMX6JLFT5V44H57GOMAQLC3M4/ -Patch837: drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch -Patch838: drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch -Patch839: Revert-ALSA-hda-remove-controller-dependency-on-i915.patch - -#CVE-2016-6136 rhbz 1353533 1353534 -Patch841: audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch - -#CVE-2016-5412 rhbz 1349916 1361040 -Patch842: kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch -Patch843: kvm-ppc-Book3S-HV-Save-restore-TM-state.patch +Patch839: drm-i915-Acquire-audio-powerwell-for-HD-Audio-regist.patch # END OF PATCH DEFINITIONS @@ -1254,7 +1217,6 @@ done # The kbuild-AFTER_LINK patch is needed regardless so we list it as a Source # file and apply it separately from the rest. git am %{SOURCE5005} -ApplyPatch 0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch %if !%{nopatches} @@ -1732,9 +1694,9 @@ chmod +x tools/power/cpupower/utils/version-gen.sh pushd tools/thermal/tmon/ %{make} popd -pushd tools/iio/ -%{make} -popd +#pushd tools/iio/ +#{make} +#popd %endif # In the modsign case, we do 3 things. 1) We check the "flavour" and hard @@ -1902,9 +1864,9 @@ install -m644 %{SOURCE2001} %{buildroot}%{_sysconfdir}/sysconfig/cpupower pushd tools/thermal/tmon make INSTALL_ROOT=%{buildroot} install popd -pushd tools/iio -make INSTALL_ROOT=%{buildroot} install -popd +#pushd tools/iio +#make INSTALL_ROOT=%{buildroot} install +#popd %endif %if %{with_bootwrapper} @@ -2096,9 +2058,9 @@ fi %{_mandir}/man8/turbostat* %endif %{_bindir}/tmon -%{_bindir}/iio_event_monitor -%{_bindir}/iio_generic_buffer -%{_bindir}/lsiio +#{_bindir}/iio_event_monitor +#{_bindir}/iio_generic_buffer +#{_bindir}/lsiio %endif %if %{with_debuginfo} @@ -2193,6 +2155,22 @@ fi # # %changelog +* Thu Aug 04 2016 Laura Abbott <labbott@redhat.com> - 4.8.0-0.rc0.git6.1 +- Linux v4.7-11544-g96b5852 + +* Wed Aug 03 2016 Laura Abbott <labbott@redhat.com> - 4.8.0-0.rc0.git5.1 +- Linux v4.7-11470-gd52bd54 + +* Tue Aug 02 2016 Thorsten Leemhuis <fedora [AT] leemhuis.info> +- Disable iio tools, as they fail to build on F24 and F23 + +* Tue Aug 2 2016 Hans de Goede <jwrdegoede@fedoraproject.org> +- Sync skylake hdaudio __unclaimed_reg WARN_ON fix with latest upstream version +- Drop drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch for now + +* Tue Aug 02 2016 Laura Abbott <labbott@redhat.com> - 4.8.0-0.rc0.git4.1 +- Linux v4.7-10753-g731c7d3 + * Fri Jul 29 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.8.0-0.rc0.git3.1 - Linux v4.7-6438-gc624c86 diff --git a/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch b/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch deleted file mode 100644 index b4259375f..000000000 --- a/kvm-ppc-Book3S-HV-Pull-out-TM-state-save.patch +++ /dev/null @@ -1,506 +0,0 @@ -Subject: [PATCH 1/2] KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures -From: Paul Mackerras <paulus@ozlabs.org> -Date: 2016-07-28 6:11:18 - -This moves the transactional memory state save and restore sequences -out of the guest entry/exit paths into separate procedures. This is -so that these sequences can be used in going into and out of nap -in a subsequent patch. - -The only code changes here are (a) saving and restore LR on the -stack, since these new procedures get called with a bl instruction, -(b) explicitly saving r1 into the PACA instead of assuming that -HSTATE_HOST_R1(r13) is already set, and (c) removing an unnecessary -and redundant setting of MSR[TM] that should have been removed by -commit 9d4d0bdd9e0a ("KVM: PPC: Book3S HV: Add transactional memory -support", 2013-09-24) but wasn't. - -Cc: stable@vger.kernel.org # v3.15+ -Signed-off-by: Paul Mackerras <paulus@ozlabs.org> ---- - arch/powerpc/kvm/book3s_hv_rmhandlers.S | 449 +++++++++++++++++--------------- - 1 file changed, 237 insertions(+), 212 deletions(-) - -diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S -index 0d246fc..cfa4031 100644 ---- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S -+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S -@@ -689,112 +689,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) - - #ifdef CONFIG_PPC_TRANSACTIONAL_MEM - BEGIN_FTR_SECTION -- b skip_tm --END_FTR_SECTION_IFCLR(CPU_FTR_TM) -- -- /* Turn on TM/FP/VSX/VMX so we can restore them. */ -- mfmsr r5 -- li r6, MSR_TM >> 32 -- sldi r6, r6, 32 -- or r5, r5, r6 -- ori r5, r5, MSR_FP -- oris r5, r5, (MSR_VEC | MSR_VSX)@h -- mtmsrd r5 -- -- /* -- * The user may change these outside of a transaction, so they must -- * always be context switched. -- */ -- ld r5, VCPU_TFHAR(r4) -- ld r6, VCPU_TFIAR(r4) -- ld r7, VCPU_TEXASR(r4) -- mtspr SPRN_TFHAR, r5 -- mtspr SPRN_TFIAR, r6 -- mtspr SPRN_TEXASR, r7 -- -- ld r5, VCPU_MSR(r4) -- rldicl. r5, r5, 64 - MSR_TS_S_LG, 62 -- beq skip_tm /* TM not active in guest */ -- -- /* Make sure the failure summary is set, otherwise we'll program check -- * when we trechkpt. It's possible that this might have been not set -- * on a kvmppc_set_one_reg() call but we shouldn't let this crash the -- * host. -- */ -- oris r7, r7, (TEXASR_FS)@h -- mtspr SPRN_TEXASR, r7 -- -- /* -- * We need to load up the checkpointed state for the guest. -- * We need to do this early as it will blow away any GPRs, VSRs and -- * some SPRs. -- */ -- -- mr r31, r4 -- addi r3, r31, VCPU_FPRS_TM -- bl load_fp_state -- addi r3, r31, VCPU_VRS_TM -- bl load_vr_state -- mr r4, r31 -- lwz r7, VCPU_VRSAVE_TM(r4) -- mtspr SPRN_VRSAVE, r7 -- -- ld r5, VCPU_LR_TM(r4) -- lwz r6, VCPU_CR_TM(r4) -- ld r7, VCPU_CTR_TM(r4) -- ld r8, VCPU_AMR_TM(r4) -- ld r9, VCPU_TAR_TM(r4) -- mtlr r5 -- mtcr r6 -- mtctr r7 -- mtspr SPRN_AMR, r8 -- mtspr SPRN_TAR, r9 -- -- /* -- * Load up PPR and DSCR values but don't put them in the actual SPRs -- * till the last moment to avoid running with userspace PPR and DSCR for -- * too long. -- */ -- ld r29, VCPU_DSCR_TM(r4) -- ld r30, VCPU_PPR_TM(r4) -- -- std r2, PACATMSCRATCH(r13) /* Save TOC */ -- -- /* Clear the MSR RI since r1, r13 are all going to be foobar. */ -- li r5, 0 -- mtmsrd r5, 1 -- -- /* Load GPRs r0-r28 */ -- reg = 0 -- .rept 29 -- ld reg, VCPU_GPRS_TM(reg)(r31) -- reg = reg + 1 -- .endr -- -- mtspr SPRN_DSCR, r29 -- mtspr SPRN_PPR, r30 -- -- /* Load final GPRs */ -- ld 29, VCPU_GPRS_TM(29)(r31) -- ld 30, VCPU_GPRS_TM(30)(r31) -- ld 31, VCPU_GPRS_TM(31)(r31) -- -- /* TM checkpointed state is now setup. All GPRs are now volatile. */ -- TRECHKPT -- -- /* Now let's get back the state we need. */ -- HMT_MEDIUM -- GET_PACA(r13) -- ld r29, HSTATE_DSCR(r13) -- mtspr SPRN_DSCR, r29 -- ld r4, HSTATE_KVM_VCPU(r13) -- ld r1, HSTATE_HOST_R1(r13) -- ld r2, PACATMSCRATCH(r13) -- -- /* Set the MSR RI since we have our registers back. */ -- li r5, MSR_RI -- mtmsrd r5, 1 --skip_tm: -+ bl kvmppc_restore_tm -+END_FTR_SECTION_IFSET(CPU_FTR_TM) - #endif - - /* Load guest PMU registers */ -@@ -875,12 +771,6 @@ BEGIN_FTR_SECTION - /* Skip next section on POWER7 */ - b 8f - END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) -- /* Turn on TM so we can access TFHAR/TFIAR/TEXASR */ -- mfmsr r8 -- li r0, 1 -- rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG -- mtmsrd r8 -- - /* Load up POWER8-specific registers */ - ld r5, VCPU_IAMR(r4) - lwz r6, VCPU_PSPB(r4) -@@ -1470,106 +1360,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) - - #ifdef CONFIG_PPC_TRANSACTIONAL_MEM - BEGIN_FTR_SECTION -- b 2f --END_FTR_SECTION_IFCLR(CPU_FTR_TM) -- /* Turn on TM. */ -- mfmsr r8 -- li r0, 1 -- rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG -- mtmsrd r8 -- -- ld r5, VCPU_MSR(r9) -- rldicl. r5, r5, 64 - MSR_TS_S_LG, 62 -- beq 1f /* TM not active in guest. */ -- -- li r3, TM_CAUSE_KVM_RESCHED -- -- /* Clear the MSR RI since r1, r13 are all going to be foobar. */ -- li r5, 0 -- mtmsrd r5, 1 -- -- /* All GPRs are volatile at this point. */ -- TRECLAIM(R3) -- -- /* Temporarily store r13 and r9 so we have some regs to play with */ -- SET_SCRATCH0(r13) -- GET_PACA(r13) -- std r9, PACATMSCRATCH(r13) -- ld r9, HSTATE_KVM_VCPU(r13) -- -- /* Get a few more GPRs free. */ -- std r29, VCPU_GPRS_TM(29)(r9) -- std r30, VCPU_GPRS_TM(30)(r9) -- std r31, VCPU_GPRS_TM(31)(r9) -- -- /* Save away PPR and DSCR soon so don't run with user values. */ -- mfspr r31, SPRN_PPR -- HMT_MEDIUM -- mfspr r30, SPRN_DSCR -- ld r29, HSTATE_DSCR(r13) -- mtspr SPRN_DSCR, r29 -- -- /* Save all but r9, r13 & r29-r31 */ -- reg = 0 -- .rept 29 -- .if (reg != 9) && (reg != 13) -- std reg, VCPU_GPRS_TM(reg)(r9) -- .endif -- reg = reg + 1 -- .endr -- /* ... now save r13 */ -- GET_SCRATCH0(r4) -- std r4, VCPU_GPRS_TM(13)(r9) -- /* ... and save r9 */ -- ld r4, PACATMSCRATCH(r13) -- std r4, VCPU_GPRS_TM(9)(r9) -- -- /* Reload stack pointer and TOC. */ -- ld r1, HSTATE_HOST_R1(r13) -- ld r2, PACATOC(r13) -- -- /* Set MSR RI now we have r1 and r13 back. */ -- li r5, MSR_RI -- mtmsrd r5, 1 -- -- /* Save away checkpinted SPRs. */ -- std r31, VCPU_PPR_TM(r9) -- std r30, VCPU_DSCR_TM(r9) -- mflr r5 -- mfcr r6 -- mfctr r7 -- mfspr r8, SPRN_AMR -- mfspr r10, SPRN_TAR -- std r5, VCPU_LR_TM(r9) -- stw r6, VCPU_CR_TM(r9) -- std r7, VCPU_CTR_TM(r9) -- std r8, VCPU_AMR_TM(r9) -- std r10, VCPU_TAR_TM(r9) -- -- /* Restore r12 as trap number. */ -- lwz r12, VCPU_TRAP(r9) -- -- /* Save FP/VSX. */ -- addi r3, r9, VCPU_FPRS_TM -- bl store_fp_state -- addi r3, r9, VCPU_VRS_TM -- bl store_vr_state -- mfspr r6, SPRN_VRSAVE -- stw r6, VCPU_VRSAVE_TM(r9) --1: -- /* -- * We need to save these SPRs after the treclaim so that the software -- * error code is recorded correctly in the TEXASR. Also the user may -- * change these outside of a transaction, so they must always be -- * context switched. -- */ -- mfspr r5, SPRN_TFHAR -- mfspr r6, SPRN_TFIAR -- mfspr r7, SPRN_TEXASR -- std r5, VCPU_TFHAR(r9) -- std r6, VCPU_TFIAR(r9) -- std r7, VCPU_TEXASR(r9) --2: -+ bl kvmppc_save_tm -+END_FTR_SECTION_IFSET(CPU_FTR_TM) - #endif - - /* Increment yield count if they have a VPA */ -@@ -2694,6 +2486,239 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) - mr r4,r31 - blr - -+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM -+/* -+ * Save transactional state and TM-related registers. -+ * Called with r9 pointing to the vcpu struct. -+ * This can modify all checkpointed registers, but -+ * restores r1, r2 and r9 (vcpu pointer) before exit. -+ */ -+kvmppc_save_tm: -+ mflr r0 -+ std r0, PPC_LR_STKOFF(r1) -+ -+ /* Turn on TM. */ -+ mfmsr r8 -+ li r0, 1 -+ rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG -+ mtmsrd r8 -+ -+ ld r5, VCPU_MSR(r9) -+ rldicl. r5, r5, 64 - MSR_TS_S_LG, 62 -+ beq 1f /* TM not active in guest. */ -+ -+ std r1, HSTATE_HOST_R1(r13) -+ li r3, TM_CAUSE_KVM_RESCHED -+ -+ /* Clear the MSR RI since r1, r13 are all going to be foobar. */ -+ li r5, 0 -+ mtmsrd r5, 1 -+ -+ /* All GPRs are volatile at this point. */ -+ TRECLAIM(R3) -+ -+ /* Temporarily store r13 and r9 so we have some regs to play with */ -+ SET_SCRATCH0(r13) -+ GET_PACA(r13) -+ std r9, PACATMSCRATCH(r13) -+ ld r9, HSTATE_KVM_VCPU(r13) -+ -+ /* Get a few more GPRs free. */ -+ std r29, VCPU_GPRS_TM(29)(r9) -+ std r30, VCPU_GPRS_TM(30)(r9) -+ std r31, VCPU_GPRS_TM(31)(r9) -+ -+ /* Save away PPR and DSCR soon so don't run with user values. */ -+ mfspr r31, SPRN_PPR -+ HMT_MEDIUM -+ mfspr r30, SPRN_DSCR -+ ld r29, HSTATE_DSCR(r13) -+ mtspr SPRN_DSCR, r29 -+ -+ /* Save all but r9, r13 & r29-r31 */ -+ reg = 0 -+ .rept 29 -+ .if (reg != 9) && (reg != 13) -+ std reg, VCPU_GPRS_TM(reg)(r9) -+ .endif -+ reg = reg + 1 -+ .endr -+ /* ... now save r13 */ -+ GET_SCRATCH0(r4) -+ std r4, VCPU_GPRS_TM(13)(r9) -+ /* ... and save r9 */ -+ ld r4, PACATMSCRATCH(r13) -+ std r4, VCPU_GPRS_TM(9)(r9) -+ -+ /* Reload stack pointer and TOC. */ -+ ld r1, HSTATE_HOST_R1(r13) -+ ld r2, PACATOC(r13) -+ -+ /* Set MSR RI now we have r1 and r13 back. */ -+ li r5, MSR_RI -+ mtmsrd r5, 1 -+ -+ /* Save away checkpinted SPRs. */ -+ std r31, VCPU_PPR_TM(r9) -+ std r30, VCPU_DSCR_TM(r9) -+ mflr r5 -+ mfcr r6 -+ mfctr r7 -+ mfspr r8, SPRN_AMR -+ mfspr r10, SPRN_TAR -+ std r5, VCPU_LR_TM(r9) -+ stw r6, VCPU_CR_TM(r9) -+ std r7, VCPU_CTR_TM(r9) -+ std r8, VCPU_AMR_TM(r9) -+ std r10, VCPU_TAR_TM(r9) -+ -+ /* Restore r12 as trap number. */ -+ lwz r12, VCPU_TRAP(r9) -+ -+ /* Save FP/VSX. */ -+ addi r3, r9, VCPU_FPRS_TM -+ bl store_fp_state -+ addi r3, r9, VCPU_VRS_TM -+ bl store_vr_state -+ mfspr r6, SPRN_VRSAVE -+ stw r6, VCPU_VRSAVE_TM(r9) -+1: -+ /* -+ * We need to save these SPRs after the treclaim so that the software -+ * error code is recorded correctly in the TEXASR. Also the user may -+ * change these outside of a transaction, so they must always be -+ * context switched. -+ */ -+ mfspr r5, SPRN_TFHAR -+ mfspr r6, SPRN_TFIAR -+ mfspr r7, SPRN_TEXASR -+ std r5, VCPU_TFHAR(r9) -+ std r6, VCPU_TFIAR(r9) -+ std r7, VCPU_TEXASR(r9) -+ -+ ld r0, PPC_LR_STKOFF(r1) -+ mtlr r0 -+ blr -+ -+/* -+ * Restore transactional state and TM-related registers. -+ * Called with r4 pointing to the vcpu struct. -+ * This potentially modifies all checkpointed registers. -+ * It restores r1, r2, r4 from the PACA. -+ */ -+kvmppc_restore_tm: -+ mflr r0 -+ std r0, PPC_LR_STKOFF(r1) -+ -+ /* Turn on TM/FP/VSX/VMX so we can restore them. */ -+ mfmsr r5 -+ li r6, MSR_TM >> 32 -+ sldi r6, r6, 32 -+ or r5, r5, r6 -+ ori r5, r5, MSR_FP -+ oris r5, r5, (MSR_VEC | MSR_VSX)@h -+ mtmsrd r5 -+ -+ /* -+ * The user may change these outside of a transaction, so they must -+ * always be context switched. -+ */ -+ ld r5, VCPU_TFHAR(r4) -+ ld r6, VCPU_TFIAR(r4) -+ ld r7, VCPU_TEXASR(r4) -+ mtspr SPRN_TFHAR, r5 -+ mtspr SPRN_TFIAR, r6 -+ mtspr SPRN_TEXASR, r7 -+ -+ ld r5, VCPU_MSR(r4) -+ rldicl. r5, r5, 64 - MSR_TS_S_LG, 62 -+ beqlr /* TM not active in guest */ -+ std r1, HSTATE_HOST_R1(r13) -+ -+ /* Make sure the failure summary is set, otherwise we'll program check -+ * when we trechkpt. It's possible that this might have been not set -+ * on a kvmppc_set_one_reg() call but we shouldn't let this crash the -+ * host. -+ */ -+ oris r7, r7, (TEXASR_FS)@h -+ mtspr SPRN_TEXASR, r7 -+ -+ /* -+ * We need to load up the checkpointed state for the guest. -+ * We need to do this early as it will blow away any GPRs, VSRs and -+ * some SPRs. -+ */ -+ -+ mr r31, r4 -+ addi r3, r31, VCPU_FPRS_TM -+ bl load_fp_state -+ addi r3, r31, VCPU_VRS_TM -+ bl load_vr_state -+ mr r4, r31 -+ lwz r7, VCPU_VRSAVE_TM(r4) -+ mtspr SPRN_VRSAVE, r7 -+ -+ ld r5, VCPU_LR_TM(r4) -+ lwz r6, VCPU_CR_TM(r4) -+ ld r7, VCPU_CTR_TM(r4) -+ ld r8, VCPU_AMR_TM(r4) -+ ld r9, VCPU_TAR_TM(r4) -+ mtlr r5 -+ mtcr r6 -+ mtctr r7 -+ mtspr SPRN_AMR, r8 -+ mtspr SPRN_TAR, r9 -+ -+ /* -+ * Load up PPR and DSCR values but don't put them in the actual SPRs -+ * till the last moment to avoid running with userspace PPR and DSCR for -+ * too long. -+ */ -+ ld r29, VCPU_DSCR_TM(r4) -+ ld r30, VCPU_PPR_TM(r4) -+ -+ std r2, PACATMSCRATCH(r13) /* Save TOC */ -+ -+ /* Clear the MSR RI since r1, r13 are all going to be foobar. */ -+ li r5, 0 -+ mtmsrd r5, 1 -+ -+ /* Load GPRs r0-r28 */ -+ reg = 0 -+ .rept 29 -+ ld reg, VCPU_GPRS_TM(reg)(r31) -+ reg = reg + 1 -+ .endr -+ -+ mtspr SPRN_DSCR, r29 -+ mtspr SPRN_PPR, r30 -+ -+ /* Load final GPRs */ -+ ld 29, VCPU_GPRS_TM(29)(r31) -+ ld 30, VCPU_GPRS_TM(30)(r31) -+ ld 31, VCPU_GPRS_TM(31)(r31) -+ -+ /* TM checkpointed state is now setup. All GPRs are now volatile. */ -+ TRECHKPT -+ -+ /* Now let's get back the state we need. */ -+ HMT_MEDIUM -+ GET_PACA(r13) -+ ld r29, HSTATE_DSCR(r13) -+ mtspr SPRN_DSCR, r29 -+ ld r4, HSTATE_KVM_VCPU(r13) -+ ld r1, HSTATE_HOST_R1(r13) -+ ld r2, PACATMSCRATCH(r13) -+ -+ /* Set the MSR RI since we have our registers back. */ -+ li r5, MSR_RI -+ mtmsrd r5, 1 -+ -+ ld r0, PPC_LR_STKOFF(r1) -+ mtlr r0 -+ blr -+#endif -+ - /* - * We come here if we get any exception or interrupt while we are - * executing host real mode code while in guest MMU context. --- -2.8.0.rc3 diff --git a/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch b/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch deleted file mode 100644 index f63aa795d..000000000 --- a/kvm-ppc-Book3S-HV-Save-restore-TM-state.patch +++ /dev/null @@ -1,67 +0,0 @@ -Subject: [PATCH 2/2] KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE -From: Paul Mackerras <paulus@ozlabs.org> -Date: 2016-07-28 6:11:19 - -It turns out that if the guest does a H_CEDE while the CPU is in -a transactional state, and the H_CEDE does a nap, and the nap -loses the architected state of the CPU (which is is allowed to do), -then we lose the checkpointed state of the virtual CPU. In addition, -the transactional-memory state recorded in the MSR gets reset back -to non-transactional, and when we try to return to the guest, we take -a TM bad thing type of program interrupt because we are trying to -transition from non-transactional to transactional with a hrfid -instruction, which is not permitted. - -The result of the program interrupt occurring at that point is that -the host CPU will hang in an infinite loop with interrupts disabled. -Thus this is a denial of service vulnerability in the host which can -be triggered by any guest (and depending on the guest kernel, it can -potentially triggered by unprivileged userspace in the guest). - -This vulnerability has been assigned the ID CVE-2016-5412. - -To fix this, we save the TM state before napping and restore it -on exit from the nap, when handling a H_CEDE in real mode. The -case where H_CEDE exits to host virtual mode is already OK (as are -other hcalls which exit to host virtual mode) because the exit -path saves the TM state. - -Cc: stable@vger.kernel.org # v3.15+ -Signed-off-by: Paul Mackerras <paulus@ozlabs.org> ---- - arch/powerpc/kvm/book3s_hv_rmhandlers.S | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S -index cfa4031..543124f 100644 ---- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S -+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S -@@ -2093,6 +2093,13 @@ _GLOBAL(kvmppc_h_cede) /* r3 = vcpu pointer, r11 = msr, r13 = paca */ - /* save FP state */ - bl kvmppc_save_fp - -+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM -+BEGIN_FTR_SECTION -+ ld r9, HSTATE_KVM_VCPU(r13) -+ bl kvmppc_save_tm -+END_FTR_SECTION_IFSET(CPU_FTR_TM) -+#endif -+ - /* - * Set DEC to the smaller of DEC and HDEC, so that we wake - * no later than the end of our timeslice (HDEC interrupts -@@ -2169,6 +2176,12 @@ kvm_end_cede: - bl kvmhv_accumulate_time - #endif - -+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM -+BEGIN_FTR_SECTION -+ bl kvmppc_restore_tm -+END_FTR_SECTION_IFSET(CPU_FTR_TM) -+#endif -+ - /* load up FP state */ - bl kvmppc_load_fp - --- -2.8.0.rc3 diff --git a/scripts/newpatch.sh b/scripts/newpatch.sh index 0dc2e837c..2d7498655 100755 --- a/scripts/newpatch.sh +++ b/scripts/newpatch.sh @@ -1,21 +1,42 @@ #!/bin/sh -# Easy application of new patches. -# Always adds to the very end. (Bumps last patch nr by 100) -# Parameters: -# $1 - patch filename -# $2 - description -OLD=$(grep ^Patch kernel.spec | tail -n1 | awk '{ print $1 }' | sed s/Patch// | sed s/://) -NEW=$(($OLD/100*100+100)) +# Facilitates the addition of a new patch to the source tree. +# -- Moves patch to tree +# -- Adds patch to kernel.spec list of patches +# -- Adds patch to git +# -- change buildid macro to the name of the patch being added -sed -i "/^Patch$OLD:\ /a#\ $2\nPatch$NEW:\ $1" kernel.spec - -LAST=$(grep ^ApplyPatch kernel.spec | tail -n1 | awk '{ print $2 }') - -sed -i "/^ApplyPatch $LAST/aApplyPatch $1" kernel.spec - -cvs add $1 - -scripts/bumpspecfile.py kernel.spec "- $2" -make clog +# Base directory is relative to where the script is. +BASEDIR="$(dirname "$(cd $(dirname $BASH_SOURCE[0]) && pwd)")" +pushd $BASEDIR > /dev/null +# Check for at least patch +if [ "$#" -lt 1 ]; then + echo "usage: $0 [ /path/to/patch/ ] [ description ]" + exit 1 +fi +PATCHDIR=$1 +DESC=$2 +PATCH="$(basename "$PATCHDIR")" +# Kernel.spec file in the current tree +SPECFILE="$BASEDIR/kernel.spec" +# If adding patch from outside the source tree move it to the source tree +if [ -z "$(ls | grep $PATCH)" ]; then + cp $PATCHDIR $BASEDIR/ +fi +if [ ! -z "$(grep $PATCH $SPECFILE)" ] +then + echo "$PATCH already in kernel.spec" + exit 1 +fi +# ID number of the last patch in kernel.spec +LPATCH_ID=$(grep ^Patch $SPECFILE | tail -n1 | awk '{ print $1 }' | sed s/Patch// | sed s/://) +# ID of the next patch to be added to kernel.spec +NPATCH_ID=$(($LPATCH_ID + 1 )) +# Add patch with new id at the end of the list of patches +sed -i "/^Patch$LPATCH_ID:\ /a#\ $DESC\nPatch$NPATCH_ID:\ $PATCH" $SPECFILE +# Add it to git +git add $PATCH +BUILDID_PATCH="$(echo $PATCH | sed 's/\-/\_/g' )" +sed -i "s/^.*define buildid .*$/%define buildid .$BUILDID_PATCH/" $SPECFILE +popd > /dev/null @@ -1,3 +1,3 @@ 5276563eb1f39a048e4a8a887408c031 linux-4.7.tar.xz fe259c02c75eec61d1aa4b1211f3c853 perf-man-4.7.tar.gz -6661b4dfc07bb1f534b89ad8a862543d patch-4.7-git3.xz +49f6889a0303e4aef5f3b604d8642da0 patch-4.7-git6.xz |