diff options
67 files changed, 4169 insertions, 6131 deletions
diff --git a/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch b/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch new file mode 100644 index 000000000..dc6e2e086 --- /dev/null +++ b/0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch @@ -0,0 +1,198 @@ +From 2a6f0971d09e2bb88d2ae40d91ceb2776090497d Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 11:11:50 +0200 +Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state + +Upstream: since drm-intel-next-2016-05-22 +commit e8f1f02e7125220b99af8047703b63c11a7081d6 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:05:55 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:32:11 2016 -0700 + + drm/i915: Reorganize WM structs/unions in CRTC state + + Reorganize the nested structures and unions we have for pipe watermark + data in intel_crtc_state so that platform-specific data can be added in + a more sensible manner (and save a bit of memory at the same time). + + The change basically changes the organization from: + + union { + struct intel_pipe_wm ilk; + struct intel_pipe_wm skl; + } optimal; + + struct intel_pipe_wm intermediate /* ILK-only */ + + to + + union { + struct { + struct intel_pipe_wm intermediate; + struct intel_pipe_wm optimal; + } ilk; + + struct { + struct intel_pipe_wm optimal; + } skl; + } + + There should be no functional change here, but it will allow us to add + more platform-specific fields going forward (and more easily extend to + other platform types like VLV). + + While we're at it, let's move the entire watermark substructure out to + its own structure definition to make the code slightly more readable. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_drv.h | 48 +++++++++++++++++++++++++++++++--------- + drivers/gpu/drm/i915/intel_pm.c | 16 +++++++------- + 2 files changed, 46 insertions(+), 18 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index 3a30b37..7d19baf 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -363,6 +363,40 @@ struct skl_pipe_wm { + uint32_t linetime; + }; + ++struct intel_crtc_wm_state { ++ union { ++ struct { ++ /* ++ * Intermediate watermarks; these can be ++ * programmed immediately since they satisfy ++ * both the current configuration we're ++ * switching away from and the new ++ * configuration we're switching to. ++ */ ++ struct intel_pipe_wm intermediate; ++ ++ /* ++ * Optimal watermarks, programmed post-vblank ++ * when this state is committed. ++ */ ++ struct intel_pipe_wm optimal; ++ } ilk; ++ ++ struct { ++ /* gen9+ only needs 1-step wm programming */ ++ struct skl_pipe_wm optimal; ++ } skl; ++ }; ++ ++ /* ++ * Platforms with two-step watermark programming will need to ++ * update watermark programming post-vblank to switch from the ++ * safe intermediate watermarks to the optimal final ++ * watermarks. ++ */ ++ bool need_postvbl_update; ++}; ++ + struct intel_crtc_state { + struct drm_crtc_state base; + +@@ -509,16 +543,10 @@ struct intel_crtc_state { + /* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */ + bool disable_lp_wm; + +- struct { +- /* +- * optimal watermarks, programmed post-vblank when this state +- * is committed +- */ +- union { +- struct intel_pipe_wm ilk; +- struct skl_pipe_wm skl; +- } optimal; +- } wm; ++ struct intel_crtc_wm_state wm; ++ ++ /* Gamma mode programmed on the pipe */ ++ uint32_t gamma_mode; + }; + + struct vlv_wm_state { +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 54ab023..0da1d60 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2302,7 +2302,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc *intel_crtc, + if (IS_ERR(cstate)) + return PTR_ERR(cstate); + +- pipe_wm = &cstate->wm.optimal.ilk; ++ pipe_wm = &cstate->wm.ilk.optimal; + memset(pipe_wm, 0, sizeof(*pipe_wm)); + + for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +@@ -2385,7 +2385,7 @@ static void ilk_merge_wm_level(struct drm_device *dev, + for_each_intel_crtc(dev, intel_crtc) { + const struct intel_crtc_state *cstate = + to_intel_crtc_state(intel_crtc->base.state); +- const struct intel_pipe_wm *active = &cstate->wm.optimal.ilk; ++ const struct intel_pipe_wm *active = &cstate->wm.ilk.optimal; + const struct intel_wm_level *wm = &active->wm[level]; + + if (!active->pipe_enabled) +@@ -2536,12 +2536,12 @@ static void ilk_compute_wm_results(struct drm_device *dev, + const struct intel_crtc_state *cstate = + to_intel_crtc_state(intel_crtc->base.state); + enum pipe pipe = intel_crtc->pipe; +- const struct intel_wm_level *r = &cstate->wm.optimal.ilk.wm[0]; ++ const struct intel_wm_level *r = &cstate->wm.ilk.optimal.wm[0]; + + if (WARN_ON(!r->enable)) + continue; + +- results->wm_linetime[pipe] = cstate->wm.optimal.ilk.linetime; ++ results->wm_linetime[pipe] = cstate->wm.ilk.optimal.linetime; + + results->wm_pipe[pipe] = + (r->pri_val << WM0_PIPE_PLANE_SHIFT) | +@@ -3617,7 +3617,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + struct drm_i915_private *dev_priv = dev->dev_private; + struct skl_wm_values *results = &dev_priv->wm.skl_results; + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); +- struct skl_pipe_wm *pipe_wm = &cstate->wm.optimal.skl; ++ struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; + + + /* Clear all dirty flags */ +@@ -3711,7 +3711,7 @@ static void ilk_update_wm(struct drm_crtc *crtc) + intel_wait_for_vblank(crtc->dev, intel_crtc->pipe); + } + +- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk; ++ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal; + + ilk_program_watermarks(cstate); + } +@@ -3767,7 +3767,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) + struct skl_wm_values *hw = &dev_priv->wm.skl_hw; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); +- struct skl_pipe_wm *active = &cstate->wm.optimal.skl; ++ struct skl_pipe_wm *active = &cstate->wm.skl.optimal; + enum pipe pipe = intel_crtc->pipe; + int level, i, max_level; + uint32_t temp; +@@ -3833,7 +3833,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) + struct ilk_wm_values *hw = &dev_priv->wm.hw; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); +- struct intel_pipe_wm *active = &cstate->wm.optimal.ilk; ++ struct intel_pipe_wm *active = &cstate->wm.ilk.optimal; + enum pipe pipe = intel_crtc->pipe; + static const i915_reg_t wm0_pipe_reg[] = { + [PIPE_A] = WM0_PIPEA_ILK, +-- +2.7.4 + diff --git a/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch b/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch new file mode 100644 index 000000000..e583d09e8 --- /dev/null +++ b/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch @@ -0,0 +1,58 @@ +From 1e5895f2c6068fb9ae5356e3a751a29a22af5f01 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 14:53:03 +0200 +Subject: [PATCH 1/6] drm/mgag200: Black screen fix for G200e rev 4 + +Upstream: since drm-fixes-for-v4.7 +commit d3922b69617b62bb2509936b68301f837229d9f0 + +Author: Mathieu Larouche <mathieu.larouche@matrox.com> +AuthorDate: Fri May 27 15:12:50 2016 -0400 +Commit: Dave Airlie <airlied@redhat.com> +CommitDate: Wed Jun 1 15:25:04 2016 +1000 + + drm/mgag200: Black screen fix for G200e rev 4 + + - Fixed black screen for some resolutions of G200e rev4 + - Fixed testm & testn which had predetermined value. + + Reported-by: Jan Beulich <jbeulich@suse.com> + + Signed-off-by: Mathieu Larouche <mathieu.larouche@matrox.com> + Cc: stable@vger.kernel.org + Signed-off-by: Dave Airlie <airlied@redhat.com> +--- + drivers/gpu/drm/mgag200/mgag200_mode.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c +index 14e64e0..d347dca 100644 +--- a/drivers/gpu/drm/mgag200/mgag200_mode.c ++++ b/drivers/gpu/drm/mgag200/mgag200_mode.c +@@ -182,7 +182,7 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock) + } + } + +- fvv = pllreffreq * testn / testm; ++ fvv = pllreffreq * (n + 1) / (m + 1); + fvv = (fvv - 800000) / 50000; + + if (fvv > 15) +@@ -202,6 +202,14 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock) + WREG_DAC(MGA1064_PIX_PLLC_M, m); + WREG_DAC(MGA1064_PIX_PLLC_N, n); + WREG_DAC(MGA1064_PIX_PLLC_P, p); ++ ++ if (mdev->unique_rev_id >= 0x04) { ++ WREG_DAC(0x1a, 0x09); ++ msleep(20); ++ WREG_DAC(0x1a, 0x01); ++ ++ } ++ + return 0; + } + +-- +2.7.4 + diff --git a/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch b/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch deleted file mode 100644 index 44ef3662b..000000000 --- a/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch +++ /dev/null @@ -1,173 +0,0 @@ -From 8b368e8e961944105945fbe36f3f264252bfd19a Mon Sep 17 00:00:00 2001 -From: Dan Williams <dan.j.williams@intel.com> -Date: Thu, 25 Feb 2016 01:02:30 +0000 -Subject: [PATCH] mm: CONFIG_NR_ZONES_EXTENDED - -ZONE_DEVICE (merged in 4.3) and ZONE_CMA (proposed) are examples of new mm -zones that are bumping up against the current maximum limit of 4 zones, -i.e. 2 bits in page->flags. When adding a zone this equation still needs -to be satisified: - - SECTIONS_WIDTH + ZONES_WIDTH + NODES_SHIFT + LAST_CPUPID_SHIFT - <= BITS_PER_LONG - NR_PAGEFLAGS - -ZONE_DEVICE currently tries to satisfy this equation by requiring that -ZONE_DMA be disabled, but this is untenable given generic kernels want to -support ZONE_DEVICE and ZONE_DMA simultaneously. ZONE_CMA would like to -increase the amount of memory covered per section, but that limits the -minimum granularity at which consecutive memory ranges can be added via -devm_memremap_pages(). - -The trade-off of what is acceptable to sacrifice depends heavily on the -platform. For example, ZONE_CMA is targeted for 32-bit platforms where -page->flags is constrained, but those platforms likely do not care about -the minimum granularity of memory hotplug. A big iron machine with 1024 -numa nodes can likely sacrifice ZONE_DMA where a general purpose -distribution kernel can not. - -CONFIG_NR_ZONES_EXTENDED is a configuration symbol that gets selected when -the number of configured zones exceeds 4. It documents the configuration -symbols and definitions that get modified when ZONES_WIDTH is greater than -2. - -For now, it steals a bit from NODES_SHIFT. Later on it can be used to -document the definitions that get modified when a 32-bit configuration -wants more zone bits. - -Note that GFP_ZONE_TABLE poses an interesting constraint since -include/linux/gfp.h gets included by the 32-bit portion of a 64-bit build. -We need to be careful to only build the table for zones that have a -corresponding gfp_t flag. GFP_ZONES_SHIFT is introduced for this purpose. -This patch does not attempt to solve the problem of adding a new zone -that also has a corresponding GFP_ flag. - -Link: https://bugzilla.kernel.org/show_bug.cgi?id=110931 -Fixes: 033fbae988fc ("mm: ZONE_DEVICE for "device memory"") -Signed-off-by: Dan Williams <dan.j.williams@intel.com> -Reported-by: Mark <markk@clara.co.uk> -Cc: Mel Gorman <mgorman@suse.de> -Cc: Rik van Riel <riel@redhat.com> -Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com> -Cc: Dave Hansen <dave.hansen@linux.intel.com> -Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com> -Signed-off-by: Andrew Morton <akpm@linux-foundation.org> ---- - arch/x86/Kconfig | 6 ++++-- - include/linux/gfp.h | 33 ++++++++++++++++++++------------- - include/linux/page-flags-layout.h | 2 ++ - mm/Kconfig | 7 +++++-- - 4 files changed, 31 insertions(+), 17 deletions(-) - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 3fef519..b94704a 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1409,8 +1409,10 @@ config NUMA_EMU - - config NODES_SHIFT - int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP -- range 1 10 -- default "10" if MAXSMP -+ range 1 10 if !NR_ZONES_EXTENDED -+ range 1 9 if NR_ZONES_EXTENDED -+ default "10" if MAXSMP && !NR_ZONES_EXTENDED -+ default "9" if MAXSMP && NR_ZONES_EXTENDED - default "6" if X86_64 - default "3" - depends on NEED_MULTIPLE_NODES -diff --git a/include/linux/gfp.h b/include/linux/gfp.h -index af1f2b2..d201d8a 100644 ---- a/include/linux/gfp.h -+++ b/include/linux/gfp.h -@@ -329,22 +329,29 @@ static inline bool gfpflags_allow_blocking(const gfp_t gfp_flags) - * 0xe => BAD (MOVABLE+DMA32+HIGHMEM) - * 0xf => BAD (MOVABLE+DMA32+HIGHMEM+DMA) - * -- * ZONES_SHIFT must be <= 2 on 32 bit platforms. -+ * GFP_ZONES_SHIFT must be <= 2 on 32 bit platforms. - */ - --#if 16 * ZONES_SHIFT > BITS_PER_LONG --#error ZONES_SHIFT too large to create GFP_ZONE_TABLE integer -+#if defined(CONFIG_ZONE_DEVICE) && (MAX_NR_ZONES-1) <= 4 -+/* ZONE_DEVICE is not a valid GFP zone specifier */ -+#define GFP_ZONES_SHIFT 2 -+#else -+#define GFP_ZONES_SHIFT ZONES_SHIFT -+#endif -+ -+#if 16 * GFP_ZONES_SHIFT > BITS_PER_LONG -+#error GFP_ZONES_SHIFT too large to create GFP_ZONE_TABLE integer - #endif - - #define GFP_ZONE_TABLE ( \ -- (ZONE_NORMAL << 0 * ZONES_SHIFT) \ -- | (OPT_ZONE_DMA << ___GFP_DMA * ZONES_SHIFT) \ -- | (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * ZONES_SHIFT) \ -- | (OPT_ZONE_DMA32 << ___GFP_DMA32 * ZONES_SHIFT) \ -- | (ZONE_NORMAL << ___GFP_MOVABLE * ZONES_SHIFT) \ -- | (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * ZONES_SHIFT) \ -- | (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * ZONES_SHIFT) \ -- | (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * ZONES_SHIFT) \ -+ (ZONE_NORMAL << 0 * GFP_ZONES_SHIFT) \ -+ | (OPT_ZONE_DMA << ___GFP_DMA * GFP_ZONES_SHIFT) \ -+ | (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * GFP_ZONES_SHIFT) \ -+ | (OPT_ZONE_DMA32 << ___GFP_DMA32 * GFP_ZONES_SHIFT) \ -+ | (ZONE_NORMAL << ___GFP_MOVABLE * GFP_ZONES_SHIFT) \ -+ | (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * GFP_ZONES_SHIFT) \ -+ | (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * GFP_ZONES_SHIFT) \ -+ | (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * GFP_ZONES_SHIFT) \ - ) - - /* -@@ -369,8 +376,8 @@ static inline enum zone_type gfp_zone(gfp_t flags) - enum zone_type z; - int bit = (__force int) (flags & GFP_ZONEMASK); - -- z = (GFP_ZONE_TABLE >> (bit * ZONES_SHIFT)) & -- ((1 << ZONES_SHIFT) - 1); -+ z = (GFP_ZONE_TABLE >> (bit * GFP_ZONES_SHIFT)) & -+ ((1 << GFP_ZONES_SHIFT) - 1); - VM_BUG_ON((GFP_ZONE_BAD >> bit) & 1); - return z; - } -diff --git a/include/linux/page-flags-layout.h b/include/linux/page-flags-layout.h -index da52366..77b078c 100644 ---- a/include/linux/page-flags-layout.h -+++ b/include/linux/page-flags-layout.h -@@ -17,6 +17,8 @@ - #define ZONES_SHIFT 1 - #elif MAX_NR_ZONES <= 4 - #define ZONES_SHIFT 2 -+#elif MAX_NR_ZONES <= 8 -+#define ZONES_SHIFT 3 - #else - #error ZONES_SHIFT -- too many zones configured adjust calculation - #endif -diff --git a/mm/Kconfig b/mm/Kconfig -index 031a329..7826216 100644 ---- a/mm/Kconfig -+++ b/mm/Kconfig -@@ -652,8 +652,6 @@ config IDLE_PAGE_TRACKING - - config ZONE_DEVICE - bool "Device memory (pmem, etc...) hotplug support" -- default !ZONE_DMA -- depends on !ZONE_DMA - depends on MEMORY_HOTPLUG - depends on MEMORY_HOTREMOVE - depends on X86_64 #arch_add_memory() comprehends device memory -@@ -667,5 +665,10 @@ config ZONE_DEVICE - - If FS_DAX is enabled, then say Y. - -+config NR_ZONES_EXTENDED -+ bool -+ default n if !64BIT -+ default y if ZONE_DEVICE && ZONE_DMA && ZONE_DMA32 -+ - config FRAME_VECTOR - bool --- -2.5.0 - diff --git a/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch b/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch deleted file mode 100644 index 1e2d4db59..000000000 --- a/0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 4d1b08a69350d40e0aa14baba4797ef175295718 Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Wed, 30 Mar 2016 12:40:54 +0100 -Subject: [PATCH 1/2] net: dsa: mv88e6xxx: Introduce - _mv88e6xxx_phy_page_{read,write} - -Add versions of the phy_page_read and _write functions to -be used in a context where the SMI mutex is held. - -Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> -Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> -Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org> ---- - drivers/net/dsa/mv88e6xxx.c | 49 +++++++++++++++++++++++++++++++++------------ - 1 file changed, 36 insertions(+), 13 deletions(-) - -diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c -index 512c8c0..3dcfe13 100644 ---- a/drivers/net/dsa/mv88e6xxx.c -+++ b/drivers/net/dsa/mv88e6xxx.c -@@ -1929,6 +1929,38 @@ static void mv88e6xxx_bridge_work(struct work_struct *work) - } - } - -+static int _mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page, -+ int reg, int val) -+{ -+ int ret; -+ -+ ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); -+ if (ret < 0) -+ goto restore_page_0; -+ -+ ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); -+restore_page_0: -+ _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); -+ -+ return ret; -+} -+ -+static int _mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, -+ int reg) -+{ -+ int ret; -+ -+ ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); -+ if (ret < 0) -+ goto restore_page_0; -+ -+ ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); -+restore_page_0: -+ _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); -+ -+ return ret; -+} -+ - static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) - { - struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); -@@ -2383,13 +2415,9 @@ int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg) - int ret; - - mutex_lock(&ps->smi_mutex); -- ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); -- if (ret < 0) -- goto error; -- ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); --error: -- _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); -+ ret = _mv88e6xxx_phy_page_read(ds, port, page, reg); - mutex_unlock(&ps->smi_mutex); -+ - return ret; - } - -@@ -2400,14 +2428,9 @@ int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page, - int ret; - - mutex_lock(&ps->smi_mutex); -- ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); -- if (ret < 0) -- goto error; -- -- ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); --error: -- _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); -+ ret = _mv88e6xxx_phy_page_write(ds, port, page, reg, val); - mutex_unlock(&ps->smi_mutex); -+ - return ret; - } - --- -2.7.3 - diff --git a/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch b/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch new file mode 100644 index 000000000..f9eecb97a --- /dev/null +++ b/0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch @@ -0,0 +1,60 @@ +From 4d428f0fd6aaaa75382885d897900f619b2dad35 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 11:12:56 +0200 +Subject: [PATCH 02/17] drm/i915: Rename + s/skl_compute_pipe_wm/skl_build_pipe_wm/ + +Upstream: since drm-intel-next-2016-05-22 +commit e7649b54777ba6491204acbe1f1a34fce78637d5 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:05:56 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:32:27 2016 -0700 + + drm/i915: Rename s/skl_compute_pipe_wm/skl_build_pipe_wm/ + + When we added atomic watermarks, we added a new display vfunc + 'compute_pipe_wm' that is used to compute any pipe-specific watermark + information that we can at atomic check time. This was a somewhat poor + naming choice since we already had a 'skl_compute_pipe_wm' function that + doesn't quite fit this model --- the existing SKL function is something + that gets used at atomic commit time, after the DDB allocation has been + determined. Let's rename the existing SKL function to avoid confusion. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-3-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_pm.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 0da1d60..8f081b2 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3266,9 +3266,9 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, + } + } + +-static void skl_compute_pipe_wm(struct intel_crtc_state *cstate, +- struct skl_ddb_allocation *ddb, +- struct skl_pipe_wm *pipe_wm) ++static void skl_build_pipe_wm(struct intel_crtc_state *cstate, ++ struct skl_ddb_allocation *ddb, ++ struct skl_pipe_wm *pipe_wm) + { + struct drm_device *dev = cstate->base.crtc->dev; + const struct drm_i915_private *dev_priv = dev->dev_private; +@@ -3535,7 +3535,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + + skl_allocate_pipe_ddb(cstate, ddb); +- skl_compute_pipe_wm(cstate, ddb, pipe_wm); ++ skl_build_pipe_wm(cstate, ddb, pipe_wm); + + if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) + return false; +-- +2.7.4 + diff --git a/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch b/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch new file mode 100644 index 000000000..d1c32b439 --- /dev/null +++ b/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch @@ -0,0 +1,138 @@ +From 02510a8805db2c3f8ca2926f90c4b3793934404a Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 14:51:45 +0200 +Subject: [PATCH 2/6] drm/nouveau/fbcon: fix out-of-bounds memory accesses + +Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) +commit f045f459d925138fe7d6193a8c86406bda7e49da + +Author: Ben Skeggs <bskeggs@redhat.com> +AuthorDate: Thu Jun 2 12:23:31 2016 +1000 +Commit: Ben Skeggs <bskeggs@redhat.com> +CommitDate: Thu Jun 2 13:53:44 2016 +1000 + + drm/nouveau/fbcon: fix out-of-bounds memory accesses + + Reported by KASAN. + + Signed-off-by: Ben Skeggs <bskeggs@redhat.com> + Cc: stable@vger.kernel.org +--- + drivers/gpu/drm/nouveau/nouveau_fbcon.c | 1 + + drivers/gpu/drm/nouveau/nv04_fbcon.c | 7 ++----- + drivers/gpu/drm/nouveau/nv50_fbcon.c | 6 ++---- + drivers/gpu/drm/nouveau/nvc0_fbcon.c | 6 ++---- + 4 files changed, 7 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c +index 59f27e7..bd89c86 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c ++++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c +@@ -557,6 +557,7 @@ nouveau_fbcon_init(struct drm_device *dev) + if (ret) + goto fini; + ++ fbcon->helper.fbdev->pixmap.buf_align = 4; + return 0; + + fini: +diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c +index 789dc29..8f715fe 100644 +--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c ++++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c +@@ -82,7 +82,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + uint32_t fg; + uint32_t bg; + uint32_t dsize; +- uint32_t width; + uint32_t *data = (uint32_t *)image->data; + int ret; + +@@ -93,9 +92,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + if (ret) + return ret; + +- width = ALIGN(image->width, 8); +- dsize = ALIGN(width * image->height, 32) >> 5; +- + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { + fg = ((uint32_t *) info->pseudo_palette)[image->fg_color]; +@@ -111,10 +107,11 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + ((image->dx + image->width) & 0xffff)); + OUT_RING(chan, bg); + OUT_RING(chan, fg); +- OUT_RING(chan, (image->height << 16) | width); ++ OUT_RING(chan, (image->height << 16) | image->width); + OUT_RING(chan, (image->height << 16) | image->width); + OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff)); + ++ dsize = ALIGN(image->width * image->height, 32) >> 5; + while (dsize) { + int iter_len = dsize > 128 ? 128 : dsize; + +diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c +index e05499d..a4e259a 100644 +--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c ++++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c +@@ -95,7 +95,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + struct nouveau_fbdev *nfbdev = info->par; + struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); + struct nouveau_channel *chan = drm->channel; +- uint32_t width, dwords, *data = (uint32_t *)image->data; ++ uint32_t dwords, *data = (uint32_t *)image->data; + uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel)); + uint32_t *palette = info->pseudo_palette; + int ret; +@@ -107,9 +107,6 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + if (ret) + return ret; + +- width = ALIGN(image->width, 32); +- dwords = (width * image->height) >> 5; +- + BEGIN_NV04(chan, NvSub2D, 0x0814, 2); + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { +@@ -128,6 +125,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + OUT_RING(chan, 0); + OUT_RING(chan, image->dy); + ++ dwords = ALIGN(image->width * image->height, 32) >> 5; + while (dwords) { + int push = dwords > 2047 ? 2047 : dwords; + +diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c +index c97395b..f28315e 100644 +--- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c ++++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c +@@ -95,7 +95,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + struct nouveau_fbdev *nfbdev = info->par; + struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); + struct nouveau_channel *chan = drm->channel; +- uint32_t width, dwords, *data = (uint32_t *)image->data; ++ uint32_t dwords, *data = (uint32_t *)image->data; + uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel)); + uint32_t *palette = info->pseudo_palette; + int ret; +@@ -107,9 +107,6 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + if (ret) + return ret; + +- width = ALIGN(image->width, 32); +- dwords = (width * image->height) >> 5; +- + BEGIN_NVC0(chan, NvSub2D, 0x0814, 2); + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { +@@ -128,6 +125,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) + OUT_RING (chan, 0); + OUT_RING (chan, image->dy); + ++ dwords = ALIGN(image->width * image->height, 32) >> 5; + while (dwords) { + int push = dwords > 2047 ? 2047 : dwords; + +-- +2.7.4 + diff --git a/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch b/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch deleted file mode 100644 index 35b369312..000000000 --- a/0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch +++ /dev/null @@ -1,104 +0,0 @@ -From a878e3fa9657646ff85468075823870fbbd5745f Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Wed, 30 Mar 2016 12:41:22 +0100 -Subject: [PATCH 2/2] net: dsa: mv88e6xxx: Clear the PDOWN bit on setup - -Some of the vendor-specific bootloaders set up this part -of the initialization for us, so this was never added. -However, since upstream bootloaders don't initialize the -chip specifically, they leave the fiber MII's PDOWN flag -set, which means that the CPU port doesn't connect. - -This patch checks whether this flag has been clear prior -by something else, and if not make us clear it. - -Reviewed-by: Andrew Lunn <andrew@lunn.ch> -Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org> ---- - drivers/net/dsa/mv88e6xxx.c | 36 ++++++++++++++++++++++++++++++++++++ - drivers/net/dsa/mv88e6xxx.h | 8 ++++++++ - 2 files changed, 44 insertions(+) - -diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c -index 3dcfe13..a4e3750 100644 ---- a/drivers/net/dsa/mv88e6xxx.c -+++ b/drivers/net/dsa/mv88e6xxx.c -@@ -1961,6 +1961,25 @@ restore_page_0: - return ret; - } - -+static int mv88e6xxx_power_on_serdes(struct dsa_switch *ds) -+{ -+ int ret; -+ -+ ret = _mv88e6xxx_phy_page_read(ds, REG_FIBER_SERDES, PAGE_FIBER_SERDES, -+ MII_BMCR); -+ if (ret < 0) -+ return ret; -+ -+ if (ret & BMCR_PDOWN) { -+ ret &= ~BMCR_PDOWN; -+ ret = _mv88e6xxx_phy_page_write(ds, REG_FIBER_SERDES, -+ PAGE_FIBER_SERDES, MII_BMCR, -+ ret); -+ } -+ -+ return ret; -+} -+ - static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) - { - struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); -@@ -2064,6 +2083,23 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) - goto abort; - } - -+ /* If this port is connected to a SerDes, make sure the SerDes is not -+ * powered down. -+ */ -+ if (mv88e6xxx_6352_family(ds)) { -+ ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS); -+ if (ret < 0) -+ goto abort; -+ ret &= PORT_STATUS_CMODE_MASK; -+ if ((ret == PORT_STATUS_CMODE_100BASE_X) || -+ (ret == PORT_STATUS_CMODE_1000BASE_X) || -+ (ret == PORT_STATUS_CMODE_SGMII)) { -+ ret = mv88e6xxx_power_on_serdes(ds); -+ if (ret < 0) -+ goto abort; -+ } -+ } -+ - /* Port Control 2: don't force a good FCS, set the maximum frame size to - * 10240 bytes, enable secure 802.1q tags, don't discard tagged or - * untagged frames on this port, do a destination address lookup on all -diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h -index ca08f91..adc7f0d 100644 ---- a/drivers/net/dsa/mv88e6xxx.h -+++ b/drivers/net/dsa/mv88e6xxx.h -@@ -28,6 +28,10 @@ - #define SMI_CMD_OP_45_READ_DATA_INC ((3 << 10) | SMI_CMD_BUSY) - #define SMI_DATA 0x01 - -+/* Fiber/SERDES Registers are located at SMI address F, page 1 */ -+#define REG_FIBER_SERDES 0x0f -+#define PAGE_FIBER_SERDES 0x01 -+ - #define REG_PORT(p) (0x10 + (p)) - #define PORT_STATUS 0x00 - #define PORT_STATUS_PAUSE_EN BIT(15) -@@ -45,6 +49,10 @@ - #define PORT_STATUS_MGMII BIT(6) /* 6185 */ - #define PORT_STATUS_TX_PAUSED BIT(5) - #define PORT_STATUS_FLOW_CTRL BIT(4) -+#define PORT_STATUS_CMODE_MASK 0x0f -+#define PORT_STATUS_CMODE_100BASE_X 0x8 -+#define PORT_STATUS_CMODE_1000BASE_X 0x9 -+#define PORT_STATUS_CMODE_SGMII 0xa - #define PORT_PCS_CTRL 0x01 - #define PORT_PCS_CTRL_RGMII_DELAY_RXCLK BIT(15) - #define PORT_PCS_CTRL_RGMII_DELAY_TXCLK BIT(14) --- -2.7.3 - diff --git a/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch b/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch new file mode 100644 index 000000000..9a9366c1c --- /dev/null +++ b/0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch @@ -0,0 +1,214 @@ +From 0206aec944641c69815562407b73b6f9df22f041 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 11:13:09 +0200 +Subject: [PATCH 03/17] drm/i915/gen9: Cache plane data rates in CRTC state + +Upstream: since drm-intel-next-2016-05-22 +commit a1de91e5f3039dfc32ac2b77ffb280a68646cbc7 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:05:57 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:32:35 2016 -0700 + + drm/i915/gen9: Cache plane data rates in CRTC state + + This will be important when we start calculating CRTC data rates for + in-flight CRTC states since it will allow us to calculate the total data + rate without needing to grab the plane state for any planes that aren't + updated by the transaction. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-4-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_drv.h | 4 ++ + drivers/gpu/drm/i915/intel_pm.c | 92 ++++++++++++++++++++++++++-------------- + 2 files changed, 63 insertions(+), 33 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index 7d19baf..7c00ab6 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -385,6 +385,10 @@ struct intel_crtc_wm_state { + struct { + /* gen9+ only needs 1-step wm programming */ + struct skl_pipe_wm optimal; ++ ++ /* cached plane data rate */ ++ unsigned plane_data_rate[I915_MAX_PLANES]; ++ unsigned plane_y_data_rate[I915_MAX_PLANES]; + } skl; + }; + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 8f081b2..854f0a4 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2879,6 +2879,14 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, + struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate); + struct drm_framebuffer *fb = pstate->fb; + uint32_t width = 0, height = 0; ++ unsigned format = fb ? fb->pixel_format : DRM_FORMAT_XRGB8888; ++ ++ if (!intel_pstate->visible) ++ return 0; ++ if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR) ++ return 0; ++ if (y && format != DRM_FORMAT_NV12) ++ return 0; + + width = drm_rect_width(&intel_pstate->src) >> 16; + height = drm_rect_height(&intel_pstate->src) >> 16; +@@ -2887,17 +2895,17 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, + swap(width, height); + + /* for planar format */ +- if (fb->pixel_format == DRM_FORMAT_NV12) { ++ if (format == DRM_FORMAT_NV12) { + if (y) /* y-plane data rate */ + return width * height * +- drm_format_plane_cpp(fb->pixel_format, 0); ++ drm_format_plane_cpp(format, 0); + else /* uv-plane data rate */ + return (width / 2) * (height / 2) * +- drm_format_plane_cpp(fb->pixel_format, 1); ++ drm_format_plane_cpp(format, 1); + } + + /* for packed formats */ +- return width * height * drm_format_plane_cpp(fb->pixel_format, 0); ++ return width * height * drm_format_plane_cpp(format, 0); + } + + /* +@@ -2906,32 +2914,34 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, + * 3 * 4096 * 8192 * 4 < 2^32 + */ + static unsigned int +-skl_get_total_relative_data_rate(const struct intel_crtc_state *cstate) ++skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) + { + struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); + struct drm_device *dev = intel_crtc->base.dev; + const struct intel_plane *intel_plane; +- unsigned int total_data_rate = 0; ++ unsigned int rate, total_data_rate = 0; + ++ /* Calculate and cache data rate for each plane */ + for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { + const struct drm_plane_state *pstate = intel_plane->base.state; ++ int id = skl_wm_plane_id(intel_plane); + +- if (pstate->fb == NULL) +- continue; ++ /* packed/uv */ ++ rate = skl_plane_relative_data_rate(cstate, pstate, 0); ++ cstate->wm.skl.plane_data_rate[id] = rate; + +- if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR) +- continue; ++ /* y-plane */ ++ rate = skl_plane_relative_data_rate(cstate, pstate, 1); ++ cstate->wm.skl.plane_y_data_rate[id] = rate; ++ } + +- /* packed/uv */ +- total_data_rate += skl_plane_relative_data_rate(cstate, +- pstate, +- 0); ++ /* Calculate CRTC's total data rate from cached values */ ++ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { ++ int id = skl_wm_plane_id(intel_plane); + +- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) +- /* y-plane */ +- total_data_rate += skl_plane_relative_data_rate(cstate, +- pstate, +- 1); ++ /* packed/uv */ ++ total_data_rate += cstate->wm.skl.plane_data_rate[id]; ++ total_data_rate += cstate->wm.skl.plane_y_data_rate[id]; + } + + return total_data_rate; +@@ -2995,6 +3005,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + * FIXME: we may not allocate every single block here. + */ + total_data_rate = skl_get_total_relative_data_rate(cstate); ++ if (total_data_rate == 0) ++ return; + + start = alloc->start; + for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +@@ -3009,7 +3021,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + if (plane->type == DRM_PLANE_TYPE_CURSOR) + continue; + +- data_rate = skl_plane_relative_data_rate(cstate, pstate, 0); ++ data_rate = cstate->wm.skl.plane_data_rate[id]; + + /* + * allocation for (packed formats) or (uv-plane part of planar format): +@@ -3028,20 +3040,16 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + /* + * allocation for y_plane part of planar format: + */ +- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) { +- y_data_rate = skl_plane_relative_data_rate(cstate, +- pstate, +- 1); +- y_plane_blocks = y_minimum[id]; +- y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, +- total_data_rate); +- +- ddb->y_plane[pipe][id].start = start; +- ddb->y_plane[pipe][id].end = start + y_plane_blocks; +- +- start += y_plane_blocks; +- } ++ y_data_rate = cstate->wm.skl.plane_y_data_rate[id]; ++ ++ y_plane_blocks = y_minimum[id]; ++ y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, ++ total_data_rate); + ++ ddb->y_plane[pipe][id].start = start; ++ ddb->y_plane[pipe][id].end = start + y_plane_blocks; ++ ++ start += y_plane_blocks; + } + + } +@@ -3820,10 +3828,28 @@ void skl_wm_get_hw_state(struct drm_device *dev) + struct drm_i915_private *dev_priv = dev->dev_private; + struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb; + struct drm_crtc *crtc; ++ struct intel_crtc *intel_crtc; + + skl_ddb_get_hw_state(dev_priv, ddb); + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) + skl_pipe_wm_get_hw_state(crtc); ++ ++ /* Calculate plane data rates */ ++ for_each_intel_crtc(dev, intel_crtc) { ++ struct intel_crtc_state *cstate = intel_crtc->config; ++ struct intel_plane *intel_plane; ++ ++ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { ++ const struct drm_plane_state *pstate = ++ intel_plane->base.state; ++ int id = skl_wm_plane_id(intel_plane); ++ ++ cstate->wm.skl.plane_data_rate[id] = ++ skl_plane_relative_data_rate(cstate, pstate, 0); ++ cstate->wm.skl.plane_y_data_rate[id] = ++ skl_plane_relative_data_rate(cstate, pstate, 1); ++ } ++ } + } + + static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc) +-- +2.7.4 + diff --git a/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch b/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch new file mode 100644 index 000000000..b93bdff17 --- /dev/null +++ b/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch @@ -0,0 +1,46 @@ +From de35f524e89daf8862d49724b9045f9254bfdfea Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 14:52:01 +0200 +Subject: [PATCH 3/6] drm/nouveau/disp/sor/gf119: both links use the same + training register + +Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) +commit a8953c52b95167b5d21a66f0859751570271d834 + +Author: Ben Skeggs <bskeggs@redhat.com> +AuthorDate: Fri Jun 3 14:37:40 2016 +1000 +Commit: Ben Skeggs <bskeggs@redhat.com> +CommitDate: Tue Jun 7 08:11:14 2016 +1000 + + drm/nouveau/disp/sor/gf119: both links use the same training register + + It appears that, for whatever reason, both link A and B use the same + register to control the training pattern. It's a little odd, as the + GPUs before this (Tesla/Fermi1) have per-link registers, as do newer + GPUs (Maxwell). + + Fixes the third DP output on NVS 510 (GK107). + + Signed-off-by: Ben Skeggs <bskeggs@redhat.com> + Cc: stable@vger.kernel.org +--- + drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c +index b4b41b1..5111560 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c +@@ -40,8 +40,7 @@ static int + gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) + { + struct nvkm_device *device = outp->base.disp->engine.subdev.device; +- const u32 loff = gf119_sor_loff(outp); +- nvkm_mask(device, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern); ++ nvkm_mask(device, 0x61c110, 0x0f0f0f0f, 0x01010101 * pattern); + return 0; + } + +-- +2.7.4 + diff --git a/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch b/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch new file mode 100644 index 000000000..3a2b0aa1c --- /dev/null +++ b/0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch @@ -0,0 +1,141 @@ +From a75a3c793e2cd3e7648597f2c77d87453f520f31 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 11:13:23 +0200 +Subject: [PATCH 04/17] drm/i915/gen9: Allow calculation of data rate for + in-flight state (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit 9c74d82621c553f0da1f41bd5d90f5eab5659fdb + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:05:58 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:32:49 2016 -0700 + + drm/i915/gen9: Allow calculation of data rate for in-flight state (v2) + + Our skl_get_total_relative_data_rate() function gets passed a crtc state + object to calculate the data rate for, but it currently always looks + up the committed plane states that correspond to that CRTC. Let's + check whether the CRTC state is an in-flight state (meaning + cstate->state is non-NULL) and if so, use the corresponding in-flight + plane states. + + We'll soon be using this function exclusively for in-flight states; at + that time we'll be able to simplify the function a bit, but for now we + allow it to be used in either mode. + + v2: + - Rebase on top of changes to cache plane data rates. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-5-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_pm.c | 74 +++++++++++++++++++++++++++++++++-------- + 1 file changed, 60 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 854f0a4..b863bfc 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2914,25 +2914,69 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, + * 3 * 4096 * 8192 * 4 < 2^32 + */ + static unsigned int +-skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) ++skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) + { +- struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); +- struct drm_device *dev = intel_crtc->base.dev; ++ struct drm_crtc_state *cstate = &intel_cstate->base; ++ struct drm_atomic_state *state = cstate->state; ++ struct drm_crtc *crtc = cstate->crtc; ++ struct drm_device *dev = crtc->dev; ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + const struct intel_plane *intel_plane; + unsigned int rate, total_data_rate = 0; ++ int id; + + /* Calculate and cache data rate for each plane */ +- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +- const struct drm_plane_state *pstate = intel_plane->base.state; +- int id = skl_wm_plane_id(intel_plane); ++ /* ++ * FIXME: At the moment this function can be called on either an ++ * in-flight or a committed state object. If it's in-flight then we ++ * only want to re-calculate the plane data rate for planes that are ++ * part of the transaction (i.e., we don't want to grab any additional ++ * plane states if we don't have to). If we're operating on committed ++ * state, we'll just go ahead and recalculate the plane data rate for ++ * all planes. ++ * ++ * Once we finish moving our DDB allocation to the atomic check phase, ++ * we'll only be calling this function on in-flight state objects, so ++ * the 'else' branch here will go away. ++ */ ++ if (state) { ++ struct drm_plane *plane; ++ struct drm_plane_state *pstate; ++ int i; ++ ++ for_each_plane_in_state(state, plane, pstate, i) { ++ intel_plane = to_intel_plane(plane); ++ id = skl_wm_plane_id(intel_plane); ++ ++ if (intel_plane->pipe != intel_crtc->pipe) ++ continue; ++ ++ /* packed/uv */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 0); ++ intel_cstate->wm.skl.plane_data_rate[id] = rate; ++ ++ /* y-plane */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 1); ++ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; ++ } ++ } else { ++ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { ++ const struct drm_plane_state *pstate = ++ intel_plane->base.state; ++ int id = skl_wm_plane_id(intel_plane); + +- /* packed/uv */ +- rate = skl_plane_relative_data_rate(cstate, pstate, 0); +- cstate->wm.skl.plane_data_rate[id] = rate; ++ /* packed/uv */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 0); ++ intel_cstate->wm.skl.plane_data_rate[id] = rate; + +- /* y-plane */ +- rate = skl_plane_relative_data_rate(cstate, pstate, 1); +- cstate->wm.skl.plane_y_data_rate[id] = rate; ++ /* y-plane */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 1); ++ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; ++ } + } + + /* Calculate CRTC's total data rate from cached values */ +@@ -2940,10 +2984,12 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *cstate) + int id = skl_wm_plane_id(intel_plane); + + /* packed/uv */ +- total_data_rate += cstate->wm.skl.plane_data_rate[id]; +- total_data_rate += cstate->wm.skl.plane_y_data_rate[id]; ++ total_data_rate += intel_cstate->wm.skl.plane_data_rate[id]; ++ total_data_rate += intel_cstate->wm.skl.plane_y_data_rate[id]; + } + ++ WARN_ON(cstate->plane_mask && total_data_rate == 0); ++ + return total_data_rate; + } + +-- +2.7.4 + diff --git a/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch b/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch new file mode 100644 index 000000000..a0b6171d8 --- /dev/null +++ b/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch @@ -0,0 +1,195 @@ +From eb4668302adce316f53896b0fd8144ffe380a3ad Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 14:52:06 +0200 +Subject: [PATCH 4/6] drm/nouveau/disp/sor/gm107: training pattern registers + are like gm200 + +Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) +commit 4691409b3e2250ed66aa8dcefa23fe765daf7add + +Author: Ben Skeggs <bskeggs@redhat.com> +AuthorDate: Fri Jun 3 15:05:52 2016 +1000 +Commit: Ben Skeggs <bskeggs@redhat.com> +CommitDate: Tue Jun 7 08:11:25 2016 +1000 + + drm/nouveau/disp/sor/gm107: training pattern registers are like gm200 + + Signed-off-by: Ben Skeggs <bskeggs@redhat.com> + Cc: stable@vger.kernel.org +--- + drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 1 + + drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c | 2 +- + drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h | 9 +++- + .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 2 +- + .../nvkm/engine/disp/{gm107.c => sorgm107.c} | 50 +++++++++++----------- + .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 15 +------ + 6 files changed, 36 insertions(+), 43 deletions(-) + copy drivers/gpu/drm/nouveau/nvkm/engine/disp/{gm107.c => sorgm107.c} (55%) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +index a74c5dd..e2a64ed 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/disp/piornv50.o + nvkm-y += nvkm/engine/disp/sornv50.o + nvkm-y += nvkm/engine/disp/sorg94.o + nvkm-y += nvkm/engine/disp/sorgf119.o ++nvkm-y += nvkm/engine/disp/sorgm107.o + nvkm-y += nvkm/engine/disp/sorgm200.o + nvkm-y += nvkm/engine/disp/dport.o + +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c +index b694414..f4b9cf8 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c +@@ -36,7 +36,7 @@ gm107_disp = { + .outp.internal.crt = nv50_dac_output_new, + .outp.internal.tmds = nv50_sor_output_new, + .outp.internal.lvds = nv50_sor_output_new, +- .outp.internal.dp = gf119_sor_dp_new, ++ .outp.internal.dp = gm107_sor_dp_new, + .dac.nr = 3, + .dac.power = nv50_dac_power, + .dac.sense = nv50_dac_sense, +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h +index e9067ba..4e983f6 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h +@@ -62,7 +62,12 @@ int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int); + int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, + struct nvkm_output **); + int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool); ++int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int); + +-int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, +- struct nvkm_output **); ++int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, ++ struct nvkm_output **); ++int gm107_sor_dp_pattern(struct nvkm_output_dp *, int); ++ ++int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, ++ struct nvkm_output **); + #endif +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c +index 5111560..22706c0 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c +@@ -63,7 +63,7 @@ gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef) + return 0; + } + +-static int ++int + gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp, + int ln, int vs, int pe, int pc) + { +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c +similarity index 55% +copy from drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c +copy to drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c +index b694414..37790b2 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c +@@ -1,5 +1,5 @@ + /* +- * Copyright 2012 Red Hat Inc. ++ * Copyright 2016 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), +@@ -19,35 +19,35 @@ + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * +- * Authors: Ben Skeggs ++ * Authors: Ben Skeggs <bskeggs@redhat.com> + */ + #include "nv50.h" +-#include "rootnv50.h" ++#include "outpdp.h" + +-static const struct nv50_disp_func +-gm107_disp = { +- .intr = gf119_disp_intr, +- .uevent = &gf119_disp_chan_uevent, +- .super = gf119_disp_intr_supervisor, +- .root = &gm107_disp_root_oclass, +- .head.vblank_init = gf119_disp_vblank_init, +- .head.vblank_fini = gf119_disp_vblank_fini, +- .head.scanoutpos = gf119_disp_root_scanoutpos, +- .outp.internal.crt = nv50_dac_output_new, +- .outp.internal.tmds = nv50_sor_output_new, +- .outp.internal.lvds = nv50_sor_output_new, +- .outp.internal.dp = gf119_sor_dp_new, +- .dac.nr = 3, +- .dac.power = nv50_dac_power, +- .dac.sense = nv50_dac_sense, +- .sor.nr = 4, +- .sor.power = nv50_sor_power, +- .sor.hda_eld = gf119_hda_eld, +- .sor.hdmi = gk104_hdmi_ctrl, ++int ++gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) ++{ ++ struct nvkm_device *device = outp->base.disp->engine.subdev.device; ++ const u32 soff = outp->base.or * 0x800; ++ const u32 data = 0x01010101 * pattern; ++ if (outp->base.info.sorconf.link & 1) ++ nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); ++ else ++ nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); ++ return 0; ++} ++ ++static const struct nvkm_output_dp_func ++gm107_sor_dp_func = { ++ .pattern = gm107_sor_dp_pattern, ++ .lnk_pwr = g94_sor_dp_lnk_pwr, ++ .lnk_ctl = gf119_sor_dp_lnk_ctl, ++ .drv_ctl = gf119_sor_dp_drv_ctl, + }; + + int +-gm107_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp) ++gm107_sor_dp_new(struct nvkm_disp *disp, int index, ++ struct dcb_output *dcbE, struct nvkm_output **poutp) + { +- return gf119_disp_new_(&gm107_disp, device, index, pdisp); ++ return nvkm_output_dp_new_(&gm107_sor_dp_func, disp, index, dcbE, poutp); + } +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c +index 2cfbef9..c44fa7e 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c +@@ -57,19 +57,6 @@ gm200_sor_dp_lane_map(struct nvkm_device *device, u8 lane) + } + + static int +-gm200_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) +-{ +- struct nvkm_device *device = outp->base.disp->engine.subdev.device; +- const u32 soff = gm200_sor_soff(outp); +- const u32 data = 0x01010101 * pattern; +- if (outp->base.info.sorconf.link & 1) +- nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); +- else +- nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); +- return 0; +-} +- +-static int + gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) + { + struct nvkm_device *device = outp->base.disp->engine.subdev.device; +@@ -129,7 +116,7 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp, + + static const struct nvkm_output_dp_func + gm200_sor_dp_func = { +- .pattern = gm200_sor_dp_pattern, ++ .pattern = gm107_sor_dp_pattern, + .lnk_pwr = gm200_sor_dp_lnk_pwr, + .lnk_ctl = gf119_sor_dp_lnk_ctl, + .drv_ctl = gm200_sor_dp_drv_ctl, +-- +2.7.4 + diff --git a/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch new file mode 100644 index 000000000..7b1fcb144 --- /dev/null +++ b/0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch @@ -0,0 +1,67 @@ +From cd21ce996b94fd149b3487398e5250e9f0cc8811 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:39:24 +0200 +Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm + state (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit 86a2100a8b96594902bb59b90614377df4f64ce0 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:05:59 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:32:56 2016 -0700 + + drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2) + + This will eventually allow us to re-use old values without + re-calculating them for unchanged planes (which also helps us avoid + re-grabbing extra plane states). + + v2: + - Drop unnecessary memset's; they were meant for a later patch (which + got reworked anyway to not need them, but were mis-rebased into this + one. (Maarten) + + Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_drv.h | 4 ++++ + drivers/gpu/drm/i915/intel_pm.c | 4 ++-- + 2 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index 7c00ab6..d246308 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -389,6 +389,10 @@ struct intel_crtc_wm_state { + /* cached plane data rate */ + unsigned plane_data_rate[I915_MAX_PLANES]; + unsigned plane_y_data_rate[I915_MAX_PLANES]; ++ ++ /* minimum block allocation */ ++ uint16_t minimum_blocks[I915_MAX_PLANES]; ++ uint16_t minimum_y_blocks[I915_MAX_PLANES]; + } skl; + }; + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index b863bfc..00db6e9 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3006,8 +3006,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + enum pipe pipe = intel_crtc->pipe; + struct skl_ddb_entry *alloc = &ddb->pipe[pipe]; + uint16_t alloc_size, start, cursor_blocks; +- uint16_t minimum[I915_MAX_PLANES]; +- uint16_t y_minimum[I915_MAX_PLANES]; ++ uint16_t *minimum = cstate->wm.skl.minimum_blocks; ++ uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks; + unsigned int total_data_rate; + + skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc); +-- +2.7.4 + diff --git a/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch b/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch new file mode 100644 index 000000000..d95f2f4d0 --- /dev/null +++ b/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch @@ -0,0 +1,55 @@ +From 28d0147bded959b2c4d3eb1aa957452d5dbb0cc9 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 14:52:10 +0200 +Subject: [PATCH 5/6] i915/fbc: Disable on HSW by default for now + +Upstream: posted on dri-devel (and r-b'd) + +Author: cpaul@redhat.com <cpaul@redhat.com> +AuthorDate: Thu Jun 9 11:58:15 2016 -0400 +Commit: Rob Clark <rclark@redhat.com> +CommitDate: Thu Jun 9 15:43:07 2016 -0400 + + i915/fbc: Disable on HSW by default for now + + >From https://bugs.freedesktop.org/show_bug.cgi?id=96461 : + + This was kind of a difficult bug to track down. If you're using a + Haswell system running GNOME and you have fbc completely enabled and + working, playing videos can result in video artifacts. Steps to + reproduce: + + - Run GNOME + - Ensure FBC is enabled and active + - Download a movie, I used the ogg version of Big Buck Bunny for this + - Run `gst-launch-1.0 filesrc location='some_movie.ogg' ! decodebin ! + glimagesink` in a terminal + - Watch for about over a minute, you'll see small horizontal lines go + down the screen. + + For the time being, disable FBC for Haswell by default. + + Signed-off-by: Lyude <cpaul@redhat.com> + Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> + Cc: stable@vger.kernel.org +--- + drivers/gpu/drm/i915/intel_fbc.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c +index 0f0492f..28f4407 100644 +--- a/drivers/gpu/drm/i915/intel_fbc.c ++++ b/drivers/gpu/drm/i915/intel_fbc.c +@@ -823,8 +823,7 @@ static bool intel_fbc_can_choose(struct intel_crtc *crtc) + { + struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; + struct intel_fbc *fbc = &dev_priv->fbc; +- bool enable_by_default = IS_HASWELL(dev_priv) || +- IS_BROADWELL(dev_priv); ++ bool enable_by_default = IS_BROADWELL(dev_priv); + + if (intel_vgpu_active(dev_priv->dev)) { + fbc->no_fbc_reason = "VGPU is active"; +-- +2.7.4 + diff --git a/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch b/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch new file mode 100644 index 000000000..7320abf6d --- /dev/null +++ b/0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch @@ -0,0 +1,68 @@ +From 00edb23bcefa3ad6931f2a2855fe0801a55523f7 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:39:40 +0200 +Subject: [PATCH 06/17] drm/i915: Track whether an atomic transaction changes + the active CRTC's + +Upstream: since drm-intel-next-2016-05-22 +commit 8b4a7d0597cd9910d7127ffae6ae91d21853a8a2 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:00 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:33:10 2016 -0700 + + drm/i915: Track whether an atomic transaction changes the active CRTC's + + For the purposes of DDB re-allocation we need to know whether a + transaction changes the list of CRTC's that are active. While + state->modeset could be used for this purpose, that would be slightly + too aggressive since it would lead us to re-allocate the DDB when a + CRTC's mode changes, but not its final active state. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-7-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_display.c | 3 +++ + drivers/gpu/drm/i915/intel_drv.h | 10 ++++++++++ + 2 files changed, 13 insertions(+) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 7d855ba..f53df81 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13183,6 +13183,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state) + intel_state->active_crtcs |= 1 << i; + else + intel_state->active_crtcs &= ~(1 << i); ++ ++ if (crtc_state->active != crtc->state->active) ++ intel_state->active_pipe_changes |= drm_crtc_mask(crtc); + } + + /* +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index d246308..672ca56 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -256,6 +256,16 @@ struct intel_atomic_state { + + bool dpll_set, modeset; + ++ /* ++ * Does this transaction change the pipes that are active? This mask ++ * tracks which CRTC's have changed their active state at the end of ++ * the transaction (not counting the temporary disable during modesets). ++ * This mask should only be non-zero when intel_state->modeset is true, ++ * but the converse is not necessarily true; simply changing a mode may ++ * not flip the final active status of any CRTC's ++ */ ++ unsigned int active_pipe_changes; ++ + unsigned int active_crtcs; + unsigned int min_pixclk[I915_MAX_PIPES]; + +-- +2.7.4 + diff --git a/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch b/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch new file mode 100644 index 000000000..deb90fb01 --- /dev/null +++ b/0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch @@ -0,0 +1,352 @@ +From 99dd9c3733696d4a2536b21988c9b1b8f5195c5b Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:40:00 +0200 +Subject: [PATCH 07/17] drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate + on in-flight state (v3) + +Upstream: since drm-intel-next-2016-05-22 +commit c107acfeb03187873657ccc8af4fc5c704b3626b + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:01 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:33:16 2016 -0700 + + drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate on in-flight state (v3) + + We eventually want to calculate watermark values at atomic 'check' time + instead of atomic 'commit' time so that any requested configurations + that result in impossible watermark requirements are properly rejected. + The first step along this path is to allocate the DDB at atomic 'check' + time. As we perform this transition, allow the main allocation function + to operate successfully on either an in-flight state or an + already-commited state. Once we complete the transition in a future + patch, we'll come back and remove the unnecessary logic for the + already-committed case. + + v2: Rebase/refactor; we should no longer need to grab extra plane states + while allocating the DDB since we can pull cached data rates and + minimum block counts from the CRTC state for any planes that aren't + being modified by this transaction. + + v3: + - Simplify memsets to clear DDB plane entries. (Maarten) + - Drop a redundant memset of plane[pipe][PLANE_CURSOR] that was added + by an earlier Coccinelle patch. (Maarten) + - Assign *num_active at the top of skl_ddb_get_pipe_allocation_limits() + so that no code paths return without setting it. (kbuild robot) + + Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-8-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 6 ++ + drivers/gpu/drm/i915/intel_pm.c | 179 +++++++++++++++++++++++++++++----------- + 2 files changed, 139 insertions(+), 46 deletions(-) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index daba7eb..804af6f 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -281,6 +281,12 @@ struct i915_hotplug { + &dev->mode_config.plane_list, \ + base.head) + ++#define for_each_intel_plane_mask(dev, intel_plane, plane_mask) \ ++ list_for_each_entry(intel_plane, &dev->mode_config.plane_list, \ ++ base.head) \ ++ for_each_if ((plane_mask) & \ ++ (1 << drm_plane_index(&intel_plane->base))) ++ + #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ + list_for_each_entry(intel_plane, \ + &(dev)->mode_config.plane_list, \ +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 00db6e9..ee82b1f 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2788,13 +2788,25 @@ skl_wm_plane_id(const struct intel_plane *plane) + static void + skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + const struct intel_crtc_state *cstate, +- const struct intel_wm_config *config, +- struct skl_ddb_entry *alloc /* out */) ++ struct intel_wm_config *config, ++ struct skl_ddb_entry *alloc, /* out */ ++ int *num_active /* out */) + { ++ struct drm_atomic_state *state = cstate->base.state; ++ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); ++ struct drm_i915_private *dev_priv = to_i915(dev); + struct drm_crtc *for_crtc = cstate->base.crtc; + struct drm_crtc *crtc; + unsigned int pipe_size, ddb_size; + int nth_active_pipe; ++ int pipe = to_intel_crtc(for_crtc)->pipe; ++ ++ if (intel_state && intel_state->active_pipe_changes) ++ *num_active = hweight32(intel_state->active_crtcs); ++ else if (intel_state) ++ *num_active = hweight32(dev_priv->active_crtcs); ++ else ++ *num_active = config->num_pipes_active; + + if (!cstate->base.active) { + alloc->start = 0; +@@ -2809,25 +2821,56 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + + ddb_size -= 4; /* 4 blocks for bypass path allocation */ + +- nth_active_pipe = 0; +- for_each_crtc(dev, crtc) { +- if (!to_intel_crtc(crtc)->active) +- continue; ++ /* ++ * FIXME: At the moment we may be called on either in-flight or fully ++ * committed cstate's. Once we fully move DDB allocation in the check ++ * phase, we'll only be called on in-flight states and the 'else' ++ * branch here will go away. ++ * ++ * The 'else' branch is slightly racy here, but it was racy to begin ++ * with; since it's going away soon, no effort is made to address that. ++ */ ++ if (state) { ++ /* ++ * If the state doesn't change the active CRTC's, then there's ++ * no need to recalculate; the existing pipe allocation limits ++ * should remain unchanged. Note that we're safe from racing ++ * commits since any racing commit that changes the active CRTC ++ * list would need to grab _all_ crtc locks, including the one ++ * we currently hold. ++ */ ++ if (!intel_state->active_pipe_changes) { ++ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; ++ return; ++ } + +- if (crtc == for_crtc) +- break; ++ nth_active_pipe = hweight32(intel_state->active_crtcs & ++ (drm_crtc_mask(for_crtc) - 1)); ++ pipe_size = ddb_size / hweight32(intel_state->active_crtcs); ++ alloc->start = nth_active_pipe * ddb_size / *num_active; ++ alloc->end = alloc->start + pipe_size; ++ } else { ++ nth_active_pipe = 0; ++ for_each_crtc(dev, crtc) { ++ if (!to_intel_crtc(crtc)->active) ++ continue; + +- nth_active_pipe++; +- } ++ if (crtc == for_crtc) ++ break; ++ ++ nth_active_pipe++; ++ } + +- pipe_size = ddb_size / config->num_pipes_active; +- alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active; +- alloc->end = alloc->start + pipe_size; ++ pipe_size = ddb_size / config->num_pipes_active; ++ alloc->start = nth_active_pipe * ddb_size / ++ config->num_pipes_active; ++ alloc->end = alloc->start + pipe_size; ++ } + } + +-static unsigned int skl_cursor_allocation(const struct intel_wm_config *config) ++static unsigned int skl_cursor_allocation(int num_active) + { +- if (config->num_pipes_active == 1) ++ if (num_active == 1) + return 32; + + return 8; +@@ -2993,33 +3036,44 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) + return total_data_rate; + } + +-static void ++static int + skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + struct skl_ddb_allocation *ddb /* out */) + { ++ struct drm_atomic_state *state = cstate->base.state; + struct drm_crtc *crtc = cstate->base.crtc; + struct drm_device *dev = crtc->dev; + struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_wm_config *config = &dev_priv->wm.config; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_plane *intel_plane; ++ struct drm_plane *plane; ++ struct drm_plane_state *pstate; + enum pipe pipe = intel_crtc->pipe; + struct skl_ddb_entry *alloc = &ddb->pipe[pipe]; + uint16_t alloc_size, start, cursor_blocks; + uint16_t *minimum = cstate->wm.skl.minimum_blocks; + uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks; + unsigned int total_data_rate; ++ int num_active; ++ int id, i; ++ ++ if (!cstate->base.active) { ++ ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0; ++ memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); ++ memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe])); ++ return 0; ++ } + +- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc); ++ skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc, ++ &num_active); + alloc_size = skl_ddb_entry_size(alloc); + if (alloc_size == 0) { + memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); +- memset(&ddb->plane[pipe][PLANE_CURSOR], 0, +- sizeof(ddb->plane[pipe][PLANE_CURSOR])); +- return; ++ return 0; + } + +- cursor_blocks = skl_cursor_allocation(config); ++ cursor_blocks = skl_cursor_allocation(num_active); + ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks; + ddb->plane[pipe][PLANE_CURSOR].end = alloc->end; + +@@ -3027,21 +3081,55 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + alloc->end -= cursor_blocks; + + /* 1. Allocate the mininum required blocks for each active plane */ +- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +- struct drm_plane *plane = &intel_plane->base; +- struct drm_framebuffer *fb = plane->state->fb; +- int id = skl_wm_plane_id(intel_plane); ++ /* ++ * TODO: Remove support for already-committed state once we ++ * only allocate DDB on in-flight states. ++ */ ++ if (state) { ++ for_each_plane_in_state(state, plane, pstate, i) { ++ intel_plane = to_intel_plane(plane); ++ id = skl_wm_plane_id(intel_plane); + +- if (!to_intel_plane_state(plane->state)->visible) +- continue; ++ if (intel_plane->pipe != pipe) ++ continue; + +- if (plane->type == DRM_PLANE_TYPE_CURSOR) +- continue; ++ if (!to_intel_plane_state(pstate)->visible) { ++ minimum[id] = 0; ++ y_minimum[id] = 0; ++ continue; ++ } ++ if (plane->type == DRM_PLANE_TYPE_CURSOR) { ++ minimum[id] = 0; ++ y_minimum[id] = 0; ++ continue; ++ } + +- minimum[id] = 8; +- alloc_size -= minimum[id]; +- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; +- alloc_size -= y_minimum[id]; ++ minimum[id] = 8; ++ if (pstate->fb->pixel_format == DRM_FORMAT_NV12) ++ y_minimum[id] = 8; ++ else ++ y_minimum[id] = 0; ++ } ++ } else { ++ for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { ++ struct drm_plane *plane = &intel_plane->base; ++ struct drm_framebuffer *fb = plane->state->fb; ++ int id = skl_wm_plane_id(intel_plane); ++ ++ if (!to_intel_plane_state(plane->state)->visible) ++ continue; ++ ++ if (plane->type == DRM_PLANE_TYPE_CURSOR) ++ continue; ++ ++ minimum[id] = 8; ++ y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; ++ } ++ } ++ ++ for (i = 0; i < PLANE_CURSOR; i++) { ++ alloc_size -= minimum[i]; ++ alloc_size -= y_minimum[i]; + } + + /* +@@ -3052,21 +3140,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + */ + total_data_rate = skl_get_total_relative_data_rate(cstate); + if (total_data_rate == 0) +- return; ++ return 0; + + start = alloc->start; + for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +- struct drm_plane *plane = &intel_plane->base; +- struct drm_plane_state *pstate = intel_plane->base.state; + unsigned int data_rate, y_data_rate; + uint16_t plane_blocks, y_plane_blocks = 0; + int id = skl_wm_plane_id(intel_plane); + +- if (!to_intel_plane_state(pstate)->visible) +- continue; +- if (plane->type == DRM_PLANE_TYPE_CURSOR) +- continue; +- + data_rate = cstate->wm.skl.plane_data_rate[id]; + + /* +@@ -3078,8 +3159,11 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + plane_blocks += div_u64((uint64_t)alloc_size * data_rate, + total_data_rate); + +- ddb->plane[pipe][id].start = start; +- ddb->plane[pipe][id].end = start + plane_blocks; ++ /* Leave disabled planes at (0,0) */ ++ if (data_rate) { ++ ddb->plane[pipe][id].start = start; ++ ddb->plane[pipe][id].end = start + plane_blocks; ++ } + + start += plane_blocks; + +@@ -3092,12 +3176,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate, + total_data_rate); + +- ddb->y_plane[pipe][id].start = start; +- ddb->y_plane[pipe][id].end = start + y_plane_blocks; ++ if (y_data_rate) { ++ ddb->y_plane[pipe][id].start = start; ++ ddb->y_plane[pipe][id].end = start + y_plane_blocks; ++ } + + start += y_plane_blocks; + } + ++ return 0; + } + + static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config) +@@ -3588,7 +3675,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + +- skl_allocate_pipe_ddb(cstate, ddb); ++ WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0); + skl_build_pipe_wm(cstate, ddb, pipe_wm); + + if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) +-- +2.7.4 + diff --git a/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch new file mode 100644 index 000000000..7a45a28a4 --- /dev/null +++ b/0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch @@ -0,0 +1,94 @@ +From 0126336af286ea85c1137ad13882f8c93d74c6c3 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:40:13 +0200 +Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit 279e99d76e6097ee7b531114777fa9b030496d81 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:02 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:33:54 2016 -0700 + + drm/i915: Add distrust_bios_wm flag to dev_priv (v2) + + SKL-style platforms can't fully trust the watermark/DDB settings + programmed by the BIOS and need to do extra sanitization on their first + atomic update. Add a flag to dev_priv that is set during hardware + readout and cleared at the end of the first commit. + + Note that for the somewhat common case where everything is turned off + when the driver starts up, we don't need to bother with a recompute...we + know exactly what the DDB should be (all zero's) so just setup the DDB + directly in that case. + + v2: + - Move clearing of distrust_bios_wm up below the swap_state call since + it's a more natural / self-explanatory location. (Maarten) + - Use dev_priv->active_crtcs to test whether any CRTC's are turned on + during HW WM readout rather than trying to count the active CRTC's + again ourselves. (Maarten) + + Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 7 +++++++ + drivers/gpu/drm/i915/intel_display.c | 1 + + drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ + 3 files changed, 16 insertions(+) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index 804af6f..ae7932a 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1986,6 +1986,13 @@ struct drm_i915_private { + }; + + uint8_t max_level; ++ ++ /* ++ * Set during HW readout of watermarks/DDB. Some platforms ++ * need to know when we're still using BIOS-provided values ++ * (which we don't fully trust). ++ */ ++ bool distrust_bios_wm; + } wm; + + struct i915_runtime_pm pm; +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index f53df81..786f3d9 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13516,6 +13516,7 @@ static int intel_atomic_commit(struct drm_device *dev, + + drm_atomic_helper_swap_state(dev, state); + dev_priv->wm.config = to_intel_atomic_state(state)->wm_config; ++ dev_priv->wm.distrust_bios_wm = false; + + if (intel_state->modeset) { + memcpy(dev_priv->min_pixclk, intel_state->min_pixclk, +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index ee82b1f..6a09d7a 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3967,6 +3967,14 @@ void skl_wm_get_hw_state(struct drm_device *dev) + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) + skl_pipe_wm_get_hw_state(crtc); + ++ if (dev_priv->active_crtcs) { ++ /* Fully recompute DDB on first atomic commit */ ++ dev_priv->wm.distrust_bios_wm = true; ++ } else { ++ /* Easy/common case; just sanitize DDB now if everything off */ ++ memset(ddb, 0, sizeof(*ddb)); ++ } ++ + /* Calculate plane data rates */ + for_each_intel_crtc(dev, intel_crtc) { + struct intel_crtc_state *cstate = intel_crtc->config; +-- +2.7.4 + diff --git a/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch b/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch new file mode 100644 index 000000000..53fb0cd7a --- /dev/null +++ b/0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch @@ -0,0 +1,254 @@ +From 0e9cf00438e4df1d97af44d3c52cc1cacc4dd2c9 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:40:26 +0200 +Subject: [PATCH 09/17] drm/i915/gen9: Compute DDB allocation at atomic check + time (v4) + +Upstream: since drm-intel-next-2016-05-22 +commit 98d39494d3759f84ce50e505059bc80f54c1c47b + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:03 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:00 2016 -0700 + + drm/i915/gen9: Compute DDB allocation at atomic check time (v4) + + Calculate the DDB blocks needed to satisfy the current atomic + transaction at atomic check time. This is a prerequisite to calculating + SKL watermarks during the 'check' phase and rejecting any configurations + that we can't find valid watermarks for. + + Due to the nature of DDB allocation, it's possible for the addition of a + new CRTC to make the watermark configuration already in use on another, + unchanged CRTC become invalid. A change in which CRTC's are active + triggers a recompute of the entire DDB, which unfortunately means we + need to disallow any other atomic commits from racing with such an + update. If the active CRTC's change, we need to grab the lock on all + CRTC's and run all CRTC's through their 'check' handler to recompute and + re-check their per-CRTC DDB allocations. + + Note that with this patch we only compute the DDB allocation but we + don't actually use the computed values during watermark programming yet. + For ease of review/testing/bisecting, we still recompute the DDB at + watermark programming time and just WARN() if it doesn't match the + precomputed values. A future patch will switch over to using the + precomputed values once we're sure they're being properly computed. + + Another clarifying note: DDB allocation itself shouldn't ever fail with + the algorithm we use today (i.e., we have enough DDB blocks on BXT to + support the minimum needs of the worst-case scenario of every pipe/plane + enabled at full size). However the watermarks calculations based on the + DDB may fail and we'll be moving those to the atomic check as well in + future patches. + + v2: + - Skip DDB calculations in the rare case where our transaction doesn't + actually touch any CRTC's at all. Assuming at least one CRTC state + is present in our transaction, then it means we can't race with any + transactions that would update dev_priv->active_crtcs (which requires + _all_ CRTC locks). + + v3: + - Also calculate DDB during initial hw readout, to prevent using + incorrect bios values. (Maarten) + + v4: + - Use new distrust_bios_wm flag instead of skip_initial_wm (which was + never actually set). + - Set intel_state->active_pipe_changes instead of just realloc_pipes + + Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Cc: Lyude Paul <cpaul@redhat.com> + Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 5 +++ + drivers/gpu/drm/i915/intel_display.c | 18 ++++++++ + drivers/gpu/drm/i915/intel_drv.h | 3 ++ + drivers/gpu/drm/i915/intel_pm.c | 79 ++++++++++++++++++++++++++++++++++++ + 4 files changed, 105 insertions(+) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index ae7932a..237df9f 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -296,6 +296,10 @@ struct i915_hotplug { + #define for_each_intel_crtc(dev, intel_crtc) \ + list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) + ++#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \ ++ list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) \ ++ for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base))) ++ + #define for_each_intel_encoder(dev, intel_encoder) \ + list_for_each_entry(intel_encoder, \ + &(dev)->mode_config.encoder_list, \ +@@ -638,6 +642,7 @@ struct drm_i915_display_funcs { + int (*compute_pipe_wm)(struct intel_crtc *crtc, + struct drm_atomic_state *state); + void (*program_watermarks)(struct intel_crtc_state *cstate); ++ int (*compute_global_watermarks)(struct drm_atomic_state *state); + void (*update_wm)(struct drm_crtc *crtc); + int (*modeset_calc_cdclk)(struct drm_atomic_state *state); + void (*modeset_commit_cdclk)(struct drm_atomic_state *state); +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 786f3d9..03e2635 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13225,6 +13225,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state) + static void calc_watermark_data(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_atomic_state *intel_state = to_intel_atomic_state(state); + struct drm_crtc *crtc; + struct drm_crtc_state *cstate; +@@ -13254,6 +13255,10 @@ static void calc_watermark_data(struct drm_atomic_state *state) + pstate->crtc_h != pstate->src_h >> 16) + intel_state->wm_config.sprites_scaled = true; + } ++ ++ /* Is there platform-specific watermark information to calculate? */ ++ if (dev_priv->display.compute_global_watermarks) ++ dev_priv->display.compute_global_watermarks(state); + } + + /** +@@ -13616,6 +13621,19 @@ static int intel_atomic_commit(struct drm_device *dev, + modeset_put_power_domains(dev_priv, put_domains[i]); + } + ++ /* ++ * Temporary sanity check: make sure our pre-computed DDB matches the ++ * one we actually wind up programming. ++ * ++ * Not a great place to put this, but the easiest place we have access ++ * to both the pre-computed and final DDB's; we'll be removing this ++ * check in the next patch anyway. ++ */ ++ WARN(IS_GEN9(dev) && ++ memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb, ++ sizeof(intel_state->ddb)), ++ "Pre-computed DDB does not match final DDB!\n"); ++ + if (intel_state->modeset) + intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET); + +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index 672ca56..4d6336a 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -271,6 +271,9 @@ struct intel_atomic_state { + + struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS]; + struct intel_wm_config wm_config; ++ ++ /* Gen9+ only */ ++ struct skl_ddb_allocation ddb; + }; + + struct intel_plane_state { +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 6a09d7a..f60519d 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3751,6 +3751,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) + + } + ++static int ++skl_compute_ddb(struct drm_atomic_state *state) ++{ ++ struct drm_device *dev = state->dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); ++ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); ++ struct intel_crtc *intel_crtc; ++ unsigned realloc_pipes = dev_priv->active_crtcs; ++ int ret; ++ ++ /* ++ * If this is our first atomic update following hardware readout, ++ * we can't trust the DDB that the BIOS programmed for us. Let's ++ * pretend that all pipes switched active status so that we'll ++ * ensure a full DDB recompute. ++ */ ++ if (dev_priv->wm.distrust_bios_wm) ++ intel_state->active_pipe_changes = ~0; ++ ++ /* ++ * If the modeset changes which CRTC's are active, we need to ++ * recompute the DDB allocation for *all* active pipes, even ++ * those that weren't otherwise being modified in any way by this ++ * atomic commit. Due to the shrinking of the per-pipe allocations ++ * when new active CRTC's are added, it's possible for a pipe that ++ * we were already using and aren't changing at all here to suddenly ++ * become invalid if its DDB needs exceeds its new allocation. ++ * ++ * Note that if we wind up doing a full DDB recompute, we can't let ++ * any other display updates race with this transaction, so we need ++ * to grab the lock on *all* CRTC's. ++ */ ++ if (intel_state->active_pipe_changes) ++ realloc_pipes = ~0; ++ ++ for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) { ++ struct intel_crtc_state *cstate; ++ ++ cstate = intel_atomic_get_crtc_state(state, intel_crtc); ++ if (IS_ERR(cstate)) ++ return PTR_ERR(cstate); ++ ++ ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++skl_compute_wm(struct drm_atomic_state *state) ++{ ++ struct drm_crtc *crtc; ++ struct drm_crtc_state *cstate; ++ int ret, i; ++ bool changed = false; ++ ++ /* ++ * If this transaction isn't actually touching any CRTC's, don't ++ * bother with watermark calculation. Note that if we pass this ++ * test, we're guaranteed to hold at least one CRTC state mutex, ++ * which means we can safely use values like dev_priv->active_crtcs ++ * since any racing commits that want to update them would need to ++ * hold _all_ CRTC state mutexes. ++ */ ++ for_each_crtc_in_state(state, crtc, cstate, i) ++ changed = true; ++ if (!changed) ++ return 0; ++ ++ ret = skl_compute_ddb(state); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ + static void skl_update_wm(struct drm_crtc *crtc) + { + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); +@@ -7258,6 +7336,7 @@ void intel_init_pm(struct drm_device *dev) + dev_priv->display.init_clock_gating = + bxt_init_clock_gating; + dev_priv->display.update_wm = skl_update_wm; ++ dev_priv->display.compute_global_watermarks = skl_compute_wm; + } else if (HAS_PCH_SPLIT(dev)) { + ilk_setup_wm_latency(dev); + +-- +2.7.4 + diff --git a/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch b/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch new file mode 100644 index 000000000..4d40a4e93 --- /dev/null +++ b/0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch @@ -0,0 +1,389 @@ +From 6a86f1d01bb25a687c59dd6b3e6deea362cf0ee1 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:40:40 +0200 +Subject: [PATCH 10/17] drm/i915/gen9: Drop re-allocation of DDB at atomic + commit (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit a6d3460e62d17098a815a53f23e44d814cb347e0 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:04 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:06 2016 -0700 + + drm/i915/gen9: Drop re-allocation of DDB at atomic commit (v2) + + Now that we're properly pre-allocating the DDB during the atomic check + phase and we trust that the allocation is appropriate, let's actually + use the allocation computed and not duplicate that work during the + commit phase. + + v2: + - Significant rebasing now that we can use cached data rates and + minimum block allocations to avoid grabbing additional plane states. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_display.c | 14 +-- + drivers/gpu/drm/i915/intel_pm.c | 224 +++++++++++------------------------ + 2 files changed, 67 insertions(+), 171 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 03e2635..b484fda 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13522,6 +13522,7 @@ static int intel_atomic_commit(struct drm_device *dev, + drm_atomic_helper_swap_state(dev, state); + dev_priv->wm.config = to_intel_atomic_state(state)->wm_config; + dev_priv->wm.distrust_bios_wm = false; ++ dev_priv->wm.skl_results.ddb = intel_state->ddb; + + if (intel_state->modeset) { + memcpy(dev_priv->min_pixclk, intel_state->min_pixclk, +@@ -13621,19 +13622,6 @@ static int intel_atomic_commit(struct drm_device *dev, + modeset_put_power_domains(dev_priv, put_domains[i]); + } + +- /* +- * Temporary sanity check: make sure our pre-computed DDB matches the +- * one we actually wind up programming. +- * +- * Not a great place to put this, but the easiest place we have access +- * to both the pre-computed and final DDB's; we'll be removing this +- * check in the next patch anyway. +- */ +- WARN(IS_GEN9(dev) && +- memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb, +- sizeof(intel_state->ddb)), +- "Pre-computed DDB does not match final DDB!\n"); +- + if (intel_state->modeset) + intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET); + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index f60519d..80f9f18 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -2788,7 +2788,6 @@ skl_wm_plane_id(const struct intel_plane *plane) + static void + skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + const struct intel_crtc_state *cstate, +- struct intel_wm_config *config, + struct skl_ddb_entry *alloc, /* out */ + int *num_active /* out */) + { +@@ -2796,24 +2795,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + struct intel_atomic_state *intel_state = to_intel_atomic_state(state); + struct drm_i915_private *dev_priv = to_i915(dev); + struct drm_crtc *for_crtc = cstate->base.crtc; +- struct drm_crtc *crtc; + unsigned int pipe_size, ddb_size; + int nth_active_pipe; + int pipe = to_intel_crtc(for_crtc)->pipe; + +- if (intel_state && intel_state->active_pipe_changes) +- *num_active = hweight32(intel_state->active_crtcs); +- else if (intel_state) +- *num_active = hweight32(dev_priv->active_crtcs); +- else +- *num_active = config->num_pipes_active; +- +- if (!cstate->base.active) { ++ if (WARN_ON(!state) || !cstate->base.active) { + alloc->start = 0; + alloc->end = 0; ++ *num_active = hweight32(dev_priv->active_crtcs); + return; + } + ++ if (intel_state->active_pipe_changes) ++ *num_active = hweight32(intel_state->active_crtcs); ++ else ++ *num_active = hweight32(dev_priv->active_crtcs); ++ + if (IS_BROXTON(dev)) + ddb_size = BXT_DDB_SIZE; + else +@@ -2822,50 +2819,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, + ddb_size -= 4; /* 4 blocks for bypass path allocation */ + + /* +- * FIXME: At the moment we may be called on either in-flight or fully +- * committed cstate's. Once we fully move DDB allocation in the check +- * phase, we'll only be called on in-flight states and the 'else' +- * branch here will go away. +- * +- * The 'else' branch is slightly racy here, but it was racy to begin +- * with; since it's going away soon, no effort is made to address that. ++ * If the state doesn't change the active CRTC's, then there's ++ * no need to recalculate; the existing pipe allocation limits ++ * should remain unchanged. Note that we're safe from racing ++ * commits since any racing commit that changes the active CRTC ++ * list would need to grab _all_ crtc locks, including the one ++ * we currently hold. + */ +- if (state) { +- /* +- * If the state doesn't change the active CRTC's, then there's +- * no need to recalculate; the existing pipe allocation limits +- * should remain unchanged. Note that we're safe from racing +- * commits since any racing commit that changes the active CRTC +- * list would need to grab _all_ crtc locks, including the one +- * we currently hold. +- */ +- if (!intel_state->active_pipe_changes) { +- *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; +- return; +- } +- +- nth_active_pipe = hweight32(intel_state->active_crtcs & +- (drm_crtc_mask(for_crtc) - 1)); +- pipe_size = ddb_size / hweight32(intel_state->active_crtcs); +- alloc->start = nth_active_pipe * ddb_size / *num_active; +- alloc->end = alloc->start + pipe_size; +- } else { +- nth_active_pipe = 0; +- for_each_crtc(dev, crtc) { +- if (!to_intel_crtc(crtc)->active) +- continue; +- +- if (crtc == for_crtc) +- break; +- +- nth_active_pipe++; +- } +- +- pipe_size = ddb_size / config->num_pipes_active; +- alloc->start = nth_active_pipe * ddb_size / +- config->num_pipes_active; +- alloc->end = alloc->start + pipe_size; ++ if (!intel_state->active_pipe_changes) { ++ *alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe]; ++ return; + } ++ ++ nth_active_pipe = hweight32(intel_state->active_crtcs & ++ (drm_crtc_mask(for_crtc) - 1)); ++ pipe_size = ddb_size / hweight32(intel_state->active_crtcs); ++ alloc->start = nth_active_pipe * ddb_size / *num_active; ++ alloc->end = alloc->start + pipe_size; + } + + static unsigned int skl_cursor_allocation(int num_active) +@@ -2964,62 +2934,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate) + struct drm_crtc *crtc = cstate->crtc; + struct drm_device *dev = crtc->dev; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ const struct drm_plane *plane; + const struct intel_plane *intel_plane; ++ struct drm_plane_state *pstate; + unsigned int rate, total_data_rate = 0; + int id; ++ int i; ++ ++ if (WARN_ON(!state)) ++ return 0; + + /* Calculate and cache data rate for each plane */ +- /* +- * FIXME: At the moment this function can be called on either an +- * in-flight or a committed state object. If it's in-flight then we +- * only want to re-calculate the plane data rate for planes that are +- * part of the transaction (i.e., we don't want to grab any additional +- * plane states if we don't have to). If we're operating on committed +- * state, we'll just go ahead and recalculate the plane data rate for +- * all planes. +- * +- * Once we finish moving our DDB allocation to the atomic check phase, +- * we'll only be calling this function on in-flight state objects, so +- * the 'else' branch here will go away. +- */ +- if (state) { +- struct drm_plane *plane; +- struct drm_plane_state *pstate; +- int i; +- +- for_each_plane_in_state(state, plane, pstate, i) { +- intel_plane = to_intel_plane(plane); +- id = skl_wm_plane_id(intel_plane); +- +- if (intel_plane->pipe != intel_crtc->pipe) +- continue; +- +- /* packed/uv */ +- rate = skl_plane_relative_data_rate(intel_cstate, +- pstate, 0); +- intel_cstate->wm.skl.plane_data_rate[id] = rate; +- +- /* y-plane */ +- rate = skl_plane_relative_data_rate(intel_cstate, +- pstate, 1); +- intel_cstate->wm.skl.plane_y_data_rate[id] = rate; +- } +- } else { +- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +- const struct drm_plane_state *pstate = +- intel_plane->base.state; +- int id = skl_wm_plane_id(intel_plane); ++ for_each_plane_in_state(state, plane, pstate, i) { ++ id = skl_wm_plane_id(to_intel_plane(plane)); ++ intel_plane = to_intel_plane(plane); + +- /* packed/uv */ +- rate = skl_plane_relative_data_rate(intel_cstate, +- pstate, 0); +- intel_cstate->wm.skl.plane_data_rate[id] = rate; ++ if (intel_plane->pipe != intel_crtc->pipe) ++ continue; + +- /* y-plane */ +- rate = skl_plane_relative_data_rate(intel_cstate, +- pstate, 1); +- intel_cstate->wm.skl.plane_y_data_rate[id] = rate; +- } ++ /* packed/uv */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 0); ++ intel_cstate->wm.skl.plane_data_rate[id] = rate; ++ ++ /* y-plane */ ++ rate = skl_plane_relative_data_rate(intel_cstate, ++ pstate, 1); ++ intel_cstate->wm.skl.plane_y_data_rate[id] = rate; + } + + /* Calculate CRTC's total data rate from cached values */ +@@ -3043,8 +2984,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + struct drm_atomic_state *state = cstate->base.state; + struct drm_crtc *crtc = cstate->base.crtc; + struct drm_device *dev = crtc->dev; +- struct drm_i915_private *dev_priv = to_i915(dev); +- struct intel_wm_config *config = &dev_priv->wm.config; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_plane *intel_plane; + struct drm_plane *plane; +@@ -3058,6 +2997,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + int num_active; + int id, i; + ++ if (WARN_ON(!state)) ++ return 0; ++ + if (!cstate->base.active) { + ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0; + memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); +@@ -3065,8 +3007,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + return 0; + } + +- skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc, +- &num_active); ++ skl_ddb_get_pipe_allocation_limits(dev, cstate, alloc, &num_active); + alloc_size = skl_ddb_entry_size(alloc); + if (alloc_size == 0) { + memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); +@@ -3078,53 +3019,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, + ddb->plane[pipe][PLANE_CURSOR].end = alloc->end; + + alloc_size -= cursor_blocks; +- alloc->end -= cursor_blocks; + + /* 1. Allocate the mininum required blocks for each active plane */ +- /* +- * TODO: Remove support for already-committed state once we +- * only allocate DDB on in-flight states. +- */ +- if (state) { +- for_each_plane_in_state(state, plane, pstate, i) { +- intel_plane = to_intel_plane(plane); +- id = skl_wm_plane_id(intel_plane); +- +- if (intel_plane->pipe != pipe) +- continue; +- +- if (!to_intel_plane_state(pstate)->visible) { +- minimum[id] = 0; +- y_minimum[id] = 0; +- continue; +- } +- if (plane->type == DRM_PLANE_TYPE_CURSOR) { +- minimum[id] = 0; +- y_minimum[id] = 0; +- continue; +- } +- +- minimum[id] = 8; +- if (pstate->fb->pixel_format == DRM_FORMAT_NV12) +- y_minimum[id] = 8; +- else +- y_minimum[id] = 0; +- } +- } else { +- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { +- struct drm_plane *plane = &intel_plane->base; +- struct drm_framebuffer *fb = plane->state->fb; +- int id = skl_wm_plane_id(intel_plane); +- +- if (!to_intel_plane_state(plane->state)->visible) +- continue; ++ for_each_plane_in_state(state, plane, pstate, i) { ++ intel_plane = to_intel_plane(plane); ++ id = skl_wm_plane_id(intel_plane); + +- if (plane->type == DRM_PLANE_TYPE_CURSOR) +- continue; ++ if (intel_plane->pipe != pipe) ++ continue; + +- minimum[id] = 8; +- y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0; ++ if (!to_intel_plane_state(pstate)->visible) { ++ minimum[id] = 0; ++ y_minimum[id] = 0; ++ continue; ++ } ++ if (plane->type == DRM_PLANE_TYPE_CURSOR) { ++ minimum[id] = 0; ++ y_minimum[id] = 0; ++ continue; + } ++ ++ minimum[id] = 8; ++ if (pstate->fb->pixel_format == DRM_FORMAT_NV12) ++ y_minimum[id] = 8; ++ else ++ y_minimum[id] = 0; + } + + for (i = 0; i < PLANE_CURSOR; i++) { +@@ -3675,7 +3594,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc, + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + +- WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0); + skl_build_pipe_wm(cstate, ddb, pipe_wm); + + if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) +@@ -3739,16 +3657,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) + memset(watermarks->plane_trans[pipe], + 0, sizeof(uint32_t) * I915_MAX_PLANES); + watermarks->plane_trans[pipe][PLANE_CURSOR] = 0; +- +- /* Clear ddb entries for pipe */ +- memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry)); +- memset(&watermarks->ddb.plane[pipe], 0, +- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES); +- memset(&watermarks->ddb.y_plane[pipe], 0, +- sizeof(struct skl_ddb_entry) * I915_MAX_PLANES); +- memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0, +- sizeof(struct skl_ddb_entry)); +- + } + + static int +-- +2.7.4 + diff --git a/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch b/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch new file mode 100644 index 000000000..9f839dfa2 --- /dev/null +++ b/0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch @@ -0,0 +1,91 @@ +From eacd0ecb98a93e3ff83a4479eadeb9cda05d3579 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:41:01 +0200 +Subject: [PATCH 11/17] drm/i915/gen9: Calculate plane WM's from state + +Upstream: since drm-intel-next-2016-05-22 +commit 33815fa55b31a5de4b197c09926ecab3dfb79732 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:05 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:12 2016 -0700 + + drm/i915/gen9: Calculate plane WM's from state + + In a future patch we'll want to calculate plane watermarks for in-flight + atomic state rather than the already-committed state. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-12-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 80f9f18..3164f30 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3179,16 +3179,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, + + static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + struct intel_crtc_state *cstate, +- struct intel_plane *intel_plane, ++ struct intel_plane_state *intel_pstate, + uint16_t ddb_allocation, + int level, + uint16_t *out_blocks, /* out */ + uint8_t *out_lines /* out */) + { +- struct drm_plane *plane = &intel_plane->base; +- struct drm_framebuffer *fb = plane->state->fb; +- struct intel_plane_state *intel_pstate = +- to_intel_plane_state(plane->state); ++ struct drm_plane_state *pstate = &intel_pstate->base; ++ struct drm_framebuffer *fb = pstate->fb; + uint32_t latency = dev_priv->wm.skl_latency[level]; + uint32_t method1, method2; + uint32_t plane_bytes_per_line, plane_blocks_per_line; +@@ -3203,7 +3201,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + width = drm_rect_width(&intel_pstate->src) >> 16; + height = drm_rect_height(&intel_pstate->src) >> 16; + +- if (intel_rotation_90_or_270(plane->state->rotation)) ++ if (intel_rotation_90_or_270(pstate->rotation)) + swap(width, height); + + cpp = drm_format_plane_cpp(fb->pixel_format, 0); +@@ -3223,7 +3221,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) { + uint32_t min_scanlines = 4; + uint32_t y_tile_minimum; +- if (intel_rotation_90_or_270(plane->state->rotation)) { ++ if (intel_rotation_90_or_270(pstate->rotation)) { + int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ? + drm_format_plane_cpp(fb->pixel_format, 1) : + drm_format_plane_cpp(fb->pixel_format, 0); +@@ -3277,17 +3275,19 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, + struct drm_device *dev = dev_priv->dev; + struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); + struct intel_plane *intel_plane; ++ struct intel_plane_state *intel_pstate; + uint16_t ddb_blocks; + enum pipe pipe = intel_crtc->pipe; + + for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { + int i = skl_wm_plane_id(intel_plane); + ++ intel_pstate = to_intel_plane_state(intel_plane->base.state); + ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); + + result->plane_en[i] = skl_compute_plane_wm(dev_priv, + cstate, +- intel_plane, ++ intel_pstate, + ddb_blocks, + level, + &result->plane_res_b[i], +-- +2.7.4 + diff --git a/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch b/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch new file mode 100644 index 000000000..d0cb50bac --- /dev/null +++ b/0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch @@ -0,0 +1,156 @@ +From c3d2591095045a8230361d55fadf15ce5dc9127d Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:41:12 +0200 +Subject: [PATCH 12/17] drm/i915/gen9: Allow watermark calculation on in-flight + atomic state (v3) + +Upstream: since drm-intel-next-2016-05-22 +commit f4a967523ec7215a3ec867b7ed2e916bd34840e1 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:06 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:23 2016 -0700 + + drm/i915/gen9: Allow watermark calculation on in-flight atomic state (v3) + + In an upcoming patch we'll move this calculation to the atomic 'check' + phase so that the display update can be rejected early if no valid + watermark programming is possible. + + v2: + - Drop intel_pstate_for_cstate_plane() helper and add note about how + the code needs to evolve in the future if we start allowing more than + one pending commit against a CRTC. (Maarten) + + v3: + - Only have skl_compute_wm_level calculate watermarks for enabled + planes; we can just set the other planes on a CRTC to disabled + without having to look at the plane state. This is important because + despite our CRTC lock we can still have racing commits that modify + a disabled plane's property without turning it on. (Maarten) + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-13-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_pm.c | 61 ++++++++++++++++++++++++++++++++--------- + 1 file changed, 48 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 3164f30..cd29ab6 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3266,23 +3266,56 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + return true; + } + +-static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, +- struct skl_ddb_allocation *ddb, +- struct intel_crtc_state *cstate, +- int level, +- struct skl_wm_level *result) ++static int ++skl_compute_wm_level(const struct drm_i915_private *dev_priv, ++ struct skl_ddb_allocation *ddb, ++ struct intel_crtc_state *cstate, ++ int level, ++ struct skl_wm_level *result) + { + struct drm_device *dev = dev_priv->dev; ++ struct drm_atomic_state *state = cstate->base.state; + struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc); ++ struct drm_plane *plane; + struct intel_plane *intel_plane; + struct intel_plane_state *intel_pstate; + uint16_t ddb_blocks; + enum pipe pipe = intel_crtc->pipe; + +- for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) { ++ /* ++ * We'll only calculate watermarks for planes that are actually ++ * enabled, so make sure all other planes are set as disabled. ++ */ ++ memset(result, 0, sizeof(*result)); ++ ++ for_each_intel_plane_mask(dev, intel_plane, cstate->base.plane_mask) { + int i = skl_wm_plane_id(intel_plane); + +- intel_pstate = to_intel_plane_state(intel_plane->base.state); ++ plane = &intel_plane->base; ++ intel_pstate = NULL; ++ if (state) ++ intel_pstate = ++ intel_atomic_get_existing_plane_state(state, ++ intel_plane); ++ ++ /* ++ * Note: If we start supporting multiple pending atomic commits ++ * against the same planes/CRTC's in the future, plane->state ++ * will no longer be the correct pre-state to use for the ++ * calculations here and we'll need to change where we get the ++ * 'unchanged' plane data from. ++ * ++ * For now this is fine because we only allow one queued commit ++ * against a CRTC. Even if the plane isn't modified by this ++ * transaction and we don't have a plane lock, we still have ++ * the CRTC's lock, so we know that no other transactions are ++ * racing with us to update it. ++ */ ++ if (!intel_pstate) ++ intel_pstate = to_intel_plane_state(plane->state); ++ ++ WARN_ON(!intel_pstate->base.fb); ++ + ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); + + result->plane_en[i] = skl_compute_plane_wm(dev_priv, +@@ -3293,6 +3326,8 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, + &result->plane_res_b[i], + &result->plane_res_l[i]); + } ++ ++ return 0; + } + + static uint32_t +@@ -3587,14 +3622,14 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv, + } + } + +-static bool skl_update_pipe_wm(struct drm_crtc *crtc, ++static bool skl_update_pipe_wm(struct drm_crtc_state *cstate, + struct skl_ddb_allocation *ddb, /* out */ + struct skl_pipe_wm *pipe_wm /* out */) + { +- struct intel_crtc *intel_crtc = to_intel_crtc(crtc); +- struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); ++ struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc); ++ struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate); + +- skl_build_pipe_wm(cstate, ddb, pipe_wm); ++ skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); + + if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) + return false; +@@ -3634,7 +3669,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, + if (!intel_crtc->active) + continue; + +- wm_changed = skl_update_pipe_wm(&intel_crtc->base, ++ wm_changed = skl_update_pipe_wm(intel_crtc->base.state, + &r->ddb, &pipe_wm); + + /* +@@ -3752,7 +3787,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + + skl_clear_wm(results, intel_crtc->pipe); + +- if (!skl_update_pipe_wm(crtc, &results->ddb, pipe_wm)) ++ if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm)) + return; + + skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); +-- +2.7.4 + diff --git a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch new file mode 100644 index 000000000..959860f95 --- /dev/null +++ b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch @@ -0,0 +1,91 @@ +From b43247a865f73fa3b73a878236b5055bfb864169 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:41:23 +0200 +Subject: [PATCH 13/17] drm/i915/gen9: Use a bitmask to track dirty pipe + watermarks + +Upstream: since drm-intel-next-2016-05-22 +commit 2b4b9f35d94b1b533bc23110b040b04316480b28 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:07 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:40 2016 -0700 + + drm/i915/gen9: Use a bitmask to track dirty pipe watermarks + + Slightly easier to work with than an array of bools. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 2 +- + drivers/gpu/drm/i915/intel_pm.c | 10 +++++----- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index 237df9f..67c76b6 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1615,7 +1615,7 @@ struct skl_ddb_allocation { + }; + + struct skl_wm_values { +- bool dirty[I915_MAX_PIPES]; ++ unsigned dirty_pipes; + struct skl_ddb_allocation ddb; + uint32_t wm_linetime[I915_MAX_PIPES]; + uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8]; +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index cd29ab6..611c5a1 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3455,7 +3455,7 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, + int i, level, max_level = ilk_wm_max_level(dev); + enum pipe pipe = crtc->pipe; + +- if (!new->dirty[pipe]) ++ if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) + continue; + + I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); +@@ -3680,7 +3680,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, + WARN_ON(!wm_changed); + + skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc); +- r->dirty[intel_crtc->pipe] = true; ++ r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); + } + } + +@@ -3783,7 +3783,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + + + /* Clear all dirty flags */ +- memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES); ++ results->dirty_pipes = 0; + + skl_clear_wm(results, intel_crtc->pipe); + +@@ -3791,7 +3791,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + return; + + skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); +- results->dirty[intel_crtc->pipe] = true; ++ results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); + + skl_update_other_pipe_wm(dev, crtc, results); + skl_write_wm_values(dev_priv, results); +@@ -3952,7 +3952,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) + if (!intel_crtc->active) + return; + +- hw->dirty[pipe] = true; ++ hw->dirty_pipes |= drm_crtc_mask(crtc); + + active->linetime = hw->wm_linetime[pipe]; + +-- +2.7.4 + diff --git a/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch b/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch new file mode 100644 index 000000000..a868ebd1f --- /dev/null +++ b/0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch @@ -0,0 +1,254 @@ +From 2dda82bdd570042820241e71c02ea36081835f67 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:41:35 +0200 +Subject: [PATCH 14/17] drm/i915/gen9: Propagate watermark calculation failures + up the call chain + +Upstream: since drm-intel-next-2016-05-22 +commit 55994c2c38a1101f84cdf277b228f830af8a9c1b + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:08 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:34:48 2016 -0700 + + drm/i915/gen9: Propagate watermark calculation failures up the call chain + + Once we move watermark calculation to the atomic check phase, we'll want + to start rejecting display configurations that exceed out watermark + limits. At the moment we just assume that there's always a valid set of + watermarks, even though this may not actually be true. Let's prepare by + passing return codes up through the call stack in preparation. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-15-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_display.c | 10 ++-- + drivers/gpu/drm/i915/intel_pm.c | 90 ++++++++++++++++++++++-------------- + 2 files changed, 61 insertions(+), 39 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index b484fda..9ac2346 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13222,7 +13222,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state) + * phase. The code here should be run after the per-crtc and per-plane 'check' + * handlers to ensure that all derived state has been updated. + */ +-static void calc_watermark_data(struct drm_atomic_state *state) ++static int calc_watermark_data(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; + struct drm_i915_private *dev_priv = to_i915(dev); +@@ -13258,7 +13258,9 @@ static void calc_watermark_data(struct drm_atomic_state *state) + + /* Is there platform-specific watermark information to calculate? */ + if (dev_priv->display.compute_global_watermarks) +- dev_priv->display.compute_global_watermarks(state); ++ return dev_priv->display.compute_global_watermarks(state); ++ ++ return 0; + } + + /** +@@ -13345,9 +13347,7 @@ static int intel_atomic_check(struct drm_device *dev, + return ret; + + intel_fbc_choose_crtc(dev_priv, state); +- calc_watermark_data(state); +- +- return 0; ++ return calc_watermark_data(state); + } + + static int intel_atomic_prepare_commit(struct drm_device *dev, +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 611c5a1..ec22d93 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3177,13 +3177,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, + return false; + } + +-static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, +- struct intel_crtc_state *cstate, +- struct intel_plane_state *intel_pstate, +- uint16_t ddb_allocation, +- int level, +- uint16_t *out_blocks, /* out */ +- uint8_t *out_lines /* out */) ++static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, ++ struct intel_crtc_state *cstate, ++ struct intel_plane_state *intel_pstate, ++ uint16_t ddb_allocation, ++ int level, ++ uint16_t *out_blocks, /* out */ ++ uint8_t *out_lines, /* out */ ++ bool *enabled /* out */) + { + struct drm_plane_state *pstate = &intel_pstate->base; + struct drm_framebuffer *fb = pstate->fb; +@@ -3195,8 +3196,10 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + uint8_t cpp; + uint32_t width = 0, height = 0; + +- if (latency == 0 || !cstate->base.active || !intel_pstate->visible) +- return false; ++ if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { ++ *enabled = false; ++ return 0; ++ } + + width = drm_rect_width(&intel_pstate->src) >> 16; + height = drm_rect_height(&intel_pstate->src) >> 16; +@@ -3257,13 +3260,16 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + res_blocks++; + } + +- if (res_blocks >= ddb_allocation || res_lines > 31) +- return false; ++ if (res_blocks >= ddb_allocation || res_lines > 31) { ++ *enabled = false; ++ return 0; ++ } + + *out_blocks = res_blocks; + *out_lines = res_lines; ++ *enabled = true; + +- return true; ++ return 0; + } + + static int +@@ -3281,6 +3287,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, + struct intel_plane_state *intel_pstate; + uint16_t ddb_blocks; + enum pipe pipe = intel_crtc->pipe; ++ int ret; + + /* + * We'll only calculate watermarks for planes that are actually +@@ -3318,13 +3325,16 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv, + + ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]); + +- result->plane_en[i] = skl_compute_plane_wm(dev_priv, +- cstate, +- intel_pstate, +- ddb_blocks, +- level, +- &result->plane_res_b[i], +- &result->plane_res_l[i]); ++ ret = skl_compute_plane_wm(dev_priv, ++ cstate, ++ intel_pstate, ++ ddb_blocks, ++ level, ++ &result->plane_res_b[i], ++ &result->plane_res_l[i], ++ &result->plane_en[i]); ++ if (ret) ++ return ret; + } + + return 0; +@@ -3361,21 +3371,26 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, + } + } + +-static void skl_build_pipe_wm(struct intel_crtc_state *cstate, +- struct skl_ddb_allocation *ddb, +- struct skl_pipe_wm *pipe_wm) ++static int skl_build_pipe_wm(struct intel_crtc_state *cstate, ++ struct skl_ddb_allocation *ddb, ++ struct skl_pipe_wm *pipe_wm) + { + struct drm_device *dev = cstate->base.crtc->dev; + const struct drm_i915_private *dev_priv = dev->dev_private; + int level, max_level = ilk_wm_max_level(dev); ++ int ret; + + for (level = 0; level <= max_level; level++) { +- skl_compute_wm_level(dev_priv, ddb, cstate, +- level, &pipe_wm->wm[level]); ++ ret = skl_compute_wm_level(dev_priv, ddb, cstate, ++ level, &pipe_wm->wm[level]); ++ if (ret) ++ return ret; + } + pipe_wm->linetime = skl_compute_linetime_wm(cstate); + + skl_compute_transition_wm(cstate, &pipe_wm->trans_wm); ++ ++ return 0; + } + + static void skl_compute_wm_results(struct drm_device *dev, +@@ -3622,21 +3637,27 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv, + } + } + +-static bool skl_update_pipe_wm(struct drm_crtc_state *cstate, +- struct skl_ddb_allocation *ddb, /* out */ +- struct skl_pipe_wm *pipe_wm /* out */) ++static int skl_update_pipe_wm(struct drm_crtc_state *cstate, ++ struct skl_ddb_allocation *ddb, /* out */ ++ struct skl_pipe_wm *pipe_wm, /* out */ ++ bool *changed /* out */) + { + struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc); + struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate); ++ int ret; + +- skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); ++ ret = skl_build_pipe_wm(intel_cstate, ddb, pipe_wm); ++ if (ret) ++ return ret; + + if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm))) +- return false; ++ *changed = false; ++ else ++ *changed = true; + + intel_crtc->wm.active.skl = *pipe_wm; + +- return true; ++ return 0; + } + + static void skl_update_other_pipe_wm(struct drm_device *dev, +@@ -3669,8 +3690,8 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, + if (!intel_crtc->active) + continue; + +- wm_changed = skl_update_pipe_wm(intel_crtc->base.state, +- &r->ddb, &pipe_wm); ++ skl_update_pipe_wm(intel_crtc->base.state, ++ &r->ddb, &pipe_wm, &wm_changed); + + /* + * If we end up re-computing the other pipe WM values, it's +@@ -3780,14 +3801,15 @@ static void skl_update_wm(struct drm_crtc *crtc) + struct skl_wm_values *results = &dev_priv->wm.skl_results; + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; +- ++ bool wm_changed; + + /* Clear all dirty flags */ + results->dirty_pipes = 0; + + skl_clear_wm(results, intel_crtc->pipe); + +- if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm)) ++ skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed); ++ if (!wm_changed) + return; + + skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); +-- +2.7.4 + diff --git a/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch b/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch new file mode 100644 index 000000000..b8f602e0e --- /dev/null +++ b/0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch @@ -0,0 +1,321 @@ +From 71136125cc79dab464a0139dbf0c02891aa9ce6e Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:41:46 +0200 +Subject: [PATCH 15/17] drm/i915/gen9: Calculate watermarks during atomic + 'check' (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit 734fa01f3a17ac80d2d53cee0b05b246c03df0e4 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 15:11:40 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:35:48 2016 -0700 + + drm/i915/gen9: Calculate watermarks during atomic 'check' (v2) + + Moving watermark calculation into the check phase will allow us to to + reject display configurations for which there are no valid watermark + values before we start trying to program the hardware (although those + tests will come in a subsequent patch). + + Another advantage of moving this calculation to the check phase is that + we can calculate the watermarks in a single shot as part of the atomic + transaction. The watermark interfaces we inherited from our legacy + modesetting days are a bit broken in the atomic design because they use + per-crtc entry points but actually re-calculate and re-program something + that is really more of a global state. That worked okay in the legacy + modesetting world because operations only ever updated a single CRTC at + a time. However in the atomic world, a transaction can involve multiple + CRTC's, which means we wind up computing and programming the watermarks + NxN times (where N is the number of CRTC's involved). With this patch + we eliminate the redundant re-calculation of watermark data for atomic + states (which was the cause of the WARN_ON(!wm_changed) problems that + have plagued us for a while). + + We still need to work on the 'commit' side of watermark handling so that + we aren't doing redundant NxN programming of watermarks, but that's + content for future patches. + + v2: + - Bail out of skl_write_wm_values() if the CRTC isn't active. Now that + we set dirty_pipes to ~0 if the active pipes change (because + we need to deal with DDB changes), we can now wind up here for + disabled pipes, whereas we couldn't before. + + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055 + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181 + Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Tested-by: Daniel Stone <daniels@collabora.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_display.c | 2 +- + drivers/gpu/drm/i915/intel_drv.h | 14 +++- + drivers/gpu/drm/i915/intel_pm.c | 135 ++++++++++++----------------------- + 3 files changed, 61 insertions(+), 90 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 9ac2346..1726ea4 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13522,7 +13522,7 @@ static int intel_atomic_commit(struct drm_device *dev, + drm_atomic_helper_swap_state(dev, state); + dev_priv->wm.config = to_intel_atomic_state(state)->wm_config; + dev_priv->wm.distrust_bios_wm = false; +- dev_priv->wm.skl_results.ddb = intel_state->ddb; ++ dev_priv->wm.skl_results = intel_state->wm_results; + + if (intel_state->modeset) { + memcpy(dev_priv->min_pixclk, intel_state->min_pixclk, +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index 4d6336a..e5543b8 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -273,7 +273,7 @@ struct intel_atomic_state { + struct intel_wm_config wm_config; + + /* Gen9+ only */ +- struct skl_ddb_allocation ddb; ++ struct skl_wm_values wm_results; + }; + + struct intel_plane_state { +@@ -1661,6 +1661,18 @@ intel_atomic_get_crtc_state(struct drm_atomic_state *state, + + return to_intel_crtc_state(crtc_state); + } ++ ++static inline struct intel_plane_state * ++intel_atomic_get_existing_plane_state(struct drm_atomic_state *state, ++ struct intel_plane *plane) ++{ ++ struct drm_plane_state *plane_state; ++ ++ plane_state = drm_atomic_get_existing_plane_state(state, &plane->base); ++ ++ return to_intel_plane_state(plane_state); ++} ++ + int intel_atomic_setup_scalers(struct drm_device *dev, + struct intel_crtc *intel_crtc, + struct intel_crtc_state *crtc_state); +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index ec22d93..73e5242 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3160,23 +3160,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, + return ret; + } + +-static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, +- const struct intel_crtc *intel_crtc) +-{ +- struct drm_device *dev = intel_crtc->base.dev; +- struct drm_i915_private *dev_priv = dev->dev_private; +- const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb; +- +- /* +- * If ddb allocation of pipes changed, it may require recalculation of +- * watermarks +- */ +- if (memcmp(new_ddb->pipe, cur_ddb->pipe, sizeof(new_ddb->pipe))) +- return true; +- +- return false; +-} +- + static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + struct intel_crtc_state *cstate, + struct intel_plane_state *intel_pstate, +@@ -3472,6 +3455,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, + + if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) + continue; ++ if (!crtc->active) ++ continue; + + I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); + +@@ -3655,66 +3640,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate, + else + *changed = true; + +- intel_crtc->wm.active.skl = *pipe_wm; +- + return 0; + } + +-static void skl_update_other_pipe_wm(struct drm_device *dev, +- struct drm_crtc *crtc, +- struct skl_wm_values *r) +-{ +- struct intel_crtc *intel_crtc; +- struct intel_crtc *this_crtc = to_intel_crtc(crtc); +- +- /* +- * If the WM update hasn't changed the allocation for this_crtc (the +- * crtc we are currently computing the new WM values for), other +- * enabled crtcs will keep the same allocation and we don't need to +- * recompute anything for them. +- */ +- if (!skl_ddb_allocation_changed(&r->ddb, this_crtc)) +- return; +- +- /* +- * Otherwise, because of this_crtc being freshly enabled/disabled, the +- * other active pipes need new DDB allocation and WM values. +- */ +- for_each_intel_crtc(dev, intel_crtc) { +- struct skl_pipe_wm pipe_wm = {}; +- bool wm_changed; +- +- if (this_crtc->pipe == intel_crtc->pipe) +- continue; +- +- if (!intel_crtc->active) +- continue; +- +- skl_update_pipe_wm(intel_crtc->base.state, +- &r->ddb, &pipe_wm, &wm_changed); +- +- /* +- * If we end up re-computing the other pipe WM values, it's +- * because it was really needed, so we expect the WM values to +- * be different. +- */ +- WARN_ON(!wm_changed); +- +- skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc); +- r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); +- } +-} +- +-static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe) +-{ +- watermarks->wm_linetime[pipe] = 0; +- memset(watermarks->plane[pipe], 0, +- sizeof(uint32_t) * 8 * I915_MAX_PLANES); +- memset(watermarks->plane_trans[pipe], +- 0, sizeof(uint32_t) * I915_MAX_PLANES); +- watermarks->plane_trans[pipe][PLANE_CURSOR] = 0; +-} +- + static int + skl_compute_ddb(struct drm_atomic_state *state) + { +@@ -3722,6 +3650,7 @@ skl_compute_ddb(struct drm_atomic_state *state) + struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_atomic_state *intel_state = to_intel_atomic_state(state); + struct intel_crtc *intel_crtc; ++ struct skl_ddb_allocation *ddb = &intel_state->wm_results.ddb; + unsigned realloc_pipes = dev_priv->active_crtcs; + int ret; + +@@ -3747,8 +3676,10 @@ skl_compute_ddb(struct drm_atomic_state *state) + * any other display updates race with this transaction, so we need + * to grab the lock on *all* CRTC's. + */ +- if (intel_state->active_pipe_changes) ++ if (intel_state->active_pipe_changes) { + realloc_pipes = ~0; ++ intel_state->wm_results.dirty_pipes = ~0; ++ } + + for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) { + struct intel_crtc_state *cstate; +@@ -3757,7 +3688,7 @@ skl_compute_ddb(struct drm_atomic_state *state) + if (IS_ERR(cstate)) + return PTR_ERR(cstate); + +- ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb); ++ ret = skl_allocate_pipe_ddb(cstate, ddb); + if (ret) + return ret; + } +@@ -3770,8 +3701,11 @@ skl_compute_wm(struct drm_atomic_state *state) + { + struct drm_crtc *crtc; + struct drm_crtc_state *cstate; +- int ret, i; ++ struct intel_atomic_state *intel_state = to_intel_atomic_state(state); ++ struct skl_wm_values *results = &intel_state->wm_results; ++ struct skl_pipe_wm *pipe_wm; + bool changed = false; ++ int ret, i; + + /* + * If this transaction isn't actually touching any CRTC's, don't +@@ -3786,10 +3720,44 @@ skl_compute_wm(struct drm_atomic_state *state) + if (!changed) + return 0; + ++ /* Clear all dirty flags */ ++ results->dirty_pipes = 0; ++ + ret = skl_compute_ddb(state); + if (ret) + return ret; + ++ /* ++ * Calculate WM's for all pipes that are part of this transaction. ++ * Note that the DDB allocation above may have added more CRTC's that ++ * weren't otherwise being modified (and set bits in dirty_pipes) if ++ * pipe allocations had to change. ++ * ++ * FIXME: Now that we're doing this in the atomic check phase, we ++ * should allow skl_update_pipe_wm() to return failure in cases where ++ * no suitable watermark values can be found. ++ */ ++ for_each_crtc_in_state(state, crtc, cstate, i) { ++ struct intel_crtc *intel_crtc = to_intel_crtc(crtc); ++ struct intel_crtc_state *intel_cstate = ++ to_intel_crtc_state(cstate); ++ ++ pipe_wm = &intel_cstate->wm.skl.optimal; ++ ret = skl_update_pipe_wm(cstate, &results->ddb, pipe_wm, ++ &changed); ++ if (ret) ++ return ret; ++ ++ if (changed) ++ results->dirty_pipes |= drm_crtc_mask(crtc); ++ ++ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0) ++ /* This pipe's WM's did not change */ ++ continue; ++ ++ skl_compute_wm_results(crtc->dev, pipe_wm, results, intel_crtc); ++ } ++ + return 0; + } + +@@ -3801,21 +3769,12 @@ static void skl_update_wm(struct drm_crtc *crtc) + struct skl_wm_values *results = &dev_priv->wm.skl_results; + struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state); + struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal; +- bool wm_changed; + +- /* Clear all dirty flags */ +- results->dirty_pipes = 0; +- +- skl_clear_wm(results, intel_crtc->pipe); +- +- skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed); +- if (!wm_changed) ++ if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0) + return; + +- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); +- results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); ++ intel_crtc->wm.active.skl = *pipe_wm; + +- skl_update_other_pipe_wm(dev, crtc, results); + skl_write_wm_values(dev_priv, results); + skl_flush_wm_values(dev_priv, results); + +-- +2.7.4 + diff --git a/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch b/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch new file mode 100644 index 000000000..fb59572bd --- /dev/null +++ b/0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch @@ -0,0 +1,63 @@ +From 7731c187f1f77501b7dddf419a06c1b42b0f1388 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:42:00 +0200 +Subject: [PATCH 16/17] drm/i915/gen9: Reject display updates that exceed wm + limitations (v2) + +Upstream: since drm-intel-next-2016-05-22 +commit 6b6bada7d476b586d85b1f9df43125804877e09f + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:10 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:36:04 2016 -0700 + + drm/i915/gen9: Reject display updates that exceed wm limitations (v2) + + If we can't find any valid level 0 watermark values for the requested + atomic transaction, reject the configuration before we try to start + programming the hardware. + + v2: + - Add extra debugging output when we reject level 0 watermarks so that + we can more easily debug how/why they were rejected. + + Cc: Lyude Paul <cpaul@redhat.com> + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index 73e5242..70dcd2e 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3245,7 +3245,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, + + if (res_blocks >= ddb_allocation || res_lines > 31) { + *enabled = false; +- return 0; ++ ++ /* ++ * If there are no valid level 0 watermarks, then we can't ++ * support this display configuration. ++ */ ++ if (level) { ++ return 0; ++ } else { ++ DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n"); ++ DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n", ++ to_intel_crtc(cstate->base.crtc)->pipe, ++ skl_wm_plane_id(to_intel_plane(pstate->plane)), ++ res_blocks, ddb_allocation, res_lines); ++ ++ return -EINVAL; ++ } + } + + *out_blocks = res_blocks; +-- +2.7.4 + diff --git a/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch b/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch new file mode 100644 index 000000000..e47725c25 --- /dev/null +++ b/0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch @@ -0,0 +1,115 @@ +From ebe515b1696401259781bc183e211a81287242f6 Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team <kernel-team@fedoraproject.org> +Date: Mon, 20 Jun 2016 12:42:13 +0200 +Subject: [PATCH 17/17] drm/i915: Remove wm_config from + dev_priv/intel_atomic_state + +Upstream: since drm-intel-next-2016-05-22 +commit 5b483747a92570176259bb896dcf2468291f3e42 + +Author: Matt Roper <matthew.d.roper@intel.com> +AuthorDate: Thu May 12 07:06:11 2016 -0700 +Commit: Matt Roper <matthew.d.roper@intel.com> +CommitDate: Fri May 13 07:36:05 2016 -0700 + + drm/i915: Remove wm_config from dev_priv/intel_atomic_state + + We calculate the watermark config into intel_atomic_state and then save + it into dev_priv, but never actually use it from there. This is + left-over from some early ILK-style watermark programming designs that + got changed over time. + + Signed-off-by: Matt Roper <matthew.d.roper@intel.com> + Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> + Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 3 --- + drivers/gpu/drm/i915/intel_display.c | 31 ------------------------------- + drivers/gpu/drm/i915/intel_drv.h | 1 - + 3 files changed, 35 deletions(-) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index 67c76b6..59092cb 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1973,9 +1973,6 @@ struct drm_i915_private { + */ + uint16_t skl_latency[8]; + +- /* Committed wm config */ +- struct intel_wm_config config; +- + /* + * The skl_wm_values structure is a bit too big for stack + * allocation, so we keep the staging struct where we store +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 1726ea4..f5eefb1 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13226,35 +13226,6 @@ static int calc_watermark_data(struct drm_atomic_state *state) + { + struct drm_device *dev = state->dev; + struct drm_i915_private *dev_priv = to_i915(dev); +- struct intel_atomic_state *intel_state = to_intel_atomic_state(state); +- struct drm_crtc *crtc; +- struct drm_crtc_state *cstate; +- struct drm_plane *plane; +- struct drm_plane_state *pstate; +- +- /* +- * Calculate watermark configuration details now that derived +- * plane/crtc state is all properly updated. +- */ +- drm_for_each_crtc(crtc, dev) { +- cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?: +- crtc->state; +- +- if (cstate->active) +- intel_state->wm_config.num_pipes_active++; +- } +- drm_for_each_legacy_plane(plane, dev) { +- pstate = drm_atomic_get_existing_plane_state(state, plane) ?: +- plane->state; +- +- if (!to_intel_plane_state(pstate)->visible) +- continue; +- +- intel_state->wm_config.sprites_enabled = true; +- if (pstate->crtc_w != pstate->src_w >> 16 || +- pstate->crtc_h != pstate->src_h >> 16) +- intel_state->wm_config.sprites_scaled = true; +- } + + /* Is there platform-specific watermark information to calculate? */ + if (dev_priv->display.compute_global_watermarks) +@@ -13520,7 +13491,6 @@ static int intel_atomic_commit(struct drm_device *dev, + } + + drm_atomic_helper_swap_state(dev, state); +- dev_priv->wm.config = to_intel_atomic_state(state)->wm_config; + dev_priv->wm.distrust_bios_wm = false; + dev_priv->wm.skl_results = intel_state->wm_results; + +@@ -15334,7 +15304,6 @@ retry: + } + + /* Write calculated watermark values back */ +- to_i915(dev)->wm.config = to_intel_atomic_state(state)->wm_config; + for_each_crtc_in_state(state, crtc, cstate, i) { + struct intel_crtc_state *cs = to_intel_crtc_state(cstate); + +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index e5543b8..148f79d 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -270,7 +270,6 @@ struct intel_atomic_state { + unsigned int min_pixclk[I915_MAX_PIPES]; + + struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS]; +- struct intel_wm_config wm_config; + + /* Gen9+ only */ + struct skl_wm_values wm_results; +-- +2.7.4 + diff --git a/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch b/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch deleted file mode 100644 index cff3d3339..000000000 --- a/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch +++ /dev/null @@ -1,101 +0,0 @@ -From patchwork Wed Jan 27 15:08:19 2016 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] ARM: mvebu: change order of ethernet DT nodes on Armada 38x -From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> -X-Patchwork-Id: 8134751 -Message-Id: <1453907300-28283-2-git-send-email-thomas.petazzoni@free-electrons.com> -To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, - Gregory Clement <gregory.clement@free-electrons.com> -Cc: Nadav Haklai <nadavh@marvell.com>, Lior Amsalem <alior@marvell.com>, - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, - linux-arm-kernel@lists.infradead.org -Date: Wed, 27 Jan 2016 16:08:19 +0100 - -On Armada 38x, the available network interfaces are: - - - port 0, at 0x70000 - - port 1, at 0x30000 - - port 2, at 0x34000 - -Due to the rule saying that DT nodes should be ordered by register -addresses, the network interfaces are probed in this order: - - - port 1, at 0x30000, which gets named eth0 - - port 2, at 0x34000, which gets named eth1 - - port 0, at 0x70000, which gets named eth2 - -(if all three ports are enabled at the board level) - -Unfortunately, the network subsystem doesn't provide any way to rename -network interfaces from the kernel (it can only be done from -userspace). So, the default naming of the network interfaces is very -confusing as it doesn't match the datasheet, nor the naming of the -interfaces in the bootloader, nor the naming of the interfaces on -labels printed on the board. - -For example, on the Armada 388 GP, the board has two ports, labelled -GE0 and GE1. One has to know that GE0 is eth1 and GE1 is eth0, which -isn't really obvious. - -In order to solve this, this patch proposes to exceptionaly violate -the rule of "order DT nodes by register address", and put the 0x70000 -node before the 0x30000 node, so that network interfaces get named in -a more natural way. - -Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> - ---- -arch/arm/boot/dts/armada-38x.dtsi | 30 +++++++++++++++++++++--------- - 1 file changed, 21 insertions(+), 9 deletions(-) - -diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi -index e8b7f67..b50784d 100644 ---- a/arch/arm/boot/dts/armada-38x.dtsi -+++ b/arch/arm/boot/dts/armada-38x.dtsi -@@ -429,6 +429,27 @@ - reg = <0x22000 0x1000>; - }; - -+ /* -+ * As a special exception to the "order by -+ * register address" rule, the eth0 node is -+ * placed here to ensure that it gets -+ * registered as the first interface, since -+ * the network subsystem doesn't allow naming -+ * interfaces using DT aliases. Without this, -+ * the ordering of interfaces is different -+ * from the one used in U-Boot and the -+ * labeling of interfaces on the boards, which -+ * is very confusing for users. -+ */ -+ eth0: ethernet@70000 { -+ compatible = "marvell,armada-370-neta"; -+ reg = <0x70000 0x4000>; -+ interrupts-extended = <&mpic 8>; -+ clocks = <&gateclk 4>; -+ tx-csum-limit = <9800>; -+ status = "disabled"; -+ }; -+ - eth1: ethernet@30000 { - compatible = "marvell,armada-370-neta"; - reg = <0x30000 0x4000>; -@@ -493,15 +514,6 @@ - }; - }; - -- eth0: ethernet@70000 { -- compatible = "marvell,armada-370-neta"; -- reg = <0x70000 0x4000>; -- interrupts-extended = <&mpic 8>; -- clocks = <&gateclk 4>; -- tx-csum-limit = <9800>; -- status = "disabled"; -- }; -- - mdio: mdio@72004 { - #address-cells = <1>; - #size-cells = <0>; diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch index 35f170abb..4bdea30ae 100644 --- a/Add-EFI-signature-data-types.patch +++ b/Add-EFI-signature-data-types.patch @@ -1,7 +1,7 @@ -From 47f6b5c281137394d627e275cb80980492d00d84 Mon Sep 17 00:00:00 2001 +From 24ceffbbe2764a31328e1146a2cf4bdcf85664e7 Mon Sep 17 00:00:00 2001 From: Dave Howells <dhowells@redhat.com> Date: Tue, 23 Oct 2012 09:30:54 -0400 -Subject: [PATCH 15/20] Add EFI signature data types +Subject: [PATCH] Add EFI signature data types Add the data types that are used for containing hashes, keys and certificates for cryptographic verification. @@ -15,12 +15,12 @@ Signed-off-by: David Howells <dhowells@redhat.com> 1 file changed, 20 insertions(+) diff --git a/include/linux/efi.h b/include/linux/efi.h -index 4dc970e..82d6218 100644 +index 333d0ca6940f..b3efb6d06344 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -599,6 +599,12 @@ void efi_native_runtime_setup(void); - #define EFI_PROPERTIES_TABLE_GUID \ - EFI_GUID( 0x880aaca3, 0x4adc, 0x4a04, 0x90, 0x79, 0xb7, 0x47, 0x34, 0x08, 0x25, 0xe5 ) +@@ -603,6 +603,12 @@ void efi_native_runtime_setup(void); + EFI_GUID(0x3152bca5, 0xeade, 0x433d, \ + 0x86, 0x2e, 0xc0, 0x1c, 0xdc, 0x29, 0x1f, 0x44) +#define EFI_CERT_SHA256_GUID \ + EFI_GUID( 0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 ) @@ -31,7 +31,7 @@ index 4dc970e..82d6218 100644 typedef struct { efi_guid_t guid; u64 table; -@@ -823,6 +829,20 @@ typedef struct { +@@ -827,6 +833,20 @@ typedef struct { #define EFI_INVALID_TABLE_ADDR (~0UL) diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch index 06ddd1596..86a285581 100644 --- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch +++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch @@ -36,10 +36,9 @@ diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile index cd1406f9b14a..d9db380bbe53 100644 --- a/crypto/asymmetric_keys/Makefile +++ b/crypto/asymmetric_keys/Makefile -@@ -8,6 +8,7 @@ asymmetric_keys-y := asymmetric_type.o signature.o +@@ -7,5 +7,6 @@ asymmetric_keys-y := asymmetric_type.o signature.o obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o - obj-$(CONFIG_PUBLIC_KEY_ALGO_RSA) += rsa.o +obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o # diff --git a/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch b/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch deleted file mode 100644 index b1a789e84..000000000 --- a/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 954d6154959c8c196fa4b89fc98a4fb377c6a38d Mon Sep 17 00:00:00 2001 -From: Benjamin Tissoires <benjamin.tissoires@redhat.com> -Date: Fri, 8 Jan 2016 17:58:49 +0100 -Subject: [PATCH] HID: sony: do not bail out when the sixaxis refuses the - output report - -When setting the operational mode, some third party (Speedlink Strike-FX) -gamepads refuse the output report. Failing here means we refuse to -initialize the gamepad while this should be harmless. - -The weird part is that the initial commit that added this: a7de9b8 -("HID: sony: Enable Gasia third-party PS3 controllers") mentions this -very same controller as one requiring this output report. -Anyway, it's broken for one user at least, so let's change it. -We will report an error, but at least the controller should work. - -And no, these devices present themselves as legacy Sony controllers -(VID:PID of 054C:0268, as in the official ones) so there are no ways -of discriminating them from the official ones. - -https://bugzilla.redhat.com/show_bug.cgi?id=1255325 - -Reported-and-tested-by: Max Fedotov <thesourcehim@gmail.com> -Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> -Signed-off-by: Jiri Kosina <jkosina@suse.cz> ---- - drivers/hid/hid-sony.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c -index 661f94f8ab8b..11f91c0c2458 100644 ---- a/drivers/hid/hid-sony.c -+++ b/drivers/hid/hid-sony.c -@@ -1411,8 +1411,10 @@ static int sixaxis_set_operational_usb(struct hid_device *hdev) - } - - ret = hid_hw_output_report(hdev, buf, 1); -- if (ret < 0) -- hid_err(hdev, "can't set operational mode: step 3\n"); -+ if (ret < 0) { -+ hid_info(hdev, "can't set operational mode: step 3, ignoring\n"); -+ ret = 0; -+ } - - out: - kfree(buf); --- -2.5.0 - diff --git a/Initial-AllWinner-A64-and-PINE64-support.patch b/Initial-AllWinner-A64-and-PINE64-support.patch index d21cbc1ca..966275a8f 100644 --- a/Initial-AllWinner-A64-and-PINE64-support.patch +++ b/Initial-AllWinner-A64-and-PINE64-support.patch @@ -6,7 +6,6 @@ Subject: [PATCH] Initial AllWinner A64 and PINE64 support --- Documentation/devicetree/bindings/arm/sunxi.txt | 1 + Documentation/devicetree/bindings/clock/sunxi.txt | 7 + - .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 18 +- arch/arm/mach-sunxi/Kconfig | 7 + @@ -23,10 +22,6 @@ Subject: [PATCH] Initial AllWinner A64 and PINE64 support drivers/clk/sunxi/clk-multi-gates.c | 105 ++++ drivers/clk/sunxi/clk-sunxi.c | 4 +- drivers/crypto/Kconfig | 2 +- - drivers/pinctrl/sunxi/Kconfig | 4 + - drivers/pinctrl/sunxi/Makefile | 1 + - drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 602 ++++++++++++++++++++ - drivers/rtc/Kconfig | 7 +- 23 files changed, 1582 insertions(+), 16 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/Makefile create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi @@ -41,7 +36,7 @@ index bb9b0faa..8b39d2b 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.txt +++ b/Documentation/devicetree/bindings/arm/sunxi.txt @@ -13,3 +13,4 @@ using one of the following compatible strings: - allwinner,sun8i-a33 + allwinner,sun8i-a83t allwinner,sun8i-h3 allwinner,sun9i-a80 + allwinner,sun50i-a64 @@ -70,18 +65,6 @@ index e59f57b..8af12b5 100644 The "allwinner,*-mmc-clk" clocks have three different outputs: the main clock, with the ID 0, and the output and sample clocks, with the IDs 1 and 2, respectively. -diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt -index 9213b27..08b2361 100644 ---- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt -+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt -@@ -21,6 +21,7 @@ Required properties: - "allwinner,sun9i-a80-r-pinctrl" - "allwinner,sun8i-a83t-pinctrl" - "allwinner,sun8i-h3-pinctrl" -+ "allwinner,sun50i-a64-pinctrl" - - - reg: Should contain the register physical address and length for the - pin controller. diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 72e2c5a..0c22fa9 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -181,11 +164,11 @@ diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index f832b8a..3b7428a 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile -@@ -1,3 +1,4 @@ +@@ -2,3 +2,4 @@ + dts-dirs += al +dts-dirs += allwinner dts-dirs += altera dts-dirs += amd - dts-dirs += apm diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile new file mode 100644 index 0000000..1e29a5a @@ -1073,8 +1056,8 @@ index 171085a..cc89d1f 100644 --- a/drivers/clk/sunxi/clk-factors.h +++ b/drivers/clk/sunxi/clk-factors.h @@ -26,6 +26,7 @@ struct factors_data { - struct clk_factors_config *table; - void (*getter) (u32 *rate, u32 parent_rate, u8 *n, u8 *k, u8 *m, u8 *p); + void (*getter)(struct factors_request *req); + void (*recalc)(struct factors_request *req); const char *name; + int name_idx; }; @@ -1212,671 +1195,6 @@ index 5ba2188..ca59458 100644 }; static const struct factors_data sun5i_a13_ahb_data __initconst = { -diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig -index 07d4942..737200f 100644 ---- a/drivers/crypto/Kconfig -+++ b/drivers/crypto/Kconfig -@@ -487,7 +487,7 @@ config CRYPTO_DEV_IMGTEC_HASH - - config CRYPTO_DEV_SUN4I_SS - tristate "Support for Allwinner Security System cryptographic accelerator" -- depends on ARCH_SUNXI -+ depends on ARCH_SUNXI && !64BIT - select CRYPTO_MD5 - select CRYPTO_SHA1 - select CRYPTO_AES -diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig -index f8dbc8b..c1f970f 100644 ---- a/drivers/pinctrl/sunxi/Kconfig -+++ b/drivers/pinctrl/sunxi/Kconfig -@@ -64,4 +64,8 @@ config PINCTRL_SUN9I_A80_R - depends on RESET_CONTROLLER - select PINCTRL_SUNXI_COMMON - -+config PINCTRL_SUN50I_A64 -+ bool -+ select PINCTRL_SUNXI_COMMON -+ - endif -diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile -index ef82f22..0ca7681 100644 ---- a/drivers/pinctrl/sunxi/Makefile -+++ b/drivers/pinctrl/sunxi/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_SUN7I_A20) += pinctrl-sun7i-a20.o - obj-$(CONFIG_PINCTRL_SUN8I_A23) += pinctrl-sun8i-a23.o - obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o - obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o -+obj-$(CONFIG_PINCTRL_SUN50I_A64) += pinctrl-sun50i-a64.o - obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o - obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o - obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o -diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c -new file mode 100644 -index 0000000..a53cc23 ---- /dev/null -+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c -@@ -0,0 +1,602 @@ -+/* -+ * Allwinner A64 SoCs pinctrl driver. -+ * -+ * Copyright (C) 2016 - ARM Ltd. -+ * Author: Andre Przywara <andre.przywara@arm.com> -+ * -+ * Based on pinctrl-sun7i-a20.c, which is: -+ * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com> -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/of.h> -+#include <linux/of_device.h> -+#include <linux/pinctrl/pinctrl.h> -+ -+#include "pinctrl-sunxi.h" -+ -+static const struct sunxi_desc_pin a64_pins[] = { -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart2"), /* TX */ -+ SUNXI_FUNCTION(0x4, "jtag"), /* MS0 */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* EINT0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart2"), /* RX */ -+ SUNXI_FUNCTION(0x4, "jtag"), /* CK0 */ -+ SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* EINT1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ -+ SUNXI_FUNCTION(0x4, "jtag"), /* DO0 */ -+ SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* EINT2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ -+ SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */ -+ SUNXI_FUNCTION(0x4, "jtag"), /* DI0 */ -+ SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* EINT3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif2"), /* SYNC */ -+ SUNXI_FUNCTION(0x3, "i2s0"), /* SYNC */ -+ SUNXI_FUNCTION(0x5, "sim"), /* CLK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* EINT4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif2"), /* BCLK */ -+ SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */ -+ SUNXI_FUNCTION(0x5, "sim"), /* DATA */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* EINT5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif2"), /* DOUT */ -+ SUNXI_FUNCTION(0x3, "i2s0"), /* DOUT */ -+ SUNXI_FUNCTION(0x5, "sim"), /* RST */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* EINT6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif2"), /* DIN */ -+ SUNXI_FUNCTION(0x3, "i2s0"), /* DIN */ -+ SUNXI_FUNCTION(0x5, "sim"), /* DET */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* EINT7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x4, "uart0"), /* TX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* EINT8 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x4, "uart0"), /* RX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* EINT9 */ -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ -+ SUNXI_FUNCTION(0x4, "spi0")), /* MOSI */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ -+ SUNXI_FUNCTION(0x3, "mmc2"), /* DS */ -+ SUNXI_FUNCTION(0x4, "spi0")), /* MISO */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ -+ SUNXI_FUNCTION(0x4, "spi0")), /* SCK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */ -+ SUNXI_FUNCTION(0x4, "spi0")), /* CS */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0")), /* NRB1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ -+ SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ -+ SUNXI_FUNCTION(0x3, "uart3"), /* TX */ -+ SUNXI_FUNCTION(0x4, "spi1"), /* CS */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* CLK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ -+ SUNXI_FUNCTION(0x3, "uart3"), /* RX */ -+ SUNXI_FUNCTION(0x4, "spi1"), /* CLK */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* DE */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ -+ SUNXI_FUNCTION(0x3, "uart4"), /* TX */ -+ SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* HSYNC */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ -+ SUNXI_FUNCTION(0x3, "uart4"), /* RX */ -+ SUNXI_FUNCTION(0x4, "spi1"), /* MISO */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* VSYNC */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ -+ SUNXI_FUNCTION(0x3, "uart4"), /* RTS */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ -+ SUNXI_FUNCTION(0x3, "uart4"), /* CTS */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ -+ SUNXI_FUNCTION(0x4, "emac"), /* ERXD3 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ -+ SUNXI_FUNCTION(0x4, "emac"), /* ERXD2 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ERXD1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ERXD0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ERXCK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ERXCTL */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ENULL */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */ -+ SUNXI_FUNCTION(0x4, "emac"), /* ETXD3 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */ -+ SUNXI_FUNCTION(0x4, "emac"), /* ETXD2 */ -+ SUNXI_FUNCTION(0x5, "ccir")), /* D7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ETXD1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VPC */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ETXD0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VNC */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ETXCK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VP3 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ETXCTL */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ -+ SUNXI_FUNCTION(0x3, "lvds0"), /* VN3 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* ECLKIN */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */ -+ SUNXI_FUNCTION(0x4, "emac")), /* EMDC */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x4, "emac")), /* EMDIO */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out")), -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* PCK */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* CLK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* CK */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* ERR */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* HSYNC */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* SYNC */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* VSYNC */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* DVLD */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D0 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D1 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D2 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D3 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D4 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D5 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D6 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0"), /* D7 */ -+ SUNXI_FUNCTION(0x4, "ts0")), /* D7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0")), /* SCK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "csi0")), /* SDA */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "pll"), /* LOCK_DBG */ -+ SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out")), -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out")), -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ -+ SUNXI_FUNCTION(0x3, "jtag")), /* MSI */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ -+ SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ -+ SUNXI_FUNCTION(0x3, "uart0")), /* TX */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ -+ SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ -+ SUNXI_FUNCTION(0x4, "uart0")), /* RX */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ -+ SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out")), -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* EINT0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* EINT1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* EINT2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* EINT3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* EINT4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* EINT5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart1"), /* TX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* EINT6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart1"), /* RX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* EINT7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* EINT8 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* EINT9 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif3"), /* SYNC */ -+ SUNXI_FUNCTION(0x3, "i2s1"), /* SYNC */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* EINT10 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif3"), /* BCLK */ -+ SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* EINT11 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif3"), /* DOUT */ -+ SUNXI_FUNCTION(0x3, "i2s1"), /* DOUT */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* EINT12 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "aif3"), /* DIN */ -+ SUNXI_FUNCTION(0x3, "i2s1"), /* DIN */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* EINT13 */ -+ /* Hole */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* EINT0 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* EINT1 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* EINT2 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* EINT3 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart3"), /* TX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* EINT4 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart3"), /* RX */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* EINT5 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart3"), /* RTS */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* EINT6 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "uart3"), /* CTS */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* EINT7 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "spdif"), /* OUT */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* EINT8 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* EINT9 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mic"), /* CLK */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* EINT10 */ -+ SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), -+ SUNXI_FUNCTION(0x0, "gpio_in"), -+ SUNXI_FUNCTION(0x1, "gpio_out"), -+ SUNXI_FUNCTION(0x2, "mic"), /* DATA */ -+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* EINT11 */ -+}; -+ -+static const struct sunxi_pinctrl_desc a64_pinctrl_data = { -+ .pins = a64_pins, -+ .npins = ARRAY_SIZE(a64_pins), -+ .irq_banks = 3, -+}; -+ -+static int a64_pinctrl_probe(struct platform_device *pdev) -+{ -+ return sunxi_pinctrl_init(pdev, -+ &a64_pinctrl_data); -+} -+ -+static const struct of_device_id a64_pinctrl_match[] = { -+ { .compatible = "allwinner,sun50i-a64-pinctrl", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, a64_pinctrl_match); -+ -+static struct platform_driver a64_pinctrl_driver = { -+ .probe = a64_pinctrl_probe, -+ .driver = { -+ .name = "sun50i-a64-pinctrl", -+ .of_match_table = a64_pinctrl_match, -+ }, -+}; -+builtin_platform_driver(a64_pinctrl_driver); -diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig -index 376322f..526eaf4 100644 ---- a/drivers/rtc/Kconfig -+++ b/drivers/rtc/Kconfig -@@ -1360,10 +1360,11 @@ config RTC_DRV_SUN4V - - config RTC_DRV_SUN6I - tristate "Allwinner A31 RTC" -- depends on MACH_SUN6I || MACH_SUN8I -+ default MACH_SUN6I || MACH_SUN8I -+ depends on ARCH_SUNXI - help -- If you say Y here you will get support for the RTC found on -- Allwinner A31. -+ If you say Y here you will get support for the RTC found in -+ some Allwinner SoCs like the A31 or the A64. - - config RTC_DRV_SUNXI - tristate "Allwinner sun4i/sun7i RTC" -- 2.5.0 diff --git a/KEYS-Fix-ASN.1-indefinite-length-object-parsing.patch b/KEYS-Fix-ASN.1-indefinite-length-object-parsing.patch deleted file mode 100644 index 957de0977..000000000 --- a/KEYS-Fix-ASN.1-indefinite-length-object-parsing.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 23c8a812dc3c621009e4f0e5342aa4e2ede1ceaa Mon Sep 17 00:00:00 2001 -From: David Howells <dhowells@redhat.com> -Date: Tue, 23 Feb 2016 11:03:12 +0000 -Subject: [PATCH] KEYS: Fix ASN.1 indefinite length object parsing - -This fixes CVE-2016-0758. - -In the ASN.1 decoder, when the length field of an ASN.1 value is extracted, -it isn't validated against the remaining amount of data before being added -to the cursor. With a sufficiently large size indicated, the check: - - datalen - dp < 2 - -may then fail due to integer overflow. - -Fix this by checking the length indicated against the amount of remaining -data in both places a definite length is determined. - -Whilst we're at it, make the following changes: - - (1) Check the maximum size of extended length does not exceed the capacity - of the variable it's being stored in (len) rather than the type that - variable is assumed to be (size_t). - - (2) Compare the EOC tag to the symbolic constant ASN1_EOC rather than the - integer 0. - - (3) To reduce confusion, move the initialisation of len outside of: - - for (len = 0; n > 0; n--) { - - since it doesn't have anything to do with the loop counter n. - -Signed-off-by: David Howells <dhowells@redhat.com> -Reviewed-by: Mimi Zohar <zohar@linux.vnet.ibm.com> -Acked-by: David Woodhouse <David.Woodhouse@intel.com> -Acked-by: Peter Jones <pjones@redhat.com> ---- - lib/asn1_decoder.c | 16 +++++++++------- - 1 file changed, 9 insertions(+), 7 deletions(-) - -diff --git a/lib/asn1_decoder.c b/lib/asn1_decoder.c -index 2b3f46c049d4..554522934c44 100644 ---- a/lib/asn1_decoder.c -+++ b/lib/asn1_decoder.c -@@ -74,7 +74,7 @@ next_tag: - - /* Extract a tag from the data */ - tag = data[dp++]; -- if (tag == 0) { -+ if (tag == ASN1_EOC) { - /* It appears to be an EOC. */ - if (data[dp++] != 0) - goto invalid_eoc; -@@ -96,10 +96,8 @@ next_tag: - - /* Extract the length */ - len = data[dp++]; -- if (len <= 0x7f) { -- dp += len; -- goto next_tag; -- } -+ if (len <= 0x7f) -+ goto check_length; - - if (unlikely(len == ASN1_INDEFINITE_LENGTH)) { - /* Indefinite length */ -@@ -110,14 +108,18 @@ next_tag: - } - - n = len - 0x80; -- if (unlikely(n > sizeof(size_t) - 1)) -+ if (unlikely(n > sizeof(len) - 1)) - goto length_too_long; - if (unlikely(n > datalen - dp)) - goto data_overrun_error; -- for (len = 0; n > 0; n--) { -+ len = 0; -+ for (; n > 0; n--) { - len <<= 8; - len |= data[dp++]; - } -+check_length: -+ if (len > datalen - dp) -+ goto data_overrun_error; - dp += len; - goto next_tag; - --- -2.5.5 - diff --git a/KEYS-potential-uninitialized-variable.patch b/KEYS-potential-uninitialized-variable.patch new file mode 100644 index 000000000..23cabbb2e --- /dev/null +++ b/KEYS-potential-uninitialized-variable.patch @@ -0,0 +1,30 @@ +From 82a50018782f84e733e718d4b24e1653d19333be Mon Sep 17 00:00:00 2001 +From: Dan Carpenter <dan.carpenter@oracle.com> +Date: Wed, 15 Jun 2016 09:31:45 -0400 +Subject: [PATCH] KEYS: potential uninitialized variable + +If __key_link_begin() failed then "edit" would be uninitialized. I've +added a check to fix that. + +Fixes: f70e2e06196a ('KEYS: Do preallocation for __key_link()') +Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> +--- + security/keys/key.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/security/keys/key.c b/security/keys/key.c +index bd5a272f28a6..346fbf201c22 100644 +--- a/security/keys/key.c ++++ b/security/keys/key.c +@@ -597,7 +597,7 @@ int key_reject_and_link(struct key *key, + + mutex_unlock(&key_construction_mutex); + +- if (keyring) ++ if (keyring && link_ret == 0) + __key_link_end(keyring, &key->index_key, edit); + + /* wake up anyone waiting for a key to be constructed */ +-- +2.5.5 + diff --git a/arm-i.MX6-Utilite-device-dtb.patch b/arm-i.MX6-Utilite-device-dtb.patch index 1b98493b2..2476e17cc 100644 --- a/arm-i.MX6-Utilite-device-dtb.patch +++ b/arm-i.MX6-Utilite-device-dtb.patch @@ -1,6 +1,6 @@ -From 6809645a740693c8c7fe1f86e396ae4c0cdac9ff Mon Sep 17 00:00:00 2001 +From f7393b8c390f3a082224d1d73395c3536ef9f6a0 Mon Sep 17 00:00:00 2001 From: Peter Robinson <pbrobinson@gmail.com> -Date: Sun, 29 May 2016 11:34:51 +0100 +Date: Mon, 30 May 2016 16:41:37 +0100 Subject: [PATCH] arm: i.MX6 Utilite device dtb --- @@ -11,17 +11,17 @@ Subject: [PATCH] arm: i.MX6 Utilite device dtb create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index a4a6d70..90a85a2 100644 +index 95c1923..e6738f8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -348,6 +348,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ +@@ -362,6 +362,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-tx6q-1020-comtft.dtb \ imx6q-tx6q-1110.dtb \ imx6q-udoo.dtb \ + imx6q-utilite-pro.dtb \ imx6q-wandboard.dtb \ - imx6q-wandboard-revb1.dtb - dtb-$(CONFIG_SOC_IMX6SL) += \ + imx6q-wandboard-revb1.dtb \ + imx6qp-sabreauto.dtb \ diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts index 99b46f8..f4fc22e 100644 --- a/arch/arm/boot/dts/imx6q-cm-fx6.dts diff --git a/arm64-avoid-needing-console-to-enable-serial-console.patch b/arm64-avoid-needing-console-to-enable-serial-console.patch index e8cc7bbe0..3c639a0a3 100644 --- a/arm64-avoid-needing-console-to-enable-serial-console.patch +++ b/arm64-avoid-needing-console-to-enable-serial-console.patch @@ -1,4 +1,4 @@ -From ede02df9a481ba07348e6fd4393ba2e273ef16d8 Mon Sep 17 00:00:00 2001 +From ce7a9e482dcf66d155e74b39ada1708cf6d9cb25 Mon Sep 17 00:00:00 2001 From: Mark Salter <msalter@redhat.com> Date: Wed, 25 Mar 2015 14:17:50 -0400 Subject: [PATCH] arm64: avoid needing console= to enable serial console @@ -11,17 +11,17 @@ firmware. Signed-off-by: Mark Salter <msalter@redhat.com> --- - arch/arm64/kernel/setup.c | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) + arch/arm64/kernel/setup.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c -index 8119479..ea9ff80 100644 +index 9dc67769b6a4..dfac33b47423 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c -@@ -381,3 +381,22 @@ static int __init topology_init(void) +@@ -417,3 +417,22 @@ static int __init register_kernel_offset_dumper(void) return 0; } - subsys_initcall(topology_init); + __initcall(register_kernel_offset_dumper); + +/* + * Temporary hack to avoid need for console= on command line diff --git a/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch b/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch deleted file mode 100644 index 092e7206a..000000000 --- a/bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch +++ /dev/null @@ -1,3526 +0,0 @@ -From 735f01326873349426f041a4fa2f5703a1ed43a4 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 5 Feb 2016 15:06:15 -0800 -Subject: [PATCH 01/36] drm/vc4: Fix a framebuffer reference leak on async flip - interrupt. - -We'd need X to queue up an async pageflip while another is -outstanding, and then take a SIGIO. I think X actually avoids sending -out the next pageflip while one's already queued, but I'm not sure. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 018145e..989ee72 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -544,6 +544,7 @@ static int vc4_async_page_flip(struct drm_crtc *crtc, - /* Make sure all other async modesetes have landed. */ - ret = down_interruptible(&vc4->async_modeset); - if (ret) { -+ drm_framebuffer_unreference(fb); - kfree(flip_state); - return ret; - } --- -2.7.3 - -From e1ceac2cefbda12d1d9d9ee547fc0cc8bfeebde6 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 12 Feb 2016 14:15:14 -0800 -Subject: [PATCH 02/36] drm/vc4: Bring HDMI up from power off if necessary. - -If the firmware hadn't brought up HDMI for us, we need to do its -power-on reset sequence (reset HD and and clear its STANDBY bits, -reset HDMI, and leave the PHY disabled). - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++- - drivers/gpu/drm/vc4/vc4_regs.h | 2 ++ - 2 files changed, 30 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index c69c046..6e55760 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -495,6 +495,16 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - goto err_put_i2c; - } - -+ /* This is the rate that is set by the firmware. The number -+ * needs to be a bit higher than the pixel clock rate -+ * (generally 148.5Mhz). -+ */ -+ ret = clk_set_rate(hdmi->hsm_clock, 163682864); -+ if (ret) { -+ DRM_ERROR("Failed to set HSM clock rate: %d\n", ret); -+ goto err_unprepare_pix; -+ } -+ - ret = clk_prepare_enable(hdmi->hsm_clock); - if (ret) { - DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n", -@@ -516,7 +526,24 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - vc4->hdmi = hdmi; - - /* HDMI core must be enabled. */ -- WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0); -+ if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) { -+ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST); -+ udelay(1); -+ HD_WRITE(VC4_HD_M_CTL, 0); -+ -+ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE); -+ -+ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, -+ VC4_HDMI_SW_RESET_HDMI | -+ VC4_HDMI_SW_RESET_FORMAT_DETECT); -+ -+ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, 0); -+ -+ /* PHY should be in reset, like -+ * vc4_hdmi_encoder_disable() does. -+ */ -+ HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16); -+ } - - drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs, - DRM_MODE_ENCODER_TMDS, NULL); -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 4e52a0a..85c36d2 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -456,6 +456,8 @@ - #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 - - #define VC4_HD_M_CTL 0x00c -+# define VC4_HD_M_REGISTER_FILE_STANDBY (3 << 6) -+# define VC4_HD_M_RAM_STANDBY (3 << 4) - # define VC4_HD_M_SW_RST BIT(2) - # define VC4_HD_M_ENABLE BIT(0) - --- -2.7.3 - -From 63d38d99739736480b24c9f9bd7880ce4e49eb0c Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 12 Feb 2016 15:16:56 -0800 -Subject: [PATCH 03/36] drm/vc4: Add another reg to HDMI debug dumping. - -This is also involved in the HDMI setup sequence so it's nice to see -it. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 6e55760..56272ca 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -95,6 +95,7 @@ static const struct { - HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), - HDMI_REG(VC4_HDMI_HOTPLUG_INT), - HDMI_REG(VC4_HDMI_HOTPLUG), -+ HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_HORZA), - HDMI_REG(VC4_HDMI_HORZB), - HDMI_REG(VC4_HDMI_FIFO_CTL), --- -2.7.3 - -From 46e96facb9b67486285c26f88ee747b8d9f4abc9 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 15 Feb 2016 17:06:02 -0800 -Subject: [PATCH 04/36] drm/vc4: Fix the name of the VSYNCD_EVEN register. - -It's used for delaying vsync in interlaced mode. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- - drivers/gpu/drm/vc4/vc4_regs.h | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 989ee72..5e84be2 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -83,7 +83,7 @@ static const struct { - } crtc_regs[] = { - CRTC_REG(PV_CONTROL), - CRTC_REG(PV_V_CONTROL), -- CRTC_REG(PV_VSYNCD), -+ CRTC_REG(PV_VSYNCD_EVEN), - CRTC_REG(PV_HORZA), - CRTC_REG(PV_HORZB), - CRTC_REG(PV_VERTA), -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 85c36d2..d529665 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -187,7 +187,7 @@ - # define PV_VCONTROL_CONTINUOUS BIT(1) - # define PV_VCONTROL_VIDEN BIT(0) - --#define PV_VSYNCD 0x08 -+#define PV_VSYNCD_EVEN 0x08 - - #define PV_HORZA 0x0c - # define PV_HORZA_HBP_MASK VC4_MASK(31, 16) --- -2.7.3 - -From baff41935a7b4c1b6015a99a0ca222fd0a5552b9 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 15 Feb 2016 17:31:41 -0800 -Subject: [PATCH 05/36] drm/vc4: Fix setting of vertical timings in the CRTC. - -It looks like when I went to add the interlaced bits, I just took the -existing PV_VERT* block and indented it, instead of copy and pasting -it first. Without this, changing resolution never worked. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 5e84be2..93d53c2 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -212,6 +212,16 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) - PV_HORZB_HFP) | - VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE)); - -+ CRTC_WRITE(PV_VERTA, -+ VC4_SET_FIELD(mode->vtotal - mode->vsync_end, -+ PV_VERTA_VBP) | -+ VC4_SET_FIELD(mode->vsync_end - mode->vsync_start, -+ PV_VERTA_VSYNC)); -+ CRTC_WRITE(PV_VERTB, -+ VC4_SET_FIELD(mode->vsync_start - mode->vdisplay, -+ PV_VERTB_VFP) | -+ VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE)); -+ - if (interlace) { - CRTC_WRITE(PV_VERTA_EVEN, - VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1, --- -2.7.3 - -From 6f7cde6ad6e866660b8e5607a213872e5f34e8fd Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Tue, 16 Feb 2016 10:24:08 -0800 -Subject: [PATCH 06/36] drm/vc4: Initialize scaler DISPBKGND on modeset. - -We weren't updating the interlaced bit, so we'd scan out incorrectly -if the firmware had brought up the TV encoder and we were switching to -HDMI. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 6 ++++++ - drivers/gpu/drm/vc4/vc4_regs.h | 14 ++++++++++++++ - 2 files changed, 20 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 93d53c2..6ae5abc 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -183,6 +183,8 @@ static int vc4_get_clock_select(struct drm_crtc *crtc) - - static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) - { -+ struct drm_device *dev = crtc->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); - struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); - struct drm_crtc_state *state = crtc->state; - struct drm_display_mode *mode = &state->adjusted_mode; -@@ -251,6 +253,10 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) - PV_CONTROL_FIFO_CLR | - PV_CONTROL_EN); - -+ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), -+ SCALER_DISPBKGND_AUTOHS | -+ (interlace ? SCALER_DISPBKGND_INTERLACE : 0)); -+ - if (debug_dump_regs) { - DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc)); - vc4_crtc_dump_regs(vc4_crtc); -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index d529665..7c29993 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -350,6 +350,17 @@ - # define SCALER_DISPCTRLX_HEIGHT_SHIFT 0 - - #define SCALER_DISPBKGND0 0x00000044 -+# define SCALER_DISPBKGND_AUTOHS BIT(31) -+# define SCALER_DISPBKGND_INTERLACE BIT(30) -+# define SCALER_DISPBKGND_GAMMA BIT(29) -+# define SCALER_DISPBKGND_TESTMODE_MASK VC4_MASK(28, 25) -+# define SCALER_DISPBKGND_TESTMODE_SHIFT 25 -+/* Enables filling the scaler line with the RGB value in the low 24 -+ * bits before compositing. Costs cycles, so should be skipped if -+ * opaque display planes will cover everything. -+ */ -+# define SCALER_DISPBKGND_FILL BIT(24) -+ - #define SCALER_DISPSTAT0 0x00000048 - #define SCALER_DISPBASE0 0x0000004c - # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30) -@@ -362,6 +373,9 @@ - # define SCALER_DISPSTATX_EMPTY BIT(28) - #define SCALER_DISPCTRL1 0x00000050 - #define SCALER_DISPBKGND1 0x00000054 -+#define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \ -+ (x) * (SCALER_DISPBKGND1 - \ -+ SCALER_DISPBKGND0)) - #define SCALER_DISPSTAT1 0x00000058 - #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \ - (x) * (SCALER_DISPSTAT1 - \ --- -2.7.3 - -From 449c91f1f06a573ad4a3edd18d7b493bf44478f6 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 28 Dec 2015 14:14:09 -0800 -Subject: [PATCH 07/36] drm/vc4: Improve comments on vc4_plane_state members. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 0addbad..45e353d 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -26,16 +26,19 @@ - - struct vc4_plane_state { - struct drm_plane_state base; -+ /* System memory copy of the display list for this element, computed -+ * at atomic_check time. -+ */ - u32 *dlist; -- u32 dlist_size; /* Number of dwords in allocated for the display list */ -+ u32 dlist_size; /* Number of dwords allocated for the display list */ - u32 dlist_count; /* Number of used dwords in the display list. */ - - /* Offset in the dlist to pointer word 0. */ - u32 pw0_offset; - - /* Offset where the plane's dlist was last stored in the -- hardware at vc4_crtc_atomic_flush() time. -- */ -+ * hardware at vc4_crtc_atomic_flush() time. -+ */ - u32 *hw_dlist; - }; - --- -2.7.3 - -From 4c8b2ce80659e1c7a75b7b54430dab320aeb440b Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 28 Dec 2015 14:14:57 -0800 -Subject: [PATCH 08/36] drm/vc4: Add missing __iomem annotation to hw_dlist. - -This is the pointer to the HVS device's memory where we stored the -contents of *dlist. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 45e353d..ed07ee5 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -39,7 +39,7 @@ struct vc4_plane_state { - /* Offset where the plane's dlist was last stored in the - * hardware at vc4_crtc_atomic_flush() time. - */ -- u32 *hw_dlist; -+ u32 __iomem *hw_dlist; - }; - - static inline struct vc4_plane_state * --- -2.7.3 - -From f792f380190638916b495f3051547a849fc97fd2 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 28 Dec 2015 14:34:44 -0800 -Subject: [PATCH 09/36] drm/vc4: Move the plane clipping/scaling setup to a - separate function. - -As we add actual scaling, this is going to get way more complicated. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 78 +++++++++++++++++++++++++++-------------- - 1 file changed, 52 insertions(+), 26 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index ed07ee5..554ed54 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -40,6 +40,14 @@ struct vc4_plane_state { - * hardware at vc4_crtc_atomic_flush() time. - */ - u32 __iomem *hw_dlist; -+ -+ /* Clipped coordinates of the plane on the display. */ -+ int crtc_x, crtc_y, crtc_w, crtc_h; -+ -+ /* Offset to start scanning out from the start of the plane's -+ * BO. -+ */ -+ u32 offset; - }; - - static inline struct vc4_plane_state * -@@ -151,22 +159,17 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val) - vc4_state->dlist[vc4_state->dlist_count++] = val; - } - --/* Writes out a full display list for an active plane to the plane's -- * private dlist state. -- */ --static int vc4_plane_mode_set(struct drm_plane *plane, -- struct drm_plane_state *state) -+static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - { - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - struct drm_framebuffer *fb = state->fb; -- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); -- u32 ctl0_offset = vc4_state->dlist_count; -- const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format); -- uint32_t offset = fb->offsets[0]; -- int crtc_x = state->crtc_x; -- int crtc_y = state->crtc_y; -- int crtc_w = state->crtc_w; -- int crtc_h = state->crtc_h; -+ -+ vc4_state->offset = fb->offsets[0]; -+ -+ vc4_state->crtc_x = state->crtc_x; -+ vc4_state->crtc_y = state->crtc_y; -+ vc4_state->crtc_w = state->crtc_w; -+ vc4_state->crtc_h = state->crtc_h; - - if (state->crtc_w << 16 != state->src_w || - state->crtc_h << 16 != state->src_h) { -@@ -178,18 +181,41 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - return -EINVAL; - } - -- if (crtc_x < 0) { -- offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x; -- crtc_w += crtc_x; -- crtc_x = 0; -+ if (vc4_state->crtc_x < 0) { -+ vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format, -+ 0) * -+ -vc4_state->crtc_x); -+ vc4_state->crtc_w += vc4_state->crtc_x; -+ vc4_state->crtc_x = 0; - } - -- if (crtc_y < 0) { -- offset += fb->pitches[0] * -crtc_y; -- crtc_h += crtc_y; -- crtc_y = 0; -+ if (vc4_state->crtc_y < 0) { -+ vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y; -+ vc4_state->crtc_h += vc4_state->crtc_y; -+ vc4_state->crtc_y = 0; - } - -+ return 0; -+} -+ -+ -+/* Writes out a full display list for an active plane to the plane's -+ * private dlist state. -+ */ -+static int vc4_plane_mode_set(struct drm_plane *plane, -+ struct drm_plane_state *state) -+{ -+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); -+ struct drm_framebuffer *fb = state->fb; -+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); -+ u32 ctl0_offset = vc4_state->dlist_count; -+ const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format); -+ int ret; -+ -+ ret = vc4_plane_setup_clipping_and_scaling(state); -+ if (ret) -+ return ret; -+ - vc4_dlist_write(vc4_state, - SCALER_CTL0_VALID | - (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) | -@@ -199,8 +225,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - /* Position Word 0: Image Positions and Alpha Value */ - vc4_dlist_write(vc4_state, - VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) | -- VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) | -- VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y)); -+ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) | -+ VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y)); - - /* Position Word 1: Scaled Image Dimensions. - * Skipped due to SCALER_CTL0_UNITY scaling. -@@ -212,8 +238,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - SCALER_POS2_ALPHA_MODE_PIPELINE : - SCALER_POS2_ALPHA_MODE_FIXED, - SCALER_POS2_ALPHA_MODE) | -- VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) | -- VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT)); -+ VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) | -+ VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT)); - - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); -@@ -221,7 +247,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - vc4_state->pw0_offset = vc4_state->dlist_count; - - /* Pointer Word 0: RGB / Y Pointer */ -- vc4_dlist_write(vc4_state, bo->paddr + offset); -+ vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset); - - /* Pointer Context Word 0: Written by the HVS */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); --- -2.7.3 - -From 696f1db279f08e58bc94172818209d5914e0e2d8 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Wed, 30 Dec 2015 11:50:22 -0800 -Subject: [PATCH 10/36] drm/vc4: Add a proper short-circut path for legacy - cursor updates. - -Previously, on every modeset we would allocate new display list -memory, recompute changed planes, write all of them to the new memory, -and pointed scanout at the new list (which will latch approximately at -the next line of scanout). We let -drm_atomic_helper_wait_for_vblanks() decide whether we needed to wait -for a vblank after a modeset before cleaning up the old state and -letting the next modeset proceed, and on legacy cursor updates we -wouldn't wait. If you moved the cursor fast enough, we could -potentially wrap around the display list memory area and overwrite the -existing display list while it was still being scanned out, resulting -in the HVS scanning out garbage or just halting. - -Instead of making cursor updates wait for scanout to move to the new -display list area (which introduces significant cursor lag in X), we -just rewrite our current display list. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_kms.c | 9 ++++ - drivers/gpu/drm/vc4/vc4_plane.c | 94 ++++++++++++++++++++++++++++++++++++++--- - 2 files changed, 96 insertions(+), 7 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c -index f95f2df..4718ae5 100644 ---- a/drivers/gpu/drm/vc4/vc4_kms.c -+++ b/drivers/gpu/drm/vc4/vc4_kms.c -@@ -49,6 +49,15 @@ vc4_atomic_complete_commit(struct vc4_commit *c) - - drm_atomic_helper_commit_modeset_enables(dev, state); - -+ /* Make sure that drm_atomic_helper_wait_for_vblanks() -+ * actually waits for vblank. If we're doing a full atomic -+ * modeset (as opposed to a vc4_update_plane() short circuit), -+ * then we need to wait for scanout to be done with our -+ * display lists before we free it and potentially reallocate -+ * and overwrite the dlist memory with a new modeset. -+ */ -+ state->legacy_cursor_update = false; -+ - drm_atomic_helper_wait_for_vblanks(dev, state); - - drm_atomic_helper_cleanup_planes(dev, state); -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 554ed54..713ec00 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -33,8 +33,12 @@ struct vc4_plane_state { - u32 dlist_size; /* Number of dwords allocated for the display list */ - u32 dlist_count; /* Number of used dwords in the display list. */ - -- /* Offset in the dlist to pointer word 0. */ -- u32 pw0_offset; -+ /* Offset in the dlist to various words, for pageflip or -+ * cursor updates. -+ */ -+ u32 pos0_offset; -+ u32 pos2_offset; -+ u32 ptr0_offset; - - /* Offset where the plane's dlist was last stored in the - * hardware at vc4_crtc_atomic_flush() time. -@@ -223,6 +227,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - SCALER_CTL0_UNITY); - - /* Position Word 0: Image Positions and Alpha Value */ -+ vc4_state->pos0_offset = vc4_state->dlist_count; - vc4_dlist_write(vc4_state, - VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) | - VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) | -@@ -233,6 +238,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - */ - - /* Position Word 2: Source Image Size, Alpha Mode */ -+ vc4_state->pos2_offset = vc4_state->dlist_count; - vc4_dlist_write(vc4_state, - VC4_SET_FIELD(format->has_alpha ? - SCALER_POS2_ALPHA_MODE_PIPELINE : -@@ -244,9 +250,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - -- vc4_state->pw0_offset = vc4_state->dlist_count; -- - /* Pointer Word 0: RGB / Y Pointer */ -+ vc4_state->ptr0_offset = vc4_state->dlist_count; - vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset); - - /* Pointer Context Word 0: Written by the HVS */ -@@ -332,13 +337,13 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb) - * scanout will start from this address as soon as the FIFO - * needs to refill with pixels. - */ -- writel(addr, &vc4_state->hw_dlist[vc4_state->pw0_offset]); -+ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]); - - /* Also update the CPU-side dlist copy, so that any later - * atomic updates that don't do a new modeset on our plane - * also use our updated address. - */ -- vc4_state->dlist[vc4_state->pw0_offset] = addr; -+ vc4_state->dlist[vc4_state->ptr0_offset] = addr; - } - - static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = { -@@ -354,8 +359,83 @@ static void vc4_plane_destroy(struct drm_plane *plane) - drm_plane_cleanup(plane); - } - -+/* Implements immediate (non-vblank-synced) updates of the cursor -+ * position, or falls back to the atomic helper otherwise. -+ */ -+static int -+vc4_update_plane(struct drm_plane *plane, -+ struct drm_crtc *crtc, -+ struct drm_framebuffer *fb, -+ int crtc_x, int crtc_y, -+ unsigned int crtc_w, unsigned int crtc_h, -+ uint32_t src_x, uint32_t src_y, -+ uint32_t src_w, uint32_t src_h) -+{ -+ struct drm_plane_state *plane_state; -+ struct vc4_plane_state *vc4_state; -+ -+ if (plane != crtc->cursor) -+ goto out; -+ -+ plane_state = plane->state; -+ vc4_state = to_vc4_plane_state(plane_state); -+ -+ if (!plane_state) -+ goto out; -+ -+ /* If we're changing the cursor contents, do that in the -+ * normal vblank-synced atomic path. -+ */ -+ if (fb != plane_state->fb) -+ goto out; -+ -+ /* No configuring new scaling in the fast path. */ -+ if (crtc_w != plane_state->crtc_w || -+ crtc_h != plane_state->crtc_h || -+ src_w != plane_state->src_w || -+ src_h != plane_state->src_h) { -+ goto out; -+ } -+ -+ /* Set the cursor's position on the screen. This is the -+ * expected change from the drm_mode_cursor_universal() -+ * helper. -+ */ -+ plane_state->crtc_x = crtc_x; -+ plane_state->crtc_y = crtc_y; -+ -+ /* Allow changing the start position within the cursor BO, if -+ * that matters. -+ */ -+ plane_state->src_x = src_x; -+ plane_state->src_y = src_y; -+ -+ /* Update the display list based on the new crtc_x/y. */ -+ vc4_plane_atomic_check(plane, plane_state); -+ -+ /* Note that we can't just call vc4_plane_write_dlist() -+ * because that would smash the context data that the HVS is -+ * currently using. -+ */ -+ writel(vc4_state->dlist[vc4_state->pos0_offset], -+ &vc4_state->hw_dlist[vc4_state->pos0_offset]); -+ writel(vc4_state->dlist[vc4_state->pos2_offset], -+ &vc4_state->hw_dlist[vc4_state->pos2_offset]); -+ writel(vc4_state->dlist[vc4_state->ptr0_offset], -+ &vc4_state->hw_dlist[vc4_state->ptr0_offset]); -+ -+ return 0; -+ -+out: -+ return drm_atomic_helper_update_plane(plane, crtc, fb, -+ crtc_x, crtc_y, -+ crtc_w, crtc_h, -+ src_x, src_y, -+ src_w, src_h); -+} -+ - static const struct drm_plane_funcs vc4_plane_funcs = { -- .update_plane = drm_atomic_helper_update_plane, -+ .update_plane = vc4_update_plane, - .disable_plane = drm_atomic_helper_disable_plane, - .destroy = vc4_plane_destroy, - .set_property = NULL, --- -2.7.3 - -From cd30019db690e3a92fe5d7d771352f118a105f82 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 28 Dec 2015 13:25:41 -0800 -Subject: [PATCH 11/36] drm/vc4: Make the CRTCs cooperate on allocating display - lists. - -So far, we've only ever lit up one CRTC, so this has been fine. To -extend to more displays or more planes, we need to make sure we don't -run our display lists into each other. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 115 +++++++++++++++++++++++------------------ - drivers/gpu/drm/vc4/vc4_drv.h | 8 ++- - drivers/gpu/drm/vc4/vc4_hvs.c | 13 +++++ - 3 files changed, 84 insertions(+), 52 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index 6ae5abc..9032c06 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -49,22 +49,27 @@ struct vc4_crtc { - /* Which HVS channel we're using for our CRTC. */ - int channel; - -- /* Pointer to the actual hardware display list memory for the -- * crtc. -- */ -- u32 __iomem *dlist; -- -- u32 dlist_size; /* in dwords */ -- - struct drm_pending_vblank_event *event; - }; - -+struct vc4_crtc_state { -+ struct drm_crtc_state base; -+ /* Dlist area for this CRTC configuration. */ -+ struct drm_mm_node mm; -+}; -+ - static inline struct vc4_crtc * - to_vc4_crtc(struct drm_crtc *crtc) - { - return (struct vc4_crtc *)crtc; - } - -+static inline struct vc4_crtc_state * -+to_vc4_crtc_state(struct drm_crtc_state *crtc_state) -+{ -+ return (struct vc4_crtc_state *)crtc_state; -+} -+ - struct vc4_crtc_data { - /* Which channel of the HVS this pixelvalve sources from. */ - int hvs_channel; -@@ -335,11 +340,13 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) - static int vc4_crtc_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *state) - { -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); - struct drm_device *dev = crtc->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct drm_plane *plane; -- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); -+ unsigned long flags; - u32 dlist_count = 0; -+ int ret; - - /* The pixelvalve can only feed one encoder (and encoders are - * 1:1 with connectors.) -@@ -362,18 +369,12 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc, - - dlist_count++; /* Account for SCALER_CTL0_END. */ - -- if (!vc4_crtc->dlist || dlist_count > vc4_crtc->dlist_size) { -- vc4_crtc->dlist = ((u32 __iomem *)vc4->hvs->dlist + -- HVS_BOOTLOADER_DLIST_END); -- vc4_crtc->dlist_size = ((SCALER_DLIST_SIZE >> 2) - -- HVS_BOOTLOADER_DLIST_END); -- -- if (dlist_count > vc4_crtc->dlist_size) { -- DRM_DEBUG_KMS("dlist too large for CRTC (%d > %d).\n", -- dlist_count, vc4_crtc->dlist_size); -- return -EINVAL; -- } -- } -+ spin_lock_irqsave(&vc4->hvs->mm_lock, flags); -+ ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm, -+ dlist_count, 1, 0); -+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); -+ if (ret) -+ return ret; - - return 0; - } -@@ -384,47 +385,29 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, - struct drm_device *dev = crtc->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); - struct drm_plane *plane; - bool debug_dump_regs = false; -- u32 __iomem *dlist_next = vc4_crtc->dlist; -+ u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start; -+ u32 __iomem *dlist_next = dlist_start; - - if (debug_dump_regs) { - DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc)); - vc4_hvs_dump_state(dev); - } - -- /* Copy all the active planes' dlist contents to the hardware dlist. -- * -- * XXX: If the new display list was large enough that it -- * overlapped a currently-read display list, we need to do -- * something like disable scanout before putting in the new -- * list. For now, we're safe because we only have the two -- * planes. -- */ -+ /* Copy all the active planes' dlist contents to the hardware dlist. */ - drm_atomic_crtc_for_each_plane(plane, crtc) { - dlist_next += vc4_plane_write_dlist(plane, dlist_next); - } - -- if (dlist_next == vc4_crtc->dlist) { -- /* If no planes were enabled, use the SCALER_CTL0_END -- * at the start of the display list memory (in the -- * bootloader section). We'll rewrite that -- * SCALER_CTL0_END, just in case, though. -- */ -- writel(SCALER_CTL0_END, vc4->hvs->dlist); -- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), 0); -- } else { -- writel(SCALER_CTL0_END, dlist_next); -- dlist_next++; -- -- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -- (u32 __iomem *)vc4_crtc->dlist - -- (u32 __iomem *)vc4->hvs->dlist); -- -- /* Make the next display list start after ours. */ -- vc4_crtc->dlist_size -= (dlist_next - vc4_crtc->dlist); -- vc4_crtc->dlist = dlist_next; -- } -+ writel(SCALER_CTL0_END, dlist_next); -+ dlist_next++; -+ -+ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); -+ -+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -+ vc4_state->mm.start); - - if (debug_dump_regs) { - DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); -@@ -590,6 +573,36 @@ static int vc4_page_flip(struct drm_crtc *crtc, - return drm_atomic_helper_page_flip(crtc, fb, event, flags); - } - -+static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc) -+{ -+ struct vc4_crtc_state *vc4_state; -+ -+ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL); -+ if (!vc4_state) -+ return NULL; -+ -+ __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base); -+ return &vc4_state->base; -+} -+ -+static void vc4_crtc_destroy_state(struct drm_crtc *crtc, -+ struct drm_crtc_state *state) -+{ -+ struct vc4_dev *vc4 = to_vc4_dev(crtc->dev); -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); -+ -+ if (vc4_state->mm.allocated) { -+ unsigned long flags; -+ -+ spin_lock_irqsave(&vc4->hvs->mm_lock, flags); -+ drm_mm_remove_node(&vc4_state->mm); -+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags); -+ -+ } -+ -+ __drm_atomic_helper_crtc_destroy_state(crtc, state); -+} -+ - static const struct drm_crtc_funcs vc4_crtc_funcs = { - .set_config = drm_atomic_helper_set_config, - .destroy = vc4_crtc_destroy, -@@ -598,8 +611,8 @@ static const struct drm_crtc_funcs vc4_crtc_funcs = { - .cursor_set = NULL, /* handled by drm_mode_cursor_universal */ - .cursor_move = NULL, /* handled by drm_mode_cursor_universal */ - .reset = drm_atomic_helper_crtc_reset, -- .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, -- .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, -+ .atomic_duplicate_state = vc4_crtc_duplicate_state, -+ .atomic_destroy_state = vc4_crtc_destroy_state, - }; - - static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { -diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h -index 51a6333..38a31c7 100644 ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -154,7 +154,13 @@ struct vc4_v3d { - struct vc4_hvs { - struct platform_device *pdev; - void __iomem *regs; -- void __iomem *dlist; -+ u32 __iomem *dlist; -+ -+ /* Memory manager for CRTCs to allocate space in the display -+ * list. Units are dwords. -+ */ -+ struct drm_mm dlist_mm; -+ spinlock_t mm_lock; - }; - - struct vc4_plane { -diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c -index 8098c5b..9e43554 100644 ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -119,6 +119,17 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) - - hvs->dlist = hvs->regs + SCALER_DLIST_START; - -+ spin_lock_init(&hvs->mm_lock); -+ -+ /* Set up the HVS display list memory manager. We never -+ * overwrite the setup from the bootloader (just 128b out of -+ * our 16K), since we don't want to scramble the screen when -+ * transitioning from the firmware's boot setup to runtime. -+ */ -+ drm_mm_init(&hvs->dlist_mm, -+ HVS_BOOTLOADER_DLIST_END, -+ (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END); -+ - vc4->hvs = hvs; - return 0; - } -@@ -129,6 +140,8 @@ static void vc4_hvs_unbind(struct device *dev, struct device *master, - struct drm_device *drm = dev_get_drvdata(master); - struct vc4_dev *vc4 = drm->dev_private; - -+ drm_mm_takedown(&vc4->hvs->dlist_mm); -+ - vc4->hvs = NULL; - } - --- -2.7.3 - -From 7934fe9bdbbe2ffb4bcfe656a22a8f9f4e3d266a Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 28 Dec 2015 14:45:25 -0800 -Subject: [PATCH 12/36] drm/vc4: Fix which value is being used for source image - size. - -This doesn't matter yet since we only allow 1:1 scaling, but the -comment clearly says we should be using the source size. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 23 ++++++++++++++--------- - 1 file changed, 14 insertions(+), 9 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 713ec00..d9c9290 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -47,6 +47,8 @@ struct vc4_plane_state { - - /* Clipped coordinates of the plane on the display. */ - int crtc_x, crtc_y, crtc_w, crtc_h; -+ /* Clipped size of the area scanned from in the FB. */ -+ u32 src_w, src_h; - - /* Offset to start scanning out from the start of the plane's - * BO. -@@ -170,11 +172,6 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - - vc4_state->offset = fb->offsets[0]; - -- vc4_state->crtc_x = state->crtc_x; -- vc4_state->crtc_y = state->crtc_y; -- vc4_state->crtc_w = state->crtc_w; -- vc4_state->crtc_h = state->crtc_h; -- - if (state->crtc_w << 16 != state->src_w || - state->crtc_h << 16 != state->src_h) { - /* We don't support scaling yet, which involves -@@ -185,17 +182,25 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - return -EINVAL; - } - -+ vc4_state->src_w = state->src_w >> 16; -+ vc4_state->src_h = state->src_h >> 16; -+ -+ vc4_state->crtc_x = state->crtc_x; -+ vc4_state->crtc_y = state->crtc_y; -+ vc4_state->crtc_w = state->crtc_w; -+ vc4_state->crtc_h = state->crtc_h; -+ - if (vc4_state->crtc_x < 0) { - vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format, - 0) * - -vc4_state->crtc_x); -- vc4_state->crtc_w += vc4_state->crtc_x; -+ vc4_state->src_w += vc4_state->crtc_x; - vc4_state->crtc_x = 0; - } - - if (vc4_state->crtc_y < 0) { - vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y; -- vc4_state->crtc_h += vc4_state->crtc_y; -+ vc4_state->src_h += vc4_state->crtc_y; - vc4_state->crtc_y = 0; - } - -@@ -244,8 +249,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - SCALER_POS2_ALPHA_MODE_PIPELINE : - SCALER_POS2_ALPHA_MODE_FIXED, - SCALER_POS2_ALPHA_MODE) | -- VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) | -- VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT)); -+ VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) | -+ VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT)); - - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); --- -2.7.3 - -From e710e8e1d13c85a635c09168df6d008955ac5a4e Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Tue, 20 Oct 2015 16:06:57 +0100 -Subject: [PATCH 13/36] drm/vc4: Add support for scaling of display planes. - -This implements a simple policy for choosing scaling modes -(trapezoidal for decimation, PPF for magnification), and a single PPF -filter (Mitchell/Netravali's recommendation). - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_drv.h | 4 + - drivers/gpu/drm/vc4/vc4_hvs.c | 84 +++++++++++++ - drivers/gpu/drm/vc4/vc4_plane.c | 253 +++++++++++++++++++++++++++++++++++++--- - drivers/gpu/drm/vc4/vc4_regs.h | 46 ++++++++ - 4 files changed, 374 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h -index 38a31c7..83db0b7 100644 ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -160,7 +160,11 @@ struct vc4_hvs { - * list. Units are dwords. - */ - struct drm_mm dlist_mm; -+ /* Memory manager for the LBM memory used by HVS scaling. */ -+ struct drm_mm lbm_mm; - spinlock_t mm_lock; -+ -+ struct drm_mm_node mitchell_netravali_filter; - }; - - struct vc4_plane { -diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c -index 9e43554..6fbab1c 100644 ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -100,12 +100,76 @@ int vc4_hvs_debugfs_regs(struct seq_file *m, void *unused) - } - #endif - -+/* The filter kernel is composed of dwords each containing 3 9-bit -+ * signed integers packed next to each other. -+ */ -+#define VC4_INT_TO_COEFF(coeff) (coeff & 0x1ff) -+#define VC4_PPF_FILTER_WORD(c0, c1, c2) \ -+ ((((c0) & 0x1ff) << 0) | \ -+ (((c1) & 0x1ff) << 9) | \ -+ (((c2) & 0x1ff) << 18)) -+ -+/* The whole filter kernel is arranged as the coefficients 0-16 going -+ * up, then a pad, then 17-31 going down and reversed within the -+ * dwords. This means that a linear phase kernel (where it's -+ * symmetrical at the boundary between 15 and 16) has the last 5 -+ * dwords matching the first 5, but reversed. -+ */ -+#define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8, \ -+ c9, c10, c11, c12, c13, c14, c15) \ -+ {VC4_PPF_FILTER_WORD(c0, c1, c2), \ -+ VC4_PPF_FILTER_WORD(c3, c4, c5), \ -+ VC4_PPF_FILTER_WORD(c6, c7, c8), \ -+ VC4_PPF_FILTER_WORD(c9, c10, c11), \ -+ VC4_PPF_FILTER_WORD(c12, c13, c14), \ -+ VC4_PPF_FILTER_WORD(c15, c15, 0)} -+ -+#define VC4_LINEAR_PHASE_KERNEL_DWORDS 6 -+#define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1) -+ -+/* Recommended B=1/3, C=1/3 filter choice from Mitchell/Netravali. -+ * http://www.cs.utexas.edu/~fussell/courses/cs384g/lectures/mitchell/Mitchell.pdf -+ */ -+static const u32 mitchell_netravali_1_3_1_3_kernel[] = -+ VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18, -+ 50, 82, 119, 155, 187, 213, 227); -+ -+static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs, -+ struct drm_mm_node *space, -+ const u32 *kernel) -+{ -+ int ret, i; -+ u32 __iomem *dst_kernel; -+ -+ ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS, 1, -+ 0); -+ if (ret) { -+ DRM_ERROR("Failed to allocate space for filter kernel: %d\n", -+ ret); -+ return ret; -+ } -+ -+ dst_kernel = hvs->dlist + space->start; -+ -+ for (i = 0; i < VC4_KERNEL_DWORDS; i++) { -+ if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS) -+ writel(kernel[i], &dst_kernel[i]); -+ else { -+ writel(kernel[VC4_KERNEL_DWORDS - i - 1], -+ &dst_kernel[i]); -+ } -+ } -+ -+ return 0; -+} -+ - static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) - { - struct platform_device *pdev = to_platform_device(dev); - struct drm_device *drm = dev_get_drvdata(master); - struct vc4_dev *vc4 = drm->dev_private; - struct vc4_hvs *hvs = NULL; -+ int ret; - - hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL); - if (!hvs) -@@ -130,6 +194,22 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) - HVS_BOOTLOADER_DLIST_END, - (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END); - -+ /* Set up the HVS LBM memory manager. We could have some more -+ * complicated data structure that allowed reuse of LBM areas -+ * between planes when they don't overlap on the screen, but -+ * for now we just allocate globally. -+ */ -+ drm_mm_init(&hvs->lbm_mm, 0, 96 * 1024); -+ -+ /* Upload filter kernels. We only have the one for now, so we -+ * keep it around for the lifetime of the driver. -+ */ -+ ret = vc4_hvs_upload_linear_kernel(hvs, -+ &hvs->mitchell_netravali_filter, -+ mitchell_netravali_1_3_1_3_kernel); -+ if (ret) -+ return ret; -+ - vc4->hvs = hvs; - return 0; - } -@@ -140,7 +220,11 @@ static void vc4_hvs_unbind(struct device *dev, struct device *master, - struct drm_device *drm = dev_get_drvdata(master); - struct vc4_dev *vc4 = drm->dev_private; - -+ if (vc4->hvs->mitchell_netravali_filter.allocated) -+ drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter); -+ - drm_mm_takedown(&vc4->hvs->dlist_mm); -+ drm_mm_takedown(&vc4->hvs->lbm_mm); - - vc4->hvs = NULL; - } -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index d9c9290..7c2d697 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -24,6 +24,12 @@ - #include "drm_fb_cma_helper.h" - #include "drm_plane_helper.h" - -+enum vc4_scaling_mode { -+ VC4_SCALING_NONE, -+ VC4_SCALING_TPZ, -+ VC4_SCALING_PPF, -+}; -+ - struct vc4_plane_state { - struct drm_plane_state base; - /* System memory copy of the display list for this element, computed -@@ -47,13 +53,19 @@ struct vc4_plane_state { - - /* Clipped coordinates of the plane on the display. */ - int crtc_x, crtc_y, crtc_w, crtc_h; -- /* Clipped size of the area scanned from in the FB. */ -- u32 src_w, src_h; -+ /* Clipped area being scanned from in the FB. */ -+ u32 src_x, src_y, src_w, src_h; -+ -+ enum vc4_scaling_mode x_scaling, y_scaling; -+ bool is_unity; - - /* Offset to start scanning out from the start of the plane's - * BO. - */ - u32 offset; -+ -+ /* Our allocation in LBM for temporary storage during scaling. */ -+ struct drm_mm_node lbm; - }; - - static inline struct vc4_plane_state * -@@ -90,6 +102,16 @@ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) - return NULL; - } - -+static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst) -+{ -+ if (dst > src) -+ return VC4_SCALING_PPF; -+ else if (dst < src) -+ return VC4_SCALING_TPZ; -+ else -+ return VC4_SCALING_NONE; -+} -+ - static bool plane_enabled(struct drm_plane_state *state) - { - return state->fb && state->crtc; -@@ -106,6 +128,8 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane - if (!vc4_state) - return NULL; - -+ memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm)); -+ - __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base); - - if (vc4_state->dlist) { -@@ -125,8 +149,17 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane - static void vc4_plane_destroy_state(struct drm_plane *plane, - struct drm_plane_state *state) - { -+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev); - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - -+ if (vc4_state->lbm.allocated) { -+ unsigned long irqflags; -+ -+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags); -+ drm_mm_remove_node(&vc4_state->lbm); -+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags); -+ } -+ - kfree(vc4_state->dlist); - __drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base); - kfree(state); -@@ -165,23 +198,60 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val) - vc4_state->dlist[vc4_state->dlist_count++] = val; - } - -+/* Returns the scl0/scl1 field based on whether the dimensions need to -+ * be up/down/non-scaled. -+ * -+ * This is a replication of a table from the spec. -+ */ -+static u32 vc4_get_scl_field(struct drm_plane_state *state) -+{ -+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); -+ -+ switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) { -+ case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF: -+ return SCALER_CTL0_SCL_H_PPF_V_PPF; -+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF: -+ return SCALER_CTL0_SCL_H_TPZ_V_PPF; -+ case VC4_SCALING_PPF << 2 | VC4_SCALING_TPZ: -+ return SCALER_CTL0_SCL_H_PPF_V_TPZ; -+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_TPZ: -+ return SCALER_CTL0_SCL_H_TPZ_V_TPZ; -+ case VC4_SCALING_PPF << 2 | VC4_SCALING_NONE: -+ return SCALER_CTL0_SCL_H_PPF_V_NONE; -+ case VC4_SCALING_NONE << 2 | VC4_SCALING_PPF: -+ return SCALER_CTL0_SCL_H_NONE_V_PPF; -+ case VC4_SCALING_NONE << 2 | VC4_SCALING_TPZ: -+ return SCALER_CTL0_SCL_H_NONE_V_TPZ; -+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_NONE: -+ return SCALER_CTL0_SCL_H_TPZ_V_NONE; -+ default: -+ case VC4_SCALING_NONE << 2 | VC4_SCALING_NONE: -+ /* The unity case is independently handled by -+ * SCALER_CTL0_UNITY. -+ */ -+ return 0; -+ } -+} -+ - static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - { -+ struct drm_plane *plane = state->plane; - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - struct drm_framebuffer *fb = state->fb; -+ u32 subpixel_src_mask = (1 << 16) - 1; - - vc4_state->offset = fb->offsets[0]; - -- if (state->crtc_w << 16 != state->src_w || -- state->crtc_h << 16 != state->src_h) { -- /* We don't support scaling yet, which involves -- * allocating the LBM memory for scaling temporary -- * storage, and putting filter kernels in the HVS -- * context. -- */ -+ /* We don't support subpixel source positioning for scaling. */ -+ if ((state->src_x & subpixel_src_mask) || -+ (state->src_y & subpixel_src_mask) || -+ (state->src_w & subpixel_src_mask) || -+ (state->src_h & subpixel_src_mask)) { - return -EINVAL; - } - -+ vc4_state->src_x = state->src_x >> 16; -+ vc4_state->src_y = state->src_y >> 16; - vc4_state->src_w = state->src_w >> 16; - vc4_state->src_h = state->src_h >> 16; - -@@ -190,6 +260,23 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - vc4_state->crtc_w = state->crtc_w; - vc4_state->crtc_h = state->crtc_h; - -+ vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w, -+ vc4_state->crtc_w); -+ vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h, -+ vc4_state->crtc_h); -+ vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE && -+ vc4_state->y_scaling == VC4_SCALING_NONE); -+ -+ /* No configuring scaling on the cursor plane, since it gets -+ non-vblank-synced updates, and scaling requires requires -+ LBM changes which have to be vblank-synced. -+ */ -+ if (plane->type == DRM_PLANE_TYPE_CURSOR && !vc4_state->is_unity) -+ return -EINVAL; -+ -+ /* Clamp the on-screen start x/y to 0. The hardware doesn't -+ * support negative y, and negative x wastes bandwidth. -+ */ - if (vc4_state->crtc_x < 0) { - vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format, - 0) * -@@ -207,6 +294,87 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - return 0; - } - -+static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst) -+{ -+ u32 scale, recip; -+ -+ scale = (1 << 16) * src / dst; -+ -+ /* The specs note that while the reciprocal would be defined -+ * as (1<<32)/scale, ~0 is close enough. -+ */ -+ recip = ~0 / scale; -+ -+ vc4_dlist_write(vc4_state, -+ VC4_SET_FIELD(scale, SCALER_TPZ0_SCALE) | -+ VC4_SET_FIELD(0, SCALER_TPZ0_IPHASE)); -+ vc4_dlist_write(vc4_state, -+ VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP)); -+} -+ -+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst) -+{ -+ u32 scale = (1 << 16) * src / dst; -+ -+ vc4_dlist_write(vc4_state, -+ SCALER_PPF_AGC | -+ VC4_SET_FIELD(scale, SCALER_PPF_SCALE) | -+ VC4_SET_FIELD(0, SCALER_PPF_IPHASE)); -+} -+ -+static u32 vc4_lbm_size(struct drm_plane_state *state) -+{ -+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); -+ /* This is the worst case number. One of the two sizes will -+ * be used depending on the scaling configuration. -+ */ -+ u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w); -+ u32 lbm; -+ -+ if (vc4_state->is_unity) -+ return 0; -+ else if (vc4_state->y_scaling == VC4_SCALING_TPZ) -+ lbm = pix_per_line * 8; -+ else { -+ /* In special cases, this multiplier might be 12. */ -+ lbm = pix_per_line * 16; -+ } -+ -+ lbm = roundup(lbm, 32); -+ -+ return lbm; -+} -+ -+static void vc4_write_scaling_parameters(struct drm_plane_state *state) -+{ -+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); -+ -+ /* Ch0 H-PPF Word 0: Scaling Parameters */ -+ if (vc4_state->x_scaling == VC4_SCALING_PPF) { -+ vc4_write_ppf(vc4_state, -+ vc4_state->src_w, vc4_state->crtc_w); -+ } -+ -+ /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */ -+ if (vc4_state->y_scaling == VC4_SCALING_PPF) { -+ vc4_write_ppf(vc4_state, -+ vc4_state->src_h, vc4_state->crtc_h); -+ vc4_dlist_write(vc4_state, 0xc0c0c0c0); -+ } -+ -+ /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */ -+ if (vc4_state->x_scaling == VC4_SCALING_TPZ) { -+ vc4_write_tpz(vc4_state, -+ vc4_state->src_w, vc4_state->crtc_w); -+ } -+ -+ /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */ -+ if (vc4_state->y_scaling == VC4_SCALING_TPZ) { -+ vc4_write_tpz(vc4_state, -+ vc4_state->src_h, vc4_state->crtc_h); -+ vc4_dlist_write(vc4_state, 0xc0c0c0c0); -+ } -+} - - /* Writes out a full display list for an active plane to the plane's - * private dlist state. -@@ -214,22 +382,50 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - static int vc4_plane_mode_set(struct drm_plane *plane, - struct drm_plane_state *state) - { -+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev); - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - struct drm_framebuffer *fb = state->fb; - struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); - u32 ctl0_offset = vc4_state->dlist_count; - const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format); -+ u32 scl; -+ u32 lbm_size; -+ unsigned long irqflags; - int ret; - - ret = vc4_plane_setup_clipping_and_scaling(state); - if (ret) - return ret; - -+ /* Allocate the LBM memory that the HVS will use for temporary -+ * storage due to our scaling/format conversion. -+ */ -+ lbm_size = vc4_lbm_size(state); -+ if (lbm_size) { -+ if (!vc4_state->lbm.allocated) { -+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags); -+ ret = drm_mm_insert_node(&vc4->hvs->lbm_mm, -+ &vc4_state->lbm, -+ lbm_size, 32, 0); -+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags); -+ } else { -+ WARN_ON_ONCE(lbm_size != vc4_state->lbm.size); -+ } -+ } -+ -+ if (ret) -+ return ret; -+ -+ scl = vc4_get_scl_field(state); -+ -+ /* Control word */ - vc4_dlist_write(vc4_state, - SCALER_CTL0_VALID | - (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) | - (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) | -- SCALER_CTL0_UNITY); -+ (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) | -+ VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) | -+ VC4_SET_FIELD(scl, SCALER_CTL0_SCL1)); - - /* Position Word 0: Image Positions and Alpha Value */ - vc4_state->pos0_offset = vc4_state->dlist_count; -@@ -238,9 +434,14 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) | - VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y)); - -- /* Position Word 1: Scaled Image Dimensions. -- * Skipped due to SCALER_CTL0_UNITY scaling. -- */ -+ /* Position Word 1: Scaled Image Dimensions. */ -+ if (!vc4_state->is_unity) { -+ vc4_dlist_write(vc4_state, -+ VC4_SET_FIELD(vc4_state->crtc_w, -+ SCALER_POS1_SCL_WIDTH) | -+ VC4_SET_FIELD(vc4_state->crtc_h, -+ SCALER_POS1_SCL_HEIGHT)); -+ } - - /* Position Word 2: Source Image Size, Alpha Mode */ - vc4_state->pos2_offset = vc4_state->dlist_count; -@@ -266,6 +467,32 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - vc4_dlist_write(vc4_state, - VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH)); - -+ if (!vc4_state->is_unity) { -+ /* LBM Base Address. */ -+ if (vc4_state->y_scaling != VC4_SCALING_NONE) -+ vc4_dlist_write(vc4_state, vc4_state->lbm.start); -+ -+ vc4_write_scaling_parameters(state); -+ -+ /* If any PPF setup was done, then all the kernel -+ * pointers get uploaded. -+ */ -+ if (vc4_state->x_scaling == VC4_SCALING_PPF || -+ vc4_state->y_scaling == VC4_SCALING_PPF) { -+ u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start, -+ SCALER_PPF_KERNEL_OFFSET); -+ -+ /* HPPF plane 0 */ -+ vc4_dlist_write(vc4_state, kernel); -+ /* VPPF plane 0 */ -+ vc4_dlist_write(vc4_state, kernel); -+ /* HPPF plane 1 */ -+ vc4_dlist_write(vc4_state, kernel); -+ /* VPPF plane 1 */ -+ vc4_dlist_write(vc4_state, kernel); -+ } -+ } -+ - vc4_state->dlist[ctl0_offset] |= - VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE); - -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 7c29993..a5b544d 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -552,6 +552,21 @@ enum hvs_pixel_format { - #define SCALER_CTL0_ORDER_MASK VC4_MASK(14, 13) - #define SCALER_CTL0_ORDER_SHIFT 13 - -+#define SCALER_CTL0_SCL1_MASK VC4_MASK(10, 8) -+#define SCALER_CTL0_SCL1_SHIFT 8 -+ -+#define SCALER_CTL0_SCL0_MASK VC4_MASK(7, 5) -+#define SCALER_CTL0_SCL0_SHIFT 5 -+ -+#define SCALER_CTL0_SCL_H_PPF_V_PPF 0 -+#define SCALER_CTL0_SCL_H_TPZ_V_PPF 1 -+#define SCALER_CTL0_SCL_H_PPF_V_TPZ 2 -+#define SCALER_CTL0_SCL_H_TPZ_V_TPZ 3 -+#define SCALER_CTL0_SCL_H_PPF_V_NONE 4 -+#define SCALER_CTL0_SCL_H_NONE_V_PPF 5 -+#define SCALER_CTL0_SCL_H_NONE_V_TPZ 6 -+#define SCALER_CTL0_SCL_H_TPZ_V_NONE 7 -+ - /* Set to indicate no scaling. */ - #define SCALER_CTL0_UNITY BIT(4) - -@@ -567,6 +582,12 @@ enum hvs_pixel_format { - #define SCALER_POS0_START_X_MASK VC4_MASK(11, 0) - #define SCALER_POS0_START_X_SHIFT 0 - -+#define SCALER_POS1_SCL_HEIGHT_MASK VC4_MASK(27, 16) -+#define SCALER_POS1_SCL_HEIGHT_SHIFT 16 -+ -+#define SCALER_POS1_SCL_WIDTH_MASK VC4_MASK(11, 0) -+#define SCALER_POS1_SCL_WIDTH_SHIFT 0 -+ - #define SCALER_POS2_ALPHA_MODE_MASK VC4_MASK(31, 30) - #define SCALER_POS2_ALPHA_MODE_SHIFT 30 - #define SCALER_POS2_ALPHA_MODE_PIPELINE 0 -@@ -580,6 +601,31 @@ enum hvs_pixel_format { - #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0) - #define SCALER_POS2_WIDTH_SHIFT 0 - -+#define SCALER_TPZ0_VERT_RECALC BIT(31) -+#define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8) -+#define SCALER_TPZ0_SCALE_SHIFT 8 -+#define SCALER_TPZ0_IPHASE_MASK VC4_MASK(7, 0) -+#define SCALER_TPZ0_IPHASE_SHIFT 0 -+#define SCALER_TPZ1_RECIP_MASK VC4_MASK(15, 0) -+#define SCALER_TPZ1_RECIP_SHIFT 0 -+ -+/* Skips interpolating coefficients to 64 phases, so just 8 are used. -+ * Required for nearest neighbor. -+ */ -+#define SCALER_PPF_NOINTERP BIT(31) -+/* Replaes the highest valued coefficient with one that makes all 4 -+ * sum to unity. -+ */ -+#define SCALER_PPF_AGC BIT(30) -+#define SCALER_PPF_SCALE_MASK VC4_MASK(24, 8) -+#define SCALER_PPF_SCALE_SHIFT 8 -+#define SCALER_PPF_IPHASE_MASK VC4_MASK(6, 0) -+#define SCALER_PPF_IPHASE_SHIFT 0 -+ -+#define SCALER_PPF_KERNEL_OFFSET_MASK VC4_MASK(13, 0) -+#define SCALER_PPF_KERNEL_OFFSET_SHIFT 0 -+#define SCALER_PPF_KERNEL_UNCACHED BIT(31) -+ - #define SCALER_SRC_PITCH_MASK VC4_MASK(15, 0) - #define SCALER_SRC_PITCH_SHIFT 0 - --- -2.7.3 - -From c1f11c3b1a4379841341911c379237d3a3870607 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Tue, 20 Oct 2015 13:59:15 +0100 -Subject: [PATCH 14/36] drm/vc4: Add support a few more RGB display plane - formats. - -These were all touch-tested with modetest. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 7c2d697..013ebff 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -88,6 +88,22 @@ static const struct hvs_format { - .drm = DRM_FORMAT_ARGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888, - .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true, - }, -+ { -+ .drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565, -+ .pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false, -+ }, -+ { -+ .drm = DRM_FORMAT_BGR565, .hvs = HVS_PIXEL_FORMAT_RGB565, -+ .pixel_order = HVS_PIXEL_ORDER_XBGR, .has_alpha = false, -+ }, -+ { -+ .drm = DRM_FORMAT_ARGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551, -+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true, -+ }, -+ { -+ .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551, -+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false, -+ }, - }; - - static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) --- -2.7.3 - -From 149a88adaedd0bea6c6f2f12dcf893d740be2ebb Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Wed, 30 Dec 2015 12:25:44 -0800 -Subject: [PATCH 15/36] drm/vc4: Add support for YUV planes. - -This supports 420 and 422 subsampling with 2 or 3 planes, tested with -modetest. It doesn't set up chroma subsampling position (which it -appears KMS doesn't deal with yet). - -The LBM memory is overallocated in many cases, but apparently the docs -aren't quite correct and I'll probably need to look at the hardware -source to really figure it out. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - drivers/gpu/drm/vc4/vc4_plane.c | 256 +++++++++++++++++++++++++++++++--------- - drivers/gpu/drm/vc4/vc4_regs.h | 56 ++++++++- - 2 files changed, 253 insertions(+), 59 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c -index 013ebff..7b0c72a 100644 ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -54,15 +54,19 @@ struct vc4_plane_state { - /* Clipped coordinates of the plane on the display. */ - int crtc_x, crtc_y, crtc_w, crtc_h; - /* Clipped area being scanned from in the FB. */ -- u32 src_x, src_y, src_w, src_h; -+ u32 src_x, src_y; - -- enum vc4_scaling_mode x_scaling, y_scaling; -+ u32 src_w[2], src_h[2]; -+ -+ /* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */ -+ enum vc4_scaling_mode x_scaling[2], y_scaling[2]; - bool is_unity; -+ bool is_yuv; - - /* Offset to start scanning out from the start of the plane's - * BO. - */ -- u32 offset; -+ u32 offsets[3]; - - /* Our allocation in LBM for temporary storage during scaling. */ - struct drm_mm_node lbm; -@@ -79,6 +83,7 @@ static const struct hvs_format { - u32 hvs; /* HVS_FORMAT_* */ - u32 pixel_order; - bool has_alpha; -+ bool flip_cbcr; - } hvs_formats[] = { - { - .drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888, -@@ -104,6 +109,32 @@ static const struct hvs_format { - .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551, - .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false, - }, -+ { -+ .drm = DRM_FORMAT_YUV422, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, -+ }, -+ { -+ .drm = DRM_FORMAT_YVU422, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, -+ .flip_cbcr = true, -+ }, -+ { -+ .drm = DRM_FORMAT_YUV420, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE, -+ }, -+ { -+ .drm = DRM_FORMAT_YVU420, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE, -+ .flip_cbcr = true, -+ }, -+ { -+ .drm = DRM_FORMAT_NV12, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE, -+ }, -+ { -+ .drm = DRM_FORMAT_NV16, -+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE, -+ }, - }; - - static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) -@@ -219,11 +250,11 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val) - * - * This is a replication of a table from the spec. - */ --static u32 vc4_get_scl_field(struct drm_plane_state *state) -+static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane) - { - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - -- switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) { -+ switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) { - case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF: - return SCALER_CTL0_SCL_H_PPF_V_PPF; - case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF: -@@ -254,9 +285,16 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - struct drm_plane *plane = state->plane; - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - struct drm_framebuffer *fb = state->fb; -+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); - u32 subpixel_src_mask = (1 << 16) - 1; -+ u32 format = fb->pixel_format; -+ int num_planes = drm_format_num_planes(format); -+ u32 h_subsample = 1; -+ u32 v_subsample = 1; -+ int i; - -- vc4_state->offset = fb->offsets[0]; -+ for (i = 0; i < num_planes; i++) -+ vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; - - /* We don't support subpixel source positioning for scaling. */ - if ((state->src_x & subpixel_src_mask) || -@@ -268,20 +306,48 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - - vc4_state->src_x = state->src_x >> 16; - vc4_state->src_y = state->src_y >> 16; -- vc4_state->src_w = state->src_w >> 16; -- vc4_state->src_h = state->src_h >> 16; -+ vc4_state->src_w[0] = state->src_w >> 16; -+ vc4_state->src_h[0] = state->src_h >> 16; - - vc4_state->crtc_x = state->crtc_x; - vc4_state->crtc_y = state->crtc_y; - vc4_state->crtc_w = state->crtc_w; - vc4_state->crtc_h = state->crtc_h; - -- vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w, -- vc4_state->crtc_w); -- vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h, -- vc4_state->crtc_h); -- vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE && -- vc4_state->y_scaling == VC4_SCALING_NONE); -+ vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0], -+ vc4_state->crtc_w); -+ vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0], -+ vc4_state->crtc_h); -+ -+ if (num_planes > 1) { -+ vc4_state->is_yuv = true; -+ -+ h_subsample = drm_format_horz_chroma_subsampling(format); -+ v_subsample = drm_format_vert_chroma_subsampling(format); -+ vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample; -+ vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample; -+ -+ vc4_state->x_scaling[1] = -+ vc4_get_scaling_mode(vc4_state->src_w[1], -+ vc4_state->crtc_w); -+ vc4_state->y_scaling[1] = -+ vc4_get_scaling_mode(vc4_state->src_h[1], -+ vc4_state->crtc_h); -+ -+ /* YUV conversion requires that scaling be enabled, -+ * even on a plane that's otherwise 1:1. Choose TPZ -+ * for simplicity. -+ */ -+ if (vc4_state->x_scaling[0] == VC4_SCALING_NONE) -+ vc4_state->x_scaling[0] = VC4_SCALING_TPZ; -+ if (vc4_state->y_scaling[0] == VC4_SCALING_NONE) -+ vc4_state->y_scaling[0] = VC4_SCALING_TPZ; -+ } -+ -+ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE && -+ vc4_state->y_scaling[0] == VC4_SCALING_NONE && -+ vc4_state->x_scaling[1] == VC4_SCALING_NONE && -+ vc4_state->y_scaling[1] == VC4_SCALING_NONE); - - /* No configuring scaling on the cursor plane, since it gets - non-vblank-synced updates, and scaling requires requires -@@ -294,16 +360,27 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) - * support negative y, and negative x wastes bandwidth. - */ - if (vc4_state->crtc_x < 0) { -- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format, -- 0) * -- -vc4_state->crtc_x); -- vc4_state->src_w += vc4_state->crtc_x; -+ for (i = 0; i < num_planes; i++) { -+ u32 cpp = drm_format_plane_cpp(fb->pixel_format, i); -+ u32 subs = ((i == 0) ? 1 : h_subsample); -+ -+ vc4_state->offsets[i] += (cpp * -+ (-vc4_state->crtc_x) / subs); -+ } -+ vc4_state->src_w[0] += vc4_state->crtc_x; -+ vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample; - vc4_state->crtc_x = 0; - } - - if (vc4_state->crtc_y < 0) { -- vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y; -- vc4_state->src_h += vc4_state->crtc_y; -+ for (i = 0; i < num_planes; i++) { -+ u32 subs = ((i == 0) ? 1 : v_subsample); -+ -+ vc4_state->offsets[i] += (fb->pitches[i] * -+ (-vc4_state->crtc_y) / subs); -+ } -+ vc4_state->src_h[0] += vc4_state->crtc_y; -+ vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample; - vc4_state->crtc_y = 0; - } - -@@ -344,15 +421,23 @@ static u32 vc4_lbm_size(struct drm_plane_state *state) - /* This is the worst case number. One of the two sizes will - * be used depending on the scaling configuration. - */ -- u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w); -+ u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w); - u32 lbm; - -- if (vc4_state->is_unity) -- return 0; -- else if (vc4_state->y_scaling == VC4_SCALING_TPZ) -- lbm = pix_per_line * 8; -- else { -- /* In special cases, this multiplier might be 12. */ -+ if (!vc4_state->is_yuv) { -+ if (vc4_state->is_unity) -+ return 0; -+ else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ) -+ lbm = pix_per_line * 8; -+ else { -+ /* In special cases, this multiplier might be 12. */ -+ lbm = pix_per_line * 16; -+ } -+ } else { -+ /* There are cases for this going down to a multiplier -+ * of 2, but according to the firmware source, the -+ * table in the docs is somewhat wrong. -+ */ - lbm = pix_per_line * 16; - } - -@@ -361,33 +446,34 @@ static u32 vc4_lbm_size(struct drm_plane_state *state) - return lbm; - } - --static void vc4_write_scaling_parameters(struct drm_plane_state *state) -+static void vc4_write_scaling_parameters(struct drm_plane_state *state, -+ int channel) - { - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - - /* Ch0 H-PPF Word 0: Scaling Parameters */ -- if (vc4_state->x_scaling == VC4_SCALING_PPF) { -+ if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_w, vc4_state->crtc_w); -+ vc4_state->src_w[channel], vc4_state->crtc_w); - } - - /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */ -- if (vc4_state->y_scaling == VC4_SCALING_PPF) { -+ if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) { - vc4_write_ppf(vc4_state, -- vc4_state->src_h, vc4_state->crtc_h); -+ vc4_state->src_h[channel], vc4_state->crtc_h); - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - } - - /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */ -- if (vc4_state->x_scaling == VC4_SCALING_TPZ) { -+ if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) { - vc4_write_tpz(vc4_state, -- vc4_state->src_w, vc4_state->crtc_w); -+ vc4_state->src_w[channel], vc4_state->crtc_w); - } - - /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */ -- if (vc4_state->y_scaling == VC4_SCALING_TPZ) { -+ if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) { - vc4_write_tpz(vc4_state, -- vc4_state->src_h, vc4_state->crtc_h); -+ vc4_state->src_h[channel], vc4_state->crtc_h); - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - } - } -@@ -401,13 +487,13 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - struct vc4_dev *vc4 = to_vc4_dev(plane->dev); - struct vc4_plane_state *vc4_state = to_vc4_plane_state(state); - struct drm_framebuffer *fb = state->fb; -- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); - u32 ctl0_offset = vc4_state->dlist_count; - const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format); -- u32 scl; -+ int num_planes = drm_format_num_planes(format->drm); -+ u32 scl0, scl1; - u32 lbm_size; - unsigned long irqflags; -- int ret; -+ int ret, i; - - ret = vc4_plane_setup_clipping_and_scaling(state); - if (ret) -@@ -432,7 +518,19 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - if (ret) - return ret; - -- scl = vc4_get_scl_field(state); -+ /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB -+ * and 4:4:4, scl1 should be set to scl0 so both channels of -+ * the scaler do the same thing. For YUV, the Y plane needs -+ * to be put in channel 1 and Cb/Cr in channel 0, so we swap -+ * the scl fields here. -+ */ -+ if (num_planes == 1) { -+ scl0 = vc4_get_scl_field(state, 1); -+ scl1 = scl0; -+ } else { -+ scl0 = vc4_get_scl_field(state, 1); -+ scl1 = vc4_get_scl_field(state, 0); -+ } - - /* Control word */ - vc4_dlist_write(vc4_state, -@@ -440,8 +538,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) | - (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) | - (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) | -- VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) | -- VC4_SET_FIELD(scl, SCALER_CTL0_SCL1)); -+ VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) | -+ VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1)); - - /* Position Word 0: Image Positions and Alpha Value */ - vc4_state->pos0_offset = vc4_state->dlist_count; -@@ -466,35 +564,68 @@ static int vc4_plane_mode_set(struct drm_plane *plane, - SCALER_POS2_ALPHA_MODE_PIPELINE : - SCALER_POS2_ALPHA_MODE_FIXED, - SCALER_POS2_ALPHA_MODE) | -- VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) | -- VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT)); -+ VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) | -+ VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT)); - - /* Position Word 3: Context. Written by the HVS. */ - vc4_dlist_write(vc4_state, 0xc0c0c0c0); - -- /* Pointer Word 0: RGB / Y Pointer */ -+ -+ /* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers -+ * -+ * The pointers may be any byte address. -+ */ - vc4_state->ptr0_offset = vc4_state->dlist_count; -- vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset); -+ if (!format->flip_cbcr) { -+ for (i = 0; i < num_planes; i++) -+ vc4_dlist_write(vc4_state, vc4_state->offsets[i]); -+ } else { -+ WARN_ON_ONCE(num_planes != 3); -+ vc4_dlist_write(vc4_state, vc4_state->offsets[0]); -+ vc4_dlist_write(vc4_state, vc4_state->offsets[2]); -+ vc4_dlist_write(vc4_state, vc4_state->offsets[1]); -+ } - -- /* Pointer Context Word 0: Written by the HVS */ -- vc4_dlist_write(vc4_state, 0xc0c0c0c0); -+ /* Pointer Context Word 0/1/2: Written by the HVS */ -+ for (i = 0; i < num_planes; i++) -+ vc4_dlist_write(vc4_state, 0xc0c0c0c0); - -- /* Pitch word 0: Pointer 0 Pitch */ -- vc4_dlist_write(vc4_state, -- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH)); -+ /* Pitch word 0/1/2 */ -+ for (i = 0; i < num_planes; i++) { -+ vc4_dlist_write(vc4_state, -+ VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH)); -+ } -+ -+ /* Colorspace conversion words */ -+ if (vc4_state->is_yuv) { -+ vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5); -+ vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5); -+ vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5); -+ } - - if (!vc4_state->is_unity) { - /* LBM Base Address. */ -- if (vc4_state->y_scaling != VC4_SCALING_NONE) -+ if (vc4_state->y_scaling[0] != VC4_SCALING_NONE || -+ vc4_state->y_scaling[1] != VC4_SCALING_NONE) { - vc4_dlist_write(vc4_state, vc4_state->lbm.start); -+ } - -- vc4_write_scaling_parameters(state); -+ if (num_planes > 1) { -+ /* Emit Cb/Cr as channel 0 and Y as channel -+ * 1. This matches how we set up scl0/scl1 -+ * above. -+ */ -+ vc4_write_scaling_parameters(state, 1); -+ } -+ vc4_write_scaling_parameters(state, 0); - - /* If any PPF setup was done, then all the kernel - * pointers get uploaded. - */ -- if (vc4_state->x_scaling == VC4_SCALING_PPF || -- vc4_state->y_scaling == VC4_SCALING_PPF) { -+ if (vc4_state->x_scaling[0] == VC4_SCALING_PPF || -+ vc4_state->y_scaling[0] == VC4_SCALING_PPF || -+ vc4_state->x_scaling[1] == VC4_SCALING_PPF || -+ vc4_state->y_scaling[1] == VC4_SCALING_PPF) { - u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start, - SCALER_PPF_KERNEL_OFFSET); - -@@ -698,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, - struct drm_plane *plane = NULL; - struct vc4_plane *vc4_plane; - u32 formats[ARRAY_SIZE(hvs_formats)]; -+ u32 num_formats = 0; - int ret = 0; - unsigned i; - -@@ -708,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, - goto fail; - } - -- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) -- formats[i] = hvs_formats[i].drm; -+ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) { -+ /* Don't allow YUV in cursor planes, since that means -+ * tuning on the scaler, which we don't allow for the -+ * cursor. -+ */ -+ if (type != DRM_PLANE_TYPE_CURSOR || -+ hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) { -+ formats[num_formats++] = hvs_formats[i].drm; -+ } -+ } - plane = &vc4_plane->base; - ret = drm_universal_plane_init(dev, plane, 0xff, - &vc4_plane_funcs, -- formats, ARRAY_SIZE(formats), -+ formats, num_formats, - type, NULL); - - drm_plane_helper_add(plane, &vc4_plane_helper_funcs); -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index a5b544d..bf42a8e 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -519,7 +519,12 @@ enum hvs_pixel_format { - HVS_PIXEL_FORMAT_RGB888 = 5, - HVS_PIXEL_FORMAT_RGBA6666 = 6, - /* 32bpp */ -- HVS_PIXEL_FORMAT_RGBA8888 = 7 -+ HVS_PIXEL_FORMAT_RGBA8888 = 7, -+ -+ HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE = 8, -+ HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE = 9, -+ HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE = 10, -+ HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE = 11, - }; - - /* Note: the LSB is the rightmost character shown. Only valid for -@@ -601,6 +606,55 @@ enum hvs_pixel_format { - #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0) - #define SCALER_POS2_WIDTH_SHIFT 0 - -+/* Color Space Conversion words. Some values are S2.8 signed -+ * integers, except that the 2 integer bits map as {0x0: 0, 0x1: 1, -+ * 0x2: 2, 0x3: -1} -+ */ -+/* bottom 8 bits of S2.8 contribution of Cr to Blue */ -+#define SCALER_CSC0_COEF_CR_BLU_MASK VC4_MASK(31, 24) -+#define SCALER_CSC0_COEF_CR_BLU_SHIFT 24 -+/* Signed offset to apply to Y before CSC. (Y' = Y + YY_OFS) */ -+#define SCALER_CSC0_COEF_YY_OFS_MASK VC4_MASK(23, 16) -+#define SCALER_CSC0_COEF_YY_OFS_SHIFT 16 -+/* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */ -+#define SCALER_CSC0_COEF_CB_OFS_MASK VC4_MASK(15, 8) -+#define SCALER_CSC0_COEF_CB_OFS_SHIFT 8 -+/* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */ -+#define SCALER_CSC0_COEF_CR_OFS_MASK VC4_MASK(7, 0) -+#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0 -+#define SCALER_CSC0_ITR_R_601_5 0x00f00000 -+#define SCALER_CSC0_ITR_R_709_3 0x00f00000 -+#define SCALER_CSC0_JPEG_JFIF 0x00000000 -+ -+/* S2.8 contribution of Cb to Green */ -+#define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22) -+#define SCALER_CSC1_COEF_CB_GRN_SHIFT 22 -+/* S2.8 contribution of Cr to Green */ -+#define SCALER_CSC1_COEF_CR_GRN_MASK VC4_MASK(21, 12) -+#define SCALER_CSC1_COEF_CR_GRN_SHIFT 12 -+/* S2.8 contribution of Y to all of RGB */ -+#define SCALER_CSC1_COEF_YY_ALL_MASK VC4_MASK(11, 2) -+#define SCALER_CSC1_COEF_YY_ALL_SHIFT 2 -+/* top 2 bits of S2.8 contribution of Cr to Blue */ -+#define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0) -+#define SCALER_CSC1_COEF_CR_BLU_SHIFT 0 -+#define SCALER_CSC1_ITR_R_601_5 0xe73304a8 -+#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8 -+#define SCALER_CSC1_JPEG_JFIF 0xea34a400 -+ -+/* S2.8 contribution of Cb to Red */ -+#define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20) -+#define SCALER_CSC2_COEF_CB_RED_SHIFT 20 -+/* S2.8 contribution of Cr to Red */ -+#define SCALER_CSC2_COEF_CR_RED_MASK VC4_MASK(19, 10) -+#define SCALER_CSC2_COEF_CR_RED_SHIFT 10 -+/* S2.8 contribution of Cb to Blue */ -+#define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10) -+#define SCALER_CSC2_COEF_CB_BLU_SHIFT 10 -+#define SCALER_CSC2_ITR_R_601_5 0x00066204 -+#define SCALER_CSC2_ITR_R_709_3 0x00072a1c -+#define SCALER_CSC2_JPEG_JFIF 0x000599c5 -+ - #define SCALER_TPZ0_VERT_RECALC BIT(31) - #define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8) - #define SCALER_TPZ0_SCALE_SHIFT 8 --- -2.7.3 - -From 47ed1ee3dbfde89297b81bc09f1b483f4da1b06d Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 29 Feb 2016 17:53:00 -0800 -Subject: [PATCH 16/36] drm/vc4: Let gpiolib know that we're OK with sleeping - for HPD. - -Fixes an error thrown every few seconds when we poll HPD when it's on -a I2C to GPIO expander. - -Signed-off-by: Eric Anholt <eric@anholt.net> -Tested-by: Daniel Stone <daniels@collabora.com> ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 56272ca..6bcf51d 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -166,7 +166,7 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force) - struct vc4_dev *vc4 = to_vc4_dev(dev); - - if (vc4->hdmi->hpd_gpio) { -- if (gpio_get_value(vc4->hdmi->hpd_gpio)) -+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio)) - return connector_status_connected; - else - return connector_status_disconnected; --- -2.7.3 - -From 24b28acef42486c282bc58e977cbfc66191a8f38 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 29 Feb 2016 17:53:01 -0800 -Subject: [PATCH 17/36] drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set in - the devicetree. - -The original Raspberry Pi had the GPIO active high, but the later -models are active low. The DT GPIO bindings allow specifying the -active flag, except that it doesn't get propagated to the gpiodesc, so -you have to handle it yourself. - -Signed-off-by: Eric Anholt <eric@anholt.net> -Tested-by: Daniel Stone <daniels@collabora.com> ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 6bcf51d..d8b8649 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -47,6 +47,7 @@ struct vc4_hdmi { - void __iomem *hdmicore_regs; - void __iomem *hd_regs; - int hpd_gpio; -+ bool hpd_active_low; - - struct clk *pixel_clock; - struct clk *hsm_clock; -@@ -166,7 +167,8 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force) - struct vc4_dev *vc4 = to_vc4_dev(dev); - - if (vc4->hdmi->hpd_gpio) { -- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio)) -+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^ -+ vc4->hdmi->hpd_active_low) - return connector_status_connected; - else - return connector_status_disconnected; -@@ -517,11 +519,17 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - * we'll use the HDMI core's register. - */ - if (of_find_property(dev->of_node, "hpd-gpios", &value)) { -- hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0); -+ enum of_gpio_flags hpd_gpio_flags; -+ -+ hdmi->hpd_gpio = of_get_named_gpio_flags(dev->of_node, -+ "hpd-gpios", 0, -+ &hpd_gpio_flags); - if (hdmi->hpd_gpio < 0) { - ret = hdmi->hpd_gpio; - goto err_unprepare_hsm; - } -+ -+ hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW; - } - - vc4->hdmi = hdmi; --- -2.7.3 - -From ed6836e411dd559a811dd063509a01772f4fe00f Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 4 Mar 2016 12:32:07 -0800 -Subject: [PATCH 19/36] drm/vc4: Recognize a more specific compatible string - for V3D. - -The Raspberry Pi Foundation's firmware updates are shipping device -trees using the old string, so we'll keep recognizing that as this rev -of V3D. Still, we should use a more specific name in the upstream DT -to clarify which board is being supported, in case we do other revs of -V3D in the future. - -Signed-off-by: Eric Anholt <eric@anholt.net> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> ---- - drivers/gpu/drm/vc4/vc4_v3d.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c -index 31de5d1..e6d3c60 100644 ---- a/drivers/gpu/drm/vc4/vc4_v3d.c -+++ b/drivers/gpu/drm/vc4/vc4_v3d.c -@@ -268,6 +268,7 @@ static int vc4_v3d_dev_remove(struct platform_device *pdev) - } - - static const struct of_device_id vc4_v3d_dt_match[] = { -+ { .compatible = "brcm,bcm2835-v3d" }, - { .compatible = "brcm,vc4-v3d" }, - {} - }; --- -2.7.3 - -From 55acd7db60c8247d926969b705373765c26c1f44 Mon Sep 17 00:00:00 2001 -From: Martin Sperl <kernel@martin.sperl.org> -Date: Fri, 11 Sep 2015 11:22:05 +0000 -Subject: [PATCH 21/36] ARM: bcm2835: add the auxiliary spi1 and spi2 to the - device tree - -This enables the use of the auxiliary spi1 and spi2 devices -on the bcm2835 SOC. - -Note that this requires the use of the new clk-bcm2835-aux to work. - -Signed-off-by: Martin Sperl <kernel@martin.sperl.org> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> -[anholt: Rebased on 2835.dtsi -> 283x.dtsi change] -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 971e741..f0d4573 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -1,5 +1,6 @@ - #include <dt-bindings/pinctrl/bcm2835.h> - #include <dt-bindings/clock/bcm2835.h> -+#include <dt-bindings/clock/bcm2835-aux.h> - #include "skeleton.dtsi" - - /* This include file covers the common peripherals and configuration between -@@ -159,6 +160,26 @@ - clocks = <&clocks BCM2835_CLOCK_VPU>; - }; - -+ spi1: spi@7e215080 { -+ compatible = "brcm,bcm2835-aux-spi"; -+ reg = <0x7e215080 0x40>; -+ interrupts = <1 29>; -+ clocks = <&aux BCM2835_AUX_CLOCK_SPI1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi2: spi@7e2150c0 { -+ compatible = "brcm,bcm2835-aux-spi"; -+ reg = <0x7e2150c0 0x40>; -+ interrupts = <1 29>; -+ clocks = <&aux BCM2835_AUX_CLOCK_SPI2>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ - sdhci: sdhci@7e300000 { - compatible = "brcm,bcm2835-sdhci"; - reg = <0x7e300000 0x100>; --- -2.7.3 - -From 3e0a385cebe3b0d9338cab356c6a11daaa64f808 Mon Sep 17 00:00:00 2001 -From: Remi Pommarel <repk@triplefau.lt> -Date: Mon, 21 Dec 2015 21:12:59 +0100 -Subject: [PATCH 22/36] ARM: bcm2835: Add PWM clock support to the device tree - -Signed-off-by: Remi Pommarel <repk@triplefau.lt> -[anholt: Rebased on 2835.dtsi -> 283x.dtsi change] -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ++++ - arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ - 2 files changed, 14 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 3afb9fe..a584a93 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -58,3 +58,7 @@ - status = "okay"; - bus-width = <4>; - }; -+ -+&pwm { -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index f0d4573..e4a2792 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -180,6 +180,16 @@ - status = "disabled"; - }; - -+ pwm: pwm@7e20c000 { -+ compatible = "brcm,bcm2835-pwm"; -+ reg = <0x7e20c000 0x28>; -+ clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clock-rates = <10000000>; -+ #pwm-cells = <2>; -+ status = "disabled"; -+ }; -+ - sdhci: sdhci@7e300000 { - compatible = "brcm,bcm2835-sdhci"; - reg = <0x7e300000 0x100>; --- -2.7.3 - -From 84416a8360e7c31e6ba9f7775c077bd5f3fe32de Mon Sep 17 00:00:00 2001 -From: Lubomir Rintel <lkundrak@v3.sk> -Date: Mon, 25 Jan 2016 21:40:06 +0100 -Subject: [PATCH 23/36] ARM: bcm2835: dt: Add Raspberry Pi Model A - -This one is essentially the same as revision 2 B board (with the I2S on -P5 header). - -Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> -[anholt: Rebased on bcm2835.dtsi -> bcm283x.dtsi change] -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2835-rpi-a.dts | 24 ++++++++++++++++++++++++ - 2 files changed, 25 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2835-rpi-a.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index a4a6d70..d000814 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_AXXIA) += \ - axm5516-amarillo.dtb - dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b.dtb \ -+ bcm2835-rpi-a.dtb \ - bcm2835-rpi-b-rev2.dtb \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts -new file mode 100644 -index 0000000..ddbbbbd ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -0,0 +1,24 @@ -+/dts-v1/; -+#include "bcm2835.dtsi" -+#include "bcm2835-rpi.dtsi" -+ -+/ { -+ compatible = "raspberrypi,model-a", "brcm,bcm2835"; -+ model = "Raspberry Pi Model A"; -+ -+ leds { -+ act { -+ gpios = <&gpio 16 1>; -+ }; -+ }; -+}; -+ -+&gpio { -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; -+ -+ /* I2S interface */ -+ i2s_alt2: i2s_alt2 { -+ brcm,pins = <28 29 30 31>; -+ brcm,function = <BCM2835_FSEL_ALT2>; -+ }; -+}; --- -2.7.3 - -From f6fd06c97f0d6d8398b8caba1b6879fa7e0284ba Mon Sep 17 00:00:00 2001 -From: Alexander Aring <alex.aring@gmail.com> -Date: Wed, 16 Dec 2015 16:26:49 -0800 -Subject: [PATCH 24/36] ARM: bcm2835: Add the Raspberry Pi power domain driver - to the DT. - -This connects the USB driver to the USB power domain, so that USB can -actually be turned on at boot if the bootloader didn't do it for us. - -Signed-off-by: Alexander Aring <alex.aring@gmail.com> -Signed-off-by: Eric Anholt <eric@anholt.net> -Reviewed-by: Kevin Hilman <khilman@linaro.org> ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 12 ++++++++++++ - arch/arm/boot/dts/bcm283x.dtsi | 2 +- - 2 files changed, 13 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index a584a93..76bdbca 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -1,3 +1,5 @@ -+#include <dt-bindings/power/raspberrypi-power.h> -+ - / { - memory { - reg = <0 0x10000000>; -@@ -18,6 +20,12 @@ - compatible = "raspberrypi,bcm2835-firmware"; - mboxes = <&mailbox>; - }; -+ -+ power: power { -+ compatible = "raspberrypi,bcm2835-power"; -+ firmware = <&firmware>; -+ #power-domain-cells = <1>; -+ }; - }; - }; - -@@ -62,3 +70,7 @@ - &pwm { - status = "okay"; - }; -+ -+&usb { -+ power-domains = <&power RPI_POWER_DOMAIN_USB>; -+}; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index e4a2792..e69a6cf 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -218,7 +218,7 @@ - status = "disabled"; - }; - -- usb@7e980000 { -+ usb: usb@7e980000 { - compatible = "brcm,bcm2835-usb"; - reg = <0x7e980000 0x10000>; - interrupts = <1 9>; --- -2.7.3 - -From 580146c680ac7b706ac54d7d7db8204bee3d2e93 Mon Sep 17 00:00:00 2001 -From: Martin Sperl <kernel@martin.sperl.org> -Date: Fri, 12 Feb 2016 11:14:25 +0000 -Subject: [PATCH 25/36] ARM: bcm2835: add bcm2835-aux-uart support to DT - -Add bcm2835-aux-uart support to the device tree. - -Signed-off-by: Martin Sperl <kernel@martin.sperl.org> -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index e69a6cf..fc67964 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -160,6 +160,14 @@ - clocks = <&clocks BCM2835_CLOCK_VPU>; - }; - -+ uart1: serial@7e215040 { -+ compatible = "brcm,bcm2835-aux-uart"; -+ reg = <0x7e215040 0x40>; -+ interrupts = <1 29>; -+ clocks = <&aux BCM2835_AUX_CLOCK_UART>; -+ status = "disabled"; -+ }; -+ - spi1: spi@7e215080 { - compatible = "brcm,bcm2835-aux-spi"; - reg = <0x7e215080 0x40>; --- -2.7.3 - -From 41135d2ce60509e53306e5b76afab98ddc15951b Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Mon, 2 Mar 2015 14:36:16 -0800 -Subject: [PATCH 26/36] ARM: bcm2835: Add VC4 to the device tree. - -VC4 is the GPU (display and 3D) present on the 283x. - -v2: Sort by register address, mark HDMI as disabled by default in the - SoC file and enable it from -rpi. -v3: Add references to the pixel/HSM clocks for HDMI. Rename - compatibility strings and clean up node names. -v4: Fix comment marking pv0's interrupt as pwa2 instead of pwa0. - Rename hpd-gpio to hpd-gpios. -v5: Rebase on bcm283x.dtsi change, add v3d. -v6: Make HDMI reference the power domain. -v7: Fix the HDMI HPD gpios active value and HDMI enable for each RPI - board. Change V3D compatible string to 2835. - -Signed-off-by: Eric Anholt <eric@anholt.net> ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 +++ - arch/arm/boot/dts/bcm2835-rpi-a.dts | 4 +++ - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 4 +++ - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 4 +++ - arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 +++ - arch/arm/boot/dts/bcm2835-rpi.dtsi | 9 ++++++ - arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 4 +++ - arch/arm/boot/dts/bcm283x.dtsi | 47 ++++++++++++++++++++++++++++++++ - 8 files changed, 80 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -index 228614f..35ff4e7a 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -29,3 +29,7 @@ - brcm,function = <BCM2835_FSEL_ALT0>; - }; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts -index ddbbbbd..306a84e 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -22,3 +22,7 @@ - brcm,function = <BCM2835_FSEL_ALT2>; - }; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -index ef54050..57d313b 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -29,3 +29,7 @@ - brcm,function = <BCM2835_FSEL_ALT0>; - }; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -index 86f1f2f..cf2774e 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -22,3 +22,7 @@ - brcm,function = <BCM2835_FSEL_ALT2>; - }; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts -index 4859e9d..8b15f9c 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -16,3 +16,7 @@ - &gpio { - pinctrl-0 = <&gpioout &alt0 &alt3>; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 76bdbca..caf2707 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -74,3 +74,12 @@ - &usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; - }; -+ -+&v3d { -+ power-domains = <&power RPI_POWER_DOMAIN_V3D>; -+}; -+ -+&hdmi { -+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -index ff94666..c4743f4 100644 ---- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -@@ -33,3 +33,7 @@ - brcm,function = <BCM2835_FSEL_ALT0>; - }; - }; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index fc67964..bbe4eab 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -1,6 +1,7 @@ - #include <dt-bindings/pinctrl/bcm2835.h> - #include <dt-bindings/clock/bcm2835.h> - #include <dt-bindings/clock/bcm2835-aux.h> -+#include <dt-bindings/gpio/gpio.h> - #include "skeleton.dtsi" - - /* This include file covers the common peripherals and configuration between -@@ -153,6 +154,18 @@ - status = "disabled"; - }; - -+ pixelvalve@7e206000 { -+ compatible = "brcm,bcm2835-pixelvalve0"; -+ reg = <0x7e206000 0x100>; -+ interrupts = <2 13>; /* pwa0 */ -+ }; -+ -+ pixelvalve@7e207000 { -+ compatible = "brcm,bcm2835-pixelvalve1"; -+ reg = <0x7e207000 0x100>; -+ interrupts = <2 14>; /* pwa1 */ -+ }; -+ - aux: aux@0x7e215000 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <1>; -@@ -206,6 +219,12 @@ - status = "disabled"; - }; - -+ hvs@7e400000 { -+ compatible = "brcm,bcm2835-hvs"; -+ reg = <0x7e400000 0x6000>; -+ interrupts = <2 1>; -+ }; -+ - i2c1: i2c@7e804000 { - compatible = "brcm,bcm2835-i2c"; - reg = <0x7e804000 0x1000>; -@@ -226,11 +245,39 @@ - status = "disabled"; - }; - -+ pixelvalve@7e807000 { -+ compatible = "brcm,bcm2835-pixelvalve2"; -+ reg = <0x7e807000 0x100>; -+ interrupts = <2 10>; /* pixelvalve */ -+ }; -+ -+ hdmi: hdmi@7e902000 { -+ compatible = "brcm,bcm2835-hdmi"; -+ reg = <0x7e902000 0x600>, -+ <0x7e808000 0x100>; -+ interrupts = <2 8>, <2 9>; -+ ddc = <&i2c2>; -+ clocks = <&clocks BCM2835_PLLH_PIX>, -+ <&clocks BCM2835_CLOCK_HSM>; -+ clock-names = "pixel", "hdmi"; -+ status = "disabled"; -+ }; -+ - usb: usb@7e980000 { - compatible = "brcm,bcm2835-usb"; - reg = <0x7e980000 0x10000>; - interrupts = <1 9>; - }; -+ -+ v3d: v3d@7ec00000 { -+ compatible = "brcm,bcm2835-v3d"; -+ reg = <0x7ec00000 0x1000>; -+ interrupts = <1 10>; -+ }; -+ -+ vc4: gpu { -+ compatible = "brcm,bcm2835-vc4"; -+ }; - }; - - clocks { --- -2.7.3 - -From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 4 Mar 2016 10:39:28 -0800 -Subject: [PATCH 27/36] dt-bindings: Add root properties for Raspberry Pi 3 - -Signed-off-by: Eric Anholt <eric@anholt.net> -Acked-by: Rob Herring <robh@kernel.org> ---- - Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -index 11d3056..6ffe087 100644 ---- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt -@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B - Required root node properties: - compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; - -+Raspberry Pi 3 Model B -+Required root node properties: -+compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -+ - Raspberry Pi Compute Module - Required root node properties: - compatible = "raspberrypi,compute-module", "brcm,bcm2835"; --- -2.7.3 - -From b76b1cdf2e569cceab41dcf3b3f6a90965d0a02c Mon Sep 17 00:00:00 2001 -From: Eric Anholt <eric@anholt.net> -Date: Fri, 4 Mar 2016 10:39:29 -0800 -Subject: [PATCH 28/36] ARM: bcm2835: Add devicetree for the Raspberry Pi 3. - -For now this doesn't support the new hardware present on the Pi 3 (BT, -wifi, GPIO expander). Since the GPIO expander isn't supported, we -also don't have the LEDs like the other board files do. - -Signed-off-by: Eric Anholt <eric@anholt.net> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> ---- - arch/arm/boot/dts/Makefile | 3 +- - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++ - arch/arm/boot/dts/bcm2837.dtsi | 68 +++++++++++++++++++++++++++++++++++ - 3 files changed, 92 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - create mode 100644 arch/arm/boot/dts/bcm2837.dtsi - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index d000814..a8a0767 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -64,7 +64,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b-rev2.dtb \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ -- bcm2836-rpi-2-b.dtb -+ bcm2836-rpi-2-b.dtb \ -+ bcm2837-rpi-3-b.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ - bcm4708-asus-rt-ac68u.dtb \ -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 100644 -index 0000000..5e8eafd ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -0,0 +1,22 @@ -+/dts-v1/; -+#include "bcm2837.dtsi" -+#include "bcm2835-rpi.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -+ model = "Raspberry Pi 3 Model B"; -+ -+ memory { -+ reg = <0 0x40000000>; -+ }; -+}; -+ -+&gpio { -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; -+ -+ /* I2S interface */ -+ i2s_alt0: i2s_alt0 { -+ brcm,pins = <28 29 30 31>; -+ brcm,function = <BCM2835_FSEL_ALT2>; -+ }; -+}; -diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi -new file mode 100644 -index 0000000..2f36722 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837.dtsi -@@ -0,0 +1,68 @@ -+#include "bcm283x.dtsi" -+ -+/ { -+ compatible = "brcm,bcm2836"; -+ -+ soc { -+ ranges = <0x7e000000 0x3f000000 0x1000000>, -+ <0x40000000 0x40000000 0x00001000>; -+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>; -+ -+ local_intc: local_intc { -+ compatible = "brcm,bcm2836-l1-intc"; -+ reg = <0x40000000 0x100>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&local_intc>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupt-parent = <&local_intc>; -+ interrupts = <0>, // PHYS_SECURE_PPI -+ <1>, // PHYS_NONSECURE_PPI -+ <3>, // VIRT_PPI -+ <2>; // HYP_PPI -+ always-on; -+ }; -+ -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <0>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <1>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <2>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <3>; -+ }; -+ }; -+}; -+ -+/* Make the BCM2835-style global interrupt controller be a child of the -+ * CPU-local interrupt controller. -+ */ -+&intc { -+ compatible = "brcm,bcm2836-armctrl-ic"; -+ reg = <0x7e00b200 0x200>; -+ interrupt-parent = <&local_intc>; -+ interrupts = <8>; -+}; --- -2.7.3 - -From 43aa67b7bccfb189a3e57832f08710c98fe707c6 Mon Sep 17 00:00:00 2001 -From: Martin Sperl <kernel@martin.sperl.org> -Date: Sun, 17 Jan 2016 12:15:28 +0000 -Subject: [PATCH 29/36] ARM: bcm2835: follow dt uart node-naming convention - -This patch fixes the naming of the device tree node: uart@7e201000 -to conform to the standard of: serial@7e201000 - -Signed-off-by: Martin Sperl <kernel@martin.sperl.org> ---- - arch/arm/boot/dts/bcm283x.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index bbe4eab..31cc2f2 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -113,7 +113,7 @@ - #interrupt-cells = <2>; - }; - -- uart0: uart@7e201000 { -+ uart0: serial@7e201000 { - compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; - reg = <0x7e201000 0x1000>; - interrupts = <2 25>; --- -2.7.3 - -From 72b53a14be5ff0bda535faefa09bc9726acbe1ff Mon Sep 17 00:00:00 2001 -From: Martin Sperl <kernel@martin.sperl.org> -Date: Sun, 17 Jan 2016 12:15:29 +0000 -Subject: [PATCH 30/36] dt/bindings: serial: bcm2835: add binding documentation - for bcm2835-aux-uart - -Add binding documentation for the bcm2835-aux-uart driver. - -Signed-off-by: Martin Sperl <kernel@martin.sperl.org> - -Changelog: - V2->V3: fixed naming convention for node -Acked-by: Rob Herring <robh@kernel.org> -Acked-by: Eric Anholt <eric@anholt.net> ---- - .../bindings/serial/brcm,bcm2835-aux-uart.txt | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - create mode 100644 Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt - -diff --git a/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt b/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt -new file mode 100644 -index 0000000..b5cc629 ---- /dev/null -+++ b/Documentation/devicetree/bindings/serial/brcm,bcm2835-aux-uart.txt -@@ -0,0 +1,18 @@ -+* BCM2835 AUXILIAR UART -+ -+Required properties: -+ -+- compatible: "brcm,bcm2835-aux-uart" -+- reg: The base address of the UART register bank. -+- interrupts: A single interrupt specifier. -+- clocks: Clock driving the hardware; used to figure out the baud rate -+ divisor. -+ -+Example: -+ -+ uart1: serial@7e215040 { -+ compatible = "brcm,bcm2835-aux-uart"; -+ reg = <0x7e215040 0x40>; -+ interrupts = <1 29>; -+ clocks = <&aux BCM2835_AUX_CLOCK_UART>; -+ }; --- -2.7.3 - -From 285a4ac466d3712b50f5c0d29bf5874476f00c30 Mon Sep 17 00:00:00 2001 -From: Martin Sperl <kernel@martin.sperl.org> -Date: Sun, 17 Jan 2016 12:15:30 +0000 -Subject: [PATCH 31/36] serial: bcm2835: add driver for bcm2835-aux-uart - -The bcm2835 SOC contains an auxiliary uart, which is very close -to the ns16550 with some differences. - -The big difference is that the uart HW is not using an internal divider -of 16 but 8, which results in an effictive baud-rate being twice -the requested baud-rate. - -This driver handles this device correctly and handles the difference in -the HW divider by scaling up the clock by a factor of 2. - -The approach to write a separate (wrapper) driver instead of using a -multiplying clock and "ns16550" as compatibility in the device-tree -has been recommended by Stephen Warren. - -Signed-off-by: Martin Sperl <kernel@martin.sperl.org> - -Changelog: - V1->V2: made an explicit bcm2835-aux-uart driver - not conrolling the settings via DT only - V2->V3: added comments on UART capabilities - applied recommendations by Stefan Wahren - keep registered line-id in bcm2835aux_data -Acked-by: Eric Anholt <eric@anholt.net> ---- - drivers/tty/serial/8250/8250_bcm2835aux.c | 146 ++++++++++++++++++++++++++++++ - drivers/tty/serial/8250/Kconfig | 24 +++++ - drivers/tty/serial/8250/Makefile | 1 + - 3 files changed, 171 insertions(+) - create mode 100644 drivers/tty/serial/8250/8250_bcm2835aux.c - -diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c -new file mode 100644 -index 0000000..ecf89f1 ---- /dev/null -+++ b/drivers/tty/serial/8250/8250_bcm2835aux.c -@@ -0,0 +1,146 @@ -+/* -+ * Serial port driver for BCM2835AUX UART -+ * -+ * Copyright (C) 2016 Martin Sperl <kernel@martin.sperl.org> -+ * -+ * Based on 8250_lpc18xx.c: -+ * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com> -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/clk.h> -+#include <linux/io.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/platform_device.h> -+ -+#include "8250.h" -+ -+struct bcm2835aux_data { -+ struct uart_8250_port uart; -+ struct clk *clk; -+ int line; -+}; -+ -+static int bcm2835aux_serial_probe(struct platform_device *pdev) -+{ -+ struct bcm2835aux_data *data; -+ struct resource *res; -+ int ret; -+ -+ /* allocate the custom structure */ -+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ -+ /* initialize data */ -+ spin_lock_init(&data->uart.port.lock); -+ data->uart.capabilities = UART_CAP_FIFO; -+ data->uart.port.dev = &pdev->dev; -+ data->uart.port.regshift = 2; -+ data->uart.port.type = PORT_16550; -+ data->uart.port.iotype = UPIO_MEM; -+ data->uart.port.fifosize = 8; -+ data->uart.port.flags = UPF_SHARE_IRQ | -+ UPF_FIXED_PORT | -+ UPF_FIXED_TYPE | -+ UPF_SKIP_TEST; -+ -+ /* get the clock - this also enables the HW */ -+ data->clk = devm_clk_get(&pdev->dev, NULL); -+ ret = PTR_ERR_OR_ZERO(data->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "could not get clk: %d\n", ret); -+ return ret; -+ } -+ -+ /* get the interrupt */ -+ data->uart.port.irq = platform_get_irq(pdev, 0); -+ if (data->uart.port.irq < 0) { -+ dev_err(&pdev->dev, "irq not found - %i", -+ data->uart.port.irq); -+ return data->uart.port.irq; -+ } -+ -+ /* map the main registers */ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "memory resource not found"); -+ return -EINVAL; -+ } -+ data->uart.port.membase = devm_ioremap_resource(&pdev->dev, res); -+ ret = PTR_ERR_OR_ZERO(data->uart.port.membase); -+ if (ret) -+ return ret; -+ -+ /* Check for a fixed line number */ -+ ret = of_alias_get_id(pdev->dev.of_node, "serial"); -+ if (ret >= 0) -+ data->uart.port.line = ret; -+ -+ /* enable the clock as a last step */ -+ ret = clk_prepare_enable(data->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to enable uart clock - %d\n", -+ ret); -+ return ret; -+ } -+ -+ /* the HW-clock divider for bcm2835aux is 8, -+ * but 8250 expects a divider of 16, -+ * so we have to multiply the actual clock by 2 -+ * to get identical baudrates. -+ */ -+ data->uart.port.uartclk = clk_get_rate(data->clk) * 2; -+ -+ /* register the port */ -+ ret = serial8250_register_8250_port(&data->uart); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "unable to register 8250 port - %d\n", -+ ret); -+ goto dis_clk; -+ } -+ data->line = ret; -+ -+ platform_set_drvdata(pdev, data); -+ -+ return 0; -+ -+dis_clk: -+ clk_disable_unprepare(data->clk); -+ return ret; -+} -+ -+static int bcm2835aux_serial_remove(struct platform_device *pdev) -+{ -+ struct bcm2835aux_data *data = platform_get_drvdata(pdev); -+ -+ serial8250_unregister_port(data->uart.port.line); -+ clk_disable_unprepare(data->clk); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm2835aux_serial_match[] = { -+ { .compatible = "brcm,bcm2835-aux-uart" }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, bcm2835aux_serial_match); -+ -+static struct platform_driver bcm2835aux_serial_driver = { -+ .driver = { -+ .name = "bcm2835-aux-uart", -+ .of_match_table = bcm2835aux_serial_match, -+ }, -+ .probe = bcm2835aux_serial_probe, -+ .remove = bcm2835aux_serial_remove, -+}; -+module_platform_driver(bcm2835aux_serial_driver); -+ -+MODULE_DESCRIPTION("BCM2835 auxiliar UART driver"); -+MODULE_AUTHOR("Martin Sperl <kernel@martin.sperl.org>"); -+MODULE_LICENSE("GPL v2"); -diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig -index b03cb517..67ad6b0 100644 ---- a/drivers/tty/serial/8250/Kconfig -+++ b/drivers/tty/serial/8250/Kconfig -@@ -272,6 +272,30 @@ config SERIAL_8250_ACORN - system, say Y to this option. The driver can handle 1, 2, or 3 port - cards. If unsure, say N. - -+config SERIAL_8250_BCM2835AUX -+ tristate "BCM2835 auxiliar mini UART support" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on SERIAL_8250 && SERIAL_8250_SHARE_IRQ -+ help -+ Support for the BCM2835 auxiliar mini UART. -+ -+ Features and limitations of the UART are -+ Registers are similar to 16650 registers, -+ set bits in the control registers that are unsupported -+ are ignored and read back as 0 -+ 7/8 bit operation with 1 start and 1 stop bit -+ 8 symbols deep fifo for rx and tx -+ SW controlled RTS and SW readable CTS -+ Clock rate derived from system clock -+ Uses 8 times oversampling (compared to 16 times for 16650) -+ Missing break detection (but break generation) -+ Missing framing error detection -+ Missing parity bit -+ Missing receive time-out interrupt -+ Missing DCD, DSR, DTR and RI signals -+ -+ If unsure, say N. -+ - config SERIAL_8250_FSL - bool - depends on SERIAL_8250_CONSOLE -diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile -index b9b9bca..5c1869f 100644 ---- a/drivers/tty/serial/8250/Makefile -+++ b/drivers/tty/serial/8250/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o - obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o - obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o - obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o -+obj-$(CONFIG_SERIAL_8250_BCM2835AUX) += 8250_bcm2835aux.o - obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o - obj-$(CONFIG_SERIAL_8250_FOURPORT) += 8250_fourport.o - obj-$(CONFIG_SERIAL_8250_ACCENT) += 8250_accent.o --- -2.7.3 - -From 528285e99c25249456023d28f521689bf9e9eb8b Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Wed, 30 Mar 2016 09:35:13 +0100 -Subject: [PATCH 32/36] drop usb power domain support for the moment, kills usb - ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ---- - 1 file changed, 4 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index caf2707..b1e8145 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -71,10 +71,6 @@ - status = "okay"; - }; - --&usb { -- power-domains = <&power RPI_POWER_DOMAIN_USB>; --}; -- - &v3d { - power-domains = <&power RPI_POWER_DOMAIN_V3D>; - }; --- -2.7.3 - -From 6af83c5ff7f5514f32b1b3fa6d8d7dfe77e3acce Mon Sep 17 00:00:00 2001 -From: Stefan Wahren <stefan.wahren@i2se.com> -Date: Sun, 17 Jan 2016 14:59:00 +0000 -Subject: [PATCH 33/36] mmc: sdhci-iproc: Clean up platform allocations if - shdci init fails - -This patch adopts the changes from 475c9e43bfa7 ("mmc: sdhci-bcm2835: -Clean up platform allocations if sdhci init fails") to sdhci-iproc. - -Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> -Acked-by: Scott Branden <sbranden@broadcom.com> -Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> ---- - drivers/mmc/host/sdhci-iproc.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index 3b423b0..e22060a 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -213,7 +213,11 @@ static int sdhci_iproc_probe(struct platform_device *pdev) - host->caps1 = iproc_host->data->caps1; - } - -- return sdhci_add_host(host); -+ ret = sdhci_add_host(host); -+ if (ret) -+ goto err; -+ -+ return 0; - - err: - sdhci_pltfm_free(pdev); --- -2.7.3 - -From 1565145761d5d94991e4763001c9e60c655818f1 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren <stefan.wahren@i2se.com> -Date: Sun, 17 Jan 2016 14:59:01 +0000 -Subject: [PATCH 34/36] mmc: sdhci-iproc: Actually enable the clock - -The RPi firmware-based clocks driver can actually disable -unused clocks, so when switching to use it we ended up losing -our MMC clock once all devices were probed. - -This patch adopts the changes from 1e5a0a9a58e2 ("mmc: sdhci-bcm2835: -Actually enable the clock") to sdhci-iproc. - -Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> -Acked-by: Scott Branden <sbranden@broadcom.com> -Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> ---- - drivers/mmc/host/sdhci-iproc.c | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index e22060a..55bc348 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -207,6 +207,11 @@ static int sdhci_iproc_probe(struct platform_device *pdev) - ret = PTR_ERR(pltfm_host->clk); - goto err; - } -+ ret = clk_prepare_enable(pltfm_host->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to enable host clk\n"); -+ goto err; -+ } - - if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) { - host->caps = iproc_host->data->caps; -@@ -215,10 +220,12 @@ static int sdhci_iproc_probe(struct platform_device *pdev) - - ret = sdhci_add_host(host); - if (ret) -- goto err; -+ goto err_clk; - - return 0; - -+err_clk: -+ clk_disable_unprepare(pltfm_host->clk); - err: - sdhci_pltfm_free(pdev); - return ret; --- -2.7.3 - -From 49ebf153a97a0840c1e54f934411aceb93bbdee4 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren <stefan.wahren@i2se.com> -Date: Wed, 27 Jan 2016 22:25:40 +0000 -Subject: [PATCH 35/36] mmc: sdhci-iproc: define MMC caps in platform data - -This patch moves the definition of the MMC capabilities -from the probe function into iproc platform data. After -that we are able to add support for another platform more -easily. - -Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> -Suggested-by: Stephen Warren <swarren@wwwdotorg.org> -Acked-by: Scott Branden <sbranden@broadcom.com> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> -Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> ---- - drivers/mmc/host/sdhci-iproc.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index 55bc348..cdc6c4a 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -26,6 +26,7 @@ struct sdhci_iproc_data { - const struct sdhci_pltfm_data *pdata; - u32 caps; - u32 caps1; -+ u32 mmc_caps; - }; - - struct sdhci_iproc_host { -@@ -165,6 +166,7 @@ static const struct sdhci_iproc_data iproc_data = { - .pdata = &sdhci_iproc_pltfm_data, - .caps = 0x05E90000, - .caps1 = 0x00000064, -+ .mmc_caps = MMC_CAP_1_8V_DDR, - }; - - static const struct of_device_id sdhci_iproc_of_match[] = { -@@ -199,8 +201,7 @@ static int sdhci_iproc_probe(struct platform_device *pdev) - mmc_of_parse(host->mmc); - sdhci_get_of_property(pdev); - -- /* Enable EMMC 1/8V DDR capable */ -- host->mmc->caps |= MMC_CAP_1_8V_DDR; -+ host->mmc->caps |= iproc_host->data->mmc_caps; - - pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(pltfm_host->clk)) { --- -2.7.3 - -From 208897fb02fa78d06f960916bc3781c8a060ab72 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren <stefan.wahren@i2se.com> -Date: Wed, 27 Jan 2016 22:25:41 +0000 -Subject: [PATCH 36/36] mmc: sdhci-iproc: add bcm2835 support - -Scott Branden from Broadcom said that the BCM2835 eMMC IP core is -very similar to IPROC and share most of the quirks. So use this driver -instead of separate one. - -The sdhci-iproc contains a better workaround for the clock domain -crossing problem which doesn't need any delays. This results in a -better write performance. - -Btw we get the rid of the SDHCI_CAPABILITIES hack in the sdhci_readl -function. - -Suggested-by: Scott Branden <sbranden@broadcom.com> -Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> -Acked-by: Eric Anholt <eric@anholt.net> -Acked-by: Scott Branden <sbranden@broadcom.com> -Acked-by: Stephen Warren <swarren@wwwdotorg.org> -Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> ---- - drivers/mmc/host/Kconfig | 6 +++--- - drivers/mmc/host/sdhci-iproc.c | 15 +++++++++++++++ - 2 files changed, 18 insertions(+), 3 deletions(-) - -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index 1526b8a..60de1e4 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -318,15 +318,15 @@ config MMC_SDHCI_F_SDH30 - If unsure, say N. - - config MMC_SDHCI_IPROC -- tristate "SDHCI platform support for the iProc SD/MMC Controller" -- depends on ARCH_BCM_IPROC || COMPILE_TEST -+ tristate "SDHCI support for the BCM2835 & iProc SD/MMC Controller" -+ depends on ARCH_BCM2835 || ARCH_BCM_IPROC || COMPILE_TEST - depends on MMC_SDHCI_PLTFM - default ARCH_BCM_IPROC - select MMC_SDHCI_IO_ACCESSORS - help - This selects the iProc SD/MMC controller. - -- If you have an IPROC platform with SD or MMC devices, -+ If you have a BCM2835 or IPROC platform with SD or MMC devices, - say Y or M here. - - If unsure, say N. -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index cdc6c4a..871c92c 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -169,7 +169,22 @@ static const struct sdhci_iproc_data iproc_data = { - .mmc_caps = MMC_CAP_1_8V_DDR, - }; - -+static const struct sdhci_pltfm_data sdhci_bcm2835_pltfm_data = { -+ .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | -+ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | -+ SDHCI_QUIRK_MISSING_CAPS, -+ .ops = &sdhci_iproc_ops, -+}; -+ -+static const struct sdhci_iproc_data bcm2835_data = { -+ .pdata = &sdhci_bcm2835_pltfm_data, -+ .caps = SDHCI_CAN_VDD_330, -+ .caps1 = 0x00000000, -+ .mmc_caps = 0x00000000, -+}; -+ - static const struct of_device_id sdhci_iproc_of_match[] = { -+ { .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data }, - { .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_data }, - { } - }; --- -2.7.3 - diff --git a/bcm283x-upstream-fixes.patch b/bcm283x-upstream-fixes.patch new file mode 100644 index 000000000..d8bb87ca0 --- /dev/null +++ b/bcm283x-upstream-fixes.patch @@ -0,0 +1,400 @@ +From 41135d2ce60509e53306e5b76afab98ddc15951b Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Mon, 2 Mar 2015 14:36:16 -0800 +Subject: [PATCH 26/36] ARM: bcm2835: Add VC4 to the device tree. + +VC4 is the GPU (display and 3D) present on the 283x. + +v2: Sort by register address, mark HDMI as disabled by default in the + SoC file and enable it from -rpi. +v3: Add references to the pixel/HSM clocks for HDMI. Rename + compatibility strings and clean up node names. +v4: Fix comment marking pv0's interrupt as pwa2 instead of pwa0. + Rename hpd-gpio to hpd-gpios. +v5: Rebase on bcm283x.dtsi change, add v3d. +v6: Make HDMI reference the power domain. +v7: Fix the HDMI HPD gpios active value and HDMI enable for each RPI + board. Change V3D compatible string to 2835. + +Signed-off-by: Eric Anholt <eric@anholt.net> +--- + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 +++ + arch/arm/boot/dts/bcm2835-rpi-a.dts | 4 +++ + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 4 +++ + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 4 +++ + arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 +++ + arch/arm/boot/dts/bcm2835-rpi.dtsi | 9 ++++++ + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 4 +++ + arch/arm/boot/dts/bcm283x.dtsi | 47 ++++++++++++++++++++++++++++++++ + 8 files changed, 80 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +index 228614f..35ff4e7a 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -29,3 +29,7 @@ + brcm,function = <BCM2835_FSEL_ALT0>; + }; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts +index ddbbbbd..306a84e 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -22,3 +22,7 @@ + brcm,function = <BCM2835_FSEL_ALT2>; + }; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +index ef54050..57d313b 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -29,3 +29,7 @@ + brcm,function = <BCM2835_FSEL_ALT0>; + }; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +index 86f1f2f..cf2774e 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -22,3 +22,7 @@ + brcm,function = <BCM2835_FSEL_ALT2>; + }; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts +index 4859e9d..8b15f9c 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -16,3 +16,7 @@ + &gpio { + pinctrl-0 = <&gpioout &alt0 &alt3>; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; ++}; +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index 76bdbca..caf2707 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -74,3 +74,12 @@ + &usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; + }; ++ ++&v3d { ++ power-domains = <&power RPI_POWER_DOMAIN_V3D>; ++}; ++ ++&hdmi { ++ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +index ff94666..c4743f4 100644 +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -33,3 +33,7 @@ + brcm,function = <BCM2835_FSEL_ALT0>; + }; + }; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index fc67964..bbe4eab 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -1,6 +1,7 @@ + #include <dt-bindings/pinctrl/bcm2835.h> + #include <dt-bindings/clock/bcm2835.h> + #include <dt-bindings/clock/bcm2835-aux.h> ++#include <dt-bindings/gpio/gpio.h> + #include "skeleton.dtsi" + + /* This include file covers the common peripherals and configuration between +@@ -153,6 +154,18 @@ + status = "disabled"; + }; + ++ pixelvalve@7e206000 { ++ compatible = "brcm,bcm2835-pixelvalve0"; ++ reg = <0x7e206000 0x100>; ++ interrupts = <2 13>; /* pwa0 */ ++ }; ++ ++ pixelvalve@7e207000 { ++ compatible = "brcm,bcm2835-pixelvalve1"; ++ reg = <0x7e207000 0x100>; ++ interrupts = <2 14>; /* pwa1 */ ++ }; ++ + aux: aux@0x7e215000 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; +@@ -206,6 +219,12 @@ + status = "disabled"; + }; + ++ hvs@7e400000 { ++ compatible = "brcm,bcm2835-hvs"; ++ reg = <0x7e400000 0x6000>; ++ interrupts = <2 1>; ++ }; ++ + i2c1: i2c@7e804000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e804000 0x1000>; +@@ -226,11 +245,39 @@ + status = "disabled"; + }; + ++ pixelvalve@7e807000 { ++ compatible = "brcm,bcm2835-pixelvalve2"; ++ reg = <0x7e807000 0x100>; ++ interrupts = <2 10>; /* pixelvalve */ ++ }; ++ ++ hdmi: hdmi@7e902000 { ++ compatible = "brcm,bcm2835-hdmi"; ++ reg = <0x7e902000 0x600>, ++ <0x7e808000 0x100>; ++ interrupts = <2 8>, <2 9>; ++ ddc = <&i2c2>; ++ clocks = <&clocks BCM2835_PLLH_PIX>, ++ <&clocks BCM2835_CLOCK_HSM>; ++ clock-names = "pixel", "hdmi"; ++ status = "disabled"; ++ }; ++ + usb: usb@7e980000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x7e980000 0x10000>; + interrupts = <1 9>; + }; ++ ++ v3d: v3d@7ec00000 { ++ compatible = "brcm,bcm2835-v3d"; ++ reg = <0x7ec00000 0x1000>; ++ interrupts = <1 10>; ++ }; ++ ++ vc4: gpu { ++ compatible = "brcm,bcm2835-vc4"; ++ }; + }; + + clocks { +-- +2.7.3 + +From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Fri, 4 Mar 2016 10:39:28 -0800 +Subject: [PATCH 27/36] dt-bindings: Add root properties for Raspberry Pi 3 + +Signed-off-by: Eric Anholt <eric@anholt.net> +Acked-by: Rob Herring <robh@kernel.org> +--- + Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt +index 11d3056..6ffe087 100644 +--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt ++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt +@@ -30,6 +30,10 @@ Raspberry Pi 2 Model B + Required root node properties: + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; + ++Raspberry Pi 3 Model B ++Required root node properties: ++compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ++ + Raspberry Pi Compute Module + Required root node properties: + compatible = "raspberrypi,compute-module", "brcm,bcm2835"; +-- +2.7.3 + +From b76b1cdf2e569cceab41dcf3b3f6a90965d0a02c Mon Sep 17 00:00:00 2001 +From: Eric Anholt <eric@anholt.net> +Date: Fri, 4 Mar 2016 10:39:29 -0800 +Subject: [PATCH 28/36] ARM: bcm2835: Add devicetree for the Raspberry Pi 3. + +For now this doesn't support the new hardware present on the Pi 3 (BT, +wifi, GPIO expander). Since the GPIO expander isn't supported, we +also don't have the LEDs like the other board files do. + +Signed-off-by: Eric Anholt <eric@anholt.net> +Acked-by: Stephen Warren <swarren@wwwdotorg.org> +--- + arch/arm/boot/dts/Makefile | 3 +- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++ + arch/arm/boot/dts/bcm2837.dtsi | 68 +++++++++++++++++++++++++++++++++++ + 3 files changed, 92 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts + create mode 100644 arch/arm/boot/dts/bcm2837.dtsi + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index d000814..a8a0767 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -64,7 +64,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2835-rpi-b-rev2.dtb \ + bcm2835-rpi-b-plus.dtb \ + bcm2835-rpi-a-plus.dtb \ +- bcm2836-rpi-2-b.dtb ++ bcm2836-rpi-2-b.dtb \ ++ bcm2837-rpi-3-b.dtb + dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm4708-asus-rt-ac56u.dtb \ + bcm4708-asus-rt-ac68u.dtb \ +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +new file mode 100644 +index 0000000..5e8eafd +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -0,0 +1,22 @@ ++/dts-v1/; ++#include "bcm2837.dtsi" ++#include "bcm2835-rpi.dtsi" ++ ++/ { ++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ++ model = "Raspberry Pi 3 Model B"; ++ ++ memory { ++ reg = <0 0x40000000>; ++ }; ++}; ++ ++&gpio { ++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; ++ ++ /* I2S interface */ ++ i2s_alt0: i2s_alt0 { ++ brcm,pins = <28 29 30 31>; ++ brcm,function = <BCM2835_FSEL_ALT2>; ++ }; ++}; +diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi +new file mode 100644 +index 0000000..2f36722 +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2837.dtsi +@@ -0,0 +1,68 @@ ++#include "bcm283x.dtsi" ++ ++/ { ++ compatible = "brcm,bcm2836"; ++ ++ soc { ++ ranges = <0x7e000000 0x3f000000 0x1000000>, ++ <0x40000000 0x40000000 0x00001000>; ++ dma-ranges = <0xc0000000 0x00000000 0x3f000000>; ++ ++ local_intc: local_intc { ++ compatible = "brcm,bcm2836-l1-intc"; ++ reg = <0x40000000 0x100>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ interrupt-parent = <&local_intc>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupt-parent = <&local_intc>; ++ interrupts = <0>, // PHYS_SECURE_PPI ++ <1>, // PHYS_NONSECURE_PPI ++ <3>, // VIRT_PPI ++ <2>; // HYP_PPI ++ always-on; ++ }; ++ ++ cpus: cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <0>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <1>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <2>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a53"; ++ reg = <3>; ++ }; ++ }; ++}; ++ ++/* Make the BCM2835-style global interrupt controller be a child of the ++ * CPU-local interrupt controller. ++ */ ++&intc { ++ compatible = "brcm,bcm2836-armctrl-ic"; ++ reg = <0x7e00b200 0x200>; ++ interrupt-parent = <&local_intc>; ++ interrupts = <8>; ++}; +-- +2.7.3 + +From 528285e99c25249456023d28f521689bf9e9eb8b Mon Sep 17 00:00:00 2001 +From: Peter Robinson <pbrobinson@gmail.com> +Date: Wed, 30 Mar 2016 09:35:13 +0100 +Subject: [PATCH 32/36] drop usb power domain support for the moment, kills usb + +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index caf2707..b1e8145 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -71,10 +71,6 @@ + status = "okay"; + }; + +-&usb { +- power-domains = <&power RPI_POWER_DOMAIN_USB>; +-}; +- + &v3d { + power-domains = <&power RPI_POWER_DOMAIN_V3D>; + }; +-- +2.7.3 + diff --git a/config-arm-generic b/config-arm-generic index 9cebbb0f6..9ea02cf1d 100644 --- a/config-arm-generic +++ b/config-arm-generic @@ -41,13 +41,15 @@ CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_ARM_PMU=y +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set + # ARM AMBA generic HW CONFIG_ARM_AMBA=y CONFIG_KERNEL_MODE_NEON=y CONFIG_ARM_CCI=y CONFIG_ARM_CCN=y CONFIG_ARM_CCI400_PMU=y -CONFIG_ARM_CCI500_PMU=y +CONFIG_ARM_CCI5xx_PMU=y CONFIG_ARM_DMA_USE_IOMMU=y CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 CONFIG_ARM_GIC=y @@ -75,7 +77,6 @@ CONFIG_CRYPTO_AES_ARM_BS=y CONFIG_CRYPTO_SHA1_ARM=y CONFIG_CRYPTO_SHA256_ARM=y CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA512_ARM_NEON=y CONFIG_CRYPTO_SHA512_ARM=y # EDAC @@ -128,6 +129,7 @@ CONFIG_ROCKCHIP_THERMAL=m CONFIG_DRM_ROCKCHIP=m CONFIG_ROCKCHIP_DW_HDMI=m CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_INNO_HDMI=m CONFIG_PHY_ROCKCHIP_USB=m CONFIG_DWMAC_ROCKCHIP=m CONFIG_SND_SOC_ROCKCHIP=m @@ -139,9 +141,11 @@ CONFIG_REGULATOR_ACT8865=m CONFIG_ROCKCHIP_PM_DOMAINS=y CONFIG_CRYPTO_DEV_ROCKCHIP=m CONFIG_ROCKCHIP_EFUSE=m +CONFIG_PHY_ROCKCHIP_EMMC=m +CONFIG_PHY_ROCKCHIP_DP=m +CONFIG_ROCKCHIP_MBOX=y # Tegra -CONFIG_ARM_TEGRA_CPUFREQ=y CONFIG_TEGRA_MC=y CONFIG_TEGRA124_EMC=y CONFIG_TEGRA_IOMMU_SMMU=y @@ -166,7 +170,6 @@ CONFIG_TEGRA_SOCTHERM=m CONFIG_TEGRA_HOST1X=m CONFIG_TEGRA_HOST1X_FIREWALL=y CONFIG_DRM_TEGRA=m -CONFIG_DRM_TEGRA_FBDEV=y # CONFIG_DRM_TEGRA_DEBUG is not set CONFIG_DRM_TEGRA_STAGING=y CONFIG_NOUVEAU_PLATFORM_DRIVER=y @@ -178,7 +181,7 @@ CONFIG_SND_HDA_TEGRA=m # Qualcomm - Don't currently support IPQ router devices # CONFIG_IPQ_GCC_806X is not set # CONFIG_IPQ_LCC_806X is not set -# CONFIG_IPQ_GCC_4019 is not st +# CONFIG_IPQ_GCC_4019 is not set # CONFIG_PHY_QCOM_IPQ806X_SATA is not set # CONFIG_DWMAC_IPQ806X is not set # CONFIG_PINCTRL_IPQ8064 is not set @@ -203,6 +206,7 @@ CONFIG_ARM_PSCI=y CONFIG_THERMAL=y CONFIG_CLOCK_THERMAL=y CONFIG_CPUFREQ_DT=m +CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_DEVFREQ_THERMAL=y # CONFIG_ARM_CPUIDLE is not set # CONFIG_ARM_DT_BL_CPUFREQ is not set @@ -335,10 +339,8 @@ CONFIG_MMC_SDHCI_OF_ARASAN=m # LCD Panels CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL_SIMPLE=m -CONFIG_DRM_PANEL_LD9040=m CONFIG_DRM_PANEL_LG_LG4573=m CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m -CONFIG_DRM_PANEL_S6E8AA0=m CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m CONFIG_DRM_PANEL_SAMSUNG_LD9040=m @@ -347,17 +349,14 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m # Designware (used by numerous devices) CONFIG_MMC_DW=m CONFIG_MMC_DW_PLTFM=m -CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_K3=m CONFIG_MMC_DW_PCI=m CONFIG_SPI_DW_MMIO=m CONFIG_SPI_DW_PCI=m # CONFIG_SPI_DW_MID_DMA is not set -# CONFIG_MMC_DW_IDMAC is not set # CONFIG_MMC_QCOM_DML is not set CONFIG_USB_DWC2=m CONFIG_USB_DWC2_DUAL_ROLE=y -CONFIG_USB_DWC2_PLATFORM=m CONFIG_USB_DWC2_PCI=m # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set @@ -365,7 +364,6 @@ CONFIG_USB_DWC3=m CONFIG_USB_DWC3_DUAL_ROLE=y CONFIG_USB_DWC3_PCI=m CONFIG_USB_DWC3_OF_SIMPLE=m -# CONFIG_USB_DWC3_DEBUG is not set CONFIG_USB_DWC3_ULPI=y CONFIG_DW_WATCHDOG=m CONFIG_PCIE_DW=y @@ -483,7 +481,6 @@ CONFIG_VFIO_AMBA=m # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DRM_ARMADA is not set -# CONFIG_SHMOBILE_IOMMU is not set # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_QCOM is not set @@ -501,7 +498,6 @@ CONFIG_COMMON_CLK_SCPI=m # core -# CONFIG_INFINIBAND is not set # CONFIG_ISDN is not set # CONFIG_PCMCIA is not set # CONFIG_PARPORT is not set @@ -536,8 +532,6 @@ CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_SCSI_3W_SAS is not set # CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_CXGB3_ISCSI is not set -# CONFIG_SCSI_CXGB4_ISCSI is not set # CONFIG_SCSI_BFA_FC is not set # CONFIG_FUSION is not set # CONFIG_SCSI_3W_9XXX is not set @@ -584,6 +578,7 @@ CONFIG_NET_VENDOR_MELLANOX=y # drm # CONFIG_DRM_VMWGFX is not set +# CONFIG_DRM_HDLCD is not set # CONFIG_IMX_IPUV3_CORE is not set # CONFIG_DEBUG_SET_MODULE_RONX is not set diff --git a/config-arm64 b/config-arm64 index 71ba5c8cd..3c402a87d 100644 --- a/config-arm64 +++ b/config-arm64 @@ -8,16 +8,19 @@ CONFIG_ARCH_SEATTLE=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_XGENE=y +# CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_BCM_IPROC is not set # CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_EXYNOS7 is not set -# CONFIG_ARCH_FSL_LS2085A is not set +# CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_LAYERSCAPE is not set # CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set # CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_SPRD is not set # CONFIG_ARCH_STRATIX10 is not set # CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_VULCAN is not set # CONFIG_ARCH_ZYNQMP is not set # CONFIG_ARCH_UNIPHIER is not set @@ -31,6 +34,7 @@ CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_834220=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y # AMBA / VExpress # CONFIG_RTC_DRV_PL030 is not set @@ -45,6 +49,14 @@ CONFIG_ARM64_64K_PAGES=y CONFIG_ARM64_HW_AFDBM=y CONFIG_ARM64_PAN=y CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +CONFIG_ARM64_UAO=y + +# Have ARM team revisit +# CONFIG_RELOCATABLE is not set +# CONFIG_RANDOMIZE_BASE is not set + +CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y CONFIG_BCMA_POSSIBLE=y CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 @@ -61,7 +73,6 @@ CONFIG_HVC_DRIVER=y CONFIG_HZ=100 CONFIG_KVM=y -CONFIG_KVM_ARM_MAX_VCPUS=16 CONFIG_RCU_FANOUT=64 CONFIG_SPARSE_IRQ=y @@ -71,6 +82,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y # CONFIG_SYS_HYPERVISOR is not set +CONFIG_ARM_SBSA_WATCHDOG=m CONFIG_RTC_DRV_EFI=y CONFIG_ACPI=y @@ -120,11 +132,11 @@ CONFIG_EDAC_XGENE=m CONFIG_PCI_XGENE=y CONFIG_PCI_XGENE_MSI=y CONFIG_I2C_XGENE_SLIMPRO=m +CONFIG_XGENE_SLIMPRO_MBOX=m # AMD Seattle CONFIG_NET_SB1000=y CONFIG_AMD_XGBE=m -CONFIG_AMD_XGBE_PHY=m CONFIG_AMD_XGBE_DCB=y CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m CONFIG_PINCTRL_AMD=y @@ -136,11 +148,11 @@ CONFIG_PCI_HISI=y CONFIG_POWER_RESET_HISI=y CONFIG_HISI_THERMAL=m CONFIG_STUB_CLK_HI6220=y -CONFIG_MFD_HI655X_PMIC=m CONFIG_REGULATOR_HI655X=m CONFIG_PHY_HI6220_USB=m CONFIG_COMMON_RESET_HI6220=m # CONFIG_ARM_HISI_ACPU_CPUFREQ is not set +CONFIG_HI6220_MBOX=m # Tegra CONFIG_ARCH_TEGRA_132_SOC=y @@ -228,12 +240,16 @@ CONFIG_QCOM_COINCELL=m # ThunderX # CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set CONFIG_DMI=y CONFIG_DMIID=y CONFIG_DMI_SYSFS=y CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_AHCI_SEATTLE=m CONFIG_LIBNVDIMM=m CONFIG_BTT=y diff --git a/config-armv7 b/config-armv7 index 955ac2fb6..7fe8444b3 100644 --- a/config-armv7 +++ b/config-armv7 @@ -64,7 +64,6 @@ CONFIG_TWL4030_WATCHDOG=m CONFIG_BATTERY_TWL4030_MADC=m CONFIG_BATTERY_BQ27XXX=m CONFIG_BATTERY_BQ27XXX_I2C=y -CONFIG_BATTERY_BQ27XXX_PLATFORM=y CONFIG_OMAP_USB2=m CONFIG_OMAP_CONTROL_PHY=m CONFIG_TI_PIPE3=m @@ -208,7 +207,6 @@ CONFIG_SND_SOC_TLV320AIC31XX=m CONFIG_SND_SOC_TPA6130A2=m CONFIG_SND_SOC_TWL4030=m CONFIG_SND_SOC_TWL6040=m -CONFIG_SND_SOC_PCM1792A=m CONFIG_RADIO_WL128X=m CONFIG_OMAP_REMOTEPROC=m @@ -238,6 +236,7 @@ CONFIG_TI_CPSW_ALE=m CONFIG_TI_CPTS=y CONFIG_TI_EMIF=m CONFIG_DRM_TILCDC=m +# CONFIG_COMMON_CLK_TI_ADPLL is not set # We only need this until the BBB dts is actually updated CONFIG_DRM_TILCDC_SLAVE_COMPAT=y CONFIG_SPI_DAVINCI=m @@ -278,7 +277,6 @@ CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_PINCTRL_APQ8064=m CONFIG_PINCTRL_APQ8084=m -CONFIG_PINCTRL_IPQ8064=m CONFIG_PINCTRL_MSM8660=m CONFIG_PINCTRL_MSM8960=m CONFIG_PINCTRL_MSM8X74=m @@ -287,7 +285,6 @@ CONFIG_PINCTRL_QCOM_SPMI_PMIC=m CONFIG_PINCTRL_QCOM_SSBI_PMIC=m CONFIG_COMMON_CLK_QCOM=m # CONFIG_MSM_GCC_8916 is not set -# CONFIG_IPQ_LCC_806X is not set # CONFIG_MSM_LCC_8960 is not set CONFIG_MFD_QCOM_RPM=m CONFIG_MFD_PM8921_CORE=m @@ -295,7 +292,6 @@ CONFIG_REGULATOR_QCOM_RPM=m CONFIG_REGULATOR_QCOM_SPMI=m CONFIG_APQ_GCC_8084=m CONFIG_APQ_MMCC_8084=m -CONFIG_IPQ_GCC_806X=m CONFIG_MSM_GCC_8660=m CONFIG_MSM_GCC_8960=m CONFIG_MSM_MMCC_8960=m @@ -306,7 +302,6 @@ CONFIG_MSM_MMCC_8996=m CONFIG_HW_RANDOM_MSM=m CONFIG_I2C_QUP=m CONFIG_SPI_QUP=m -CONFIG_GPIO_MSM_V2=m CONFIG_POWER_RESET_MSM=y CONFIG_USB_MSM_OTG=m CONFIG_MMC_SDHCI_MSM=m @@ -315,15 +310,12 @@ CONFIG_QCOM_BAM_DMA=m CONFIG_QCOM_GSBI=m CONFIG_QCOM_PM=y CONFIG_PHY_QCOM_APQ8064_SATA=m -CONFIG_PHY_QCOM_IPQ806X_SATA=m CONFIG_USB_DWC3_QCOM=m -CONFIG_DWMAC_IPQ806X=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_DRM_MSM=m # CONFIG_DRM_MSM_DSI is not set CONFIG_DRM_MSM_HDMI_HDCP=y # CONFIG_DRM_MSM_REGISTER_LOGGING is not set -CONFIG_DRM_MSM_FBDEV=y CONFIG_USB_EHCI_MSM=m CONFIG_MFD_PM8XXX=m CONFIG_KEYBOARD_PMIC8XXX=m @@ -331,11 +323,11 @@ CONFIG_INPUT_PM8XXX_VIBRATOR=m CONFIG_INPUT_PMIC8XXX_PWRKEY=m CONFIG_INPUT_PM8941_PWRKEY=m CONFIG_RTC_DRV_PM8XXX=m +# CONFIG_DRM_MSM_REGISTER_LOGGING is not set CONFIG_QCOM_WDT=m CONFIG_SPMI_MSM_PMIC_ARB=m CONFIG_QCOM_SPMI_IADC=m CONFIG_QCOM_SPMI_VADC=m -CONFIG_LEDS_PM8941_WLED=m CONFIG_SND_SOC_QCOM=m CONFIG_SND_SOC_LPASS_CPU=m CONFIG_SND_SOC_LPASS_PLATFORM=m @@ -354,6 +346,7 @@ CONFIG_QCOM_WCNSS_CTRL=m CONFIG_QCOM_SMSM=y CONFIG_QCOM_SMP2P=m CONFIG_PCIE_QCOM=y +CONFIG_MTD_NAND_QCOM=m # i.MX # CONFIG_MXC_DEBUG_BOARD is not set @@ -463,7 +456,6 @@ CONFIG_RTC_DRV_MXC=m CONFIG_PWM_IMX=m CONFIG_DRM_IMX=m -CONFIG_DRM_IMX_FB_HELPER=m CONFIG_DRM_IMX_HDMI=m CONFIG_IMX_IPUV3_CORE=m CONFIG_DRM_IMX_IPUV3=m @@ -594,8 +586,6 @@ CONFIG_XILINX_VDMA=m CONFIG_SND_SOC_ADI=m CONFIG_SND_SOC_ADI_AXI_I2S=m CONFIG_SND_SOC_ADI_AXI_SPDIF=m -CONFIG_XILLYBUS=m -CONFIG_XILLYBUS_PCIE=m CONFIG_XILLYBUS_OF=m CONFIG_GS_FPGABOOT=m CONFIG_USB_GADGET_XILINX=m diff --git a/config-armv7-generic b/config-armv7-generic index 19aaa55ad..fc4bafb6a 100644 --- a/config-armv7-generic +++ b/config-armv7-generic @@ -49,6 +49,9 @@ CONFIG_ARM_CPU_SUSPEND=y # CONFIG_XIP_KERNEL is not set # CONFIG_ARM_VIRT_EXT is not set +# CONFIG_DEBUG_RODATA is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set + # Platforms enabled/disabled globally on ARMv7 CONFIG_ARCH_BCM=y CONFIG_ARCH_BCM2835=y @@ -58,6 +61,15 @@ CONFIG_ARCH_SUNXI=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y CONFIG_ARCH_VIRT=y +# CONFIG_ARCH_ARTPEC is not set +# CONFIG_ARCH_BCM_CYGNUS is not set +# CONFIG_ARCH_BCM_NSP is not set +# CONFIG_ARCH_BCM_5301X is not set +# CONFIG_ARCH_BCM_281XX is not set +# CONFIG_ARCH_BCM_21664 is not set +# CONFIG_ARCH_BCM_63XX is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BCM_CYGNUS is not set # CONFIG_ARCH_BCM_NSP is not set # CONFIG_ARCH_BCM_5301X is not set @@ -188,7 +200,6 @@ CONFIG_DMA_SUN4I=m CONFIG_DMA_SUN6I=m CONFIG_SUNXI_WATCHDOG=m CONFIG_NET_VENDOR_ALLWINNER=y -CONFIG_EEPROM_SUNXI_SID=m CONFIG_RTC_DRV_SUNXI=m CONFIG_PHY_SUN4I_USB=m # CONFIG_PHY_SUN9I_USB is not set @@ -201,6 +212,8 @@ CONFIG_GPIO_PCA953X=m CONFIG_GPIO_PCF857X=m CONFIG_TOUCHSCREEN_SUN4I=m CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=m +CONFIG_MFD_AXP20X_RSB=m CONFIG_AXP20X_POWER=m CONFIG_INPUT_AXP20X_PEK=m CONFIG_REGULATOR_AXP20X=m @@ -222,6 +235,7 @@ CONFIG_CAN_SUN4I=m CONFIG_USB_MUSB_SUNXI=m CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_SND_SUN4I_CODEC=m +CONFIG_SND_SUN4I_SPDIF=m CONFIG_SUNXI_RSB=m CONFIG_NVMEM_SUNXI_SID=m @@ -258,7 +272,6 @@ CONFIG_SOC_EXYNOS5800=y CONFIG_SERIAL_SAMSUNG=y CONFIG_SERIAL_SAMSUNG_CONSOLE=y CONFIG_ARM_EXYNOS5440_CPUFREQ=m -CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW=y # CONFIG_ARM_EXYNOS_CPUIDLE is not set CONFIG_ARM_EXYNOS5_BUS_DEVFREQ=m # CONFIG_EXYNOS5420_MCPM not set @@ -354,7 +367,6 @@ CONFIG_CHARGER_MAX8997=m CONFIG_LEDS_MAX8997=m CONFIG_RTC_DRV_MAX8997=m CONFIG_RTC_DRV_MAX77686=m -CONFIG_RTC_DRV_MAX77802=m CONFIG_EXTCON_MAX8997=m # Tegra @@ -411,6 +423,7 @@ CONFIG_RTC_DRV_ISL12057=m CONFIG_RTC_DRV_MV=m CONFIG_RTC_DRV_ARMADA38X=m CONFIG_MVNETA=m +CONFIG_MVNETA_BM_ENABLE=m CONFIG_GPIO_MVEBU=y CONFIG_MVEBU_CLK_CORE=y CONFIG_MVEBU_CLK_COREDIV=y @@ -436,12 +449,12 @@ CONFIG_RTC_DRV_ARMADA38X=m # CONFIG_CACHE_FEROCEON_L2 is not set # CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set CONFIG_LEDS_NS2=m +CONFIG_SERIAL_MVEBU_UART=y +# CONFIG_SERIAL_MVEBU_CONSOLE is not set # DRM panels CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL_SIMPLE=m -CONFIG_DRM_PANEL_LD9040=m -CONFIG_DRM_PANEL_S6E8AA0=m CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m CONFIG_DRM_PANEL_LG_LG4573=m @@ -488,7 +501,6 @@ CONFIG_MFD_TPS65912_SPI=y # CONFIG_PINCTRL_BCM281XX is not set # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set -# CONFIG_PINCTRL_IPQ8064 is not set # CONFIG_PINCTRL_MSM8960 is not set # CONFIG_PINCTRL_MSM8660 is not set # CONFIG_PINCTRL_MSM8996 is not set @@ -521,7 +533,6 @@ CONFIG_W1_MASTER_GPIO=m # CONFIG_CRYPTO_GHASH_ARM_CE is not set # DMA -CONFIG_TI_PRIV_EDMA=y CONFIG_TI_EDMA=y # MTD @@ -563,7 +574,6 @@ CONFIG_SND_SOC_AC97_CODEC=y # RTC CONFIG_RTC_DRV_DS1305=m CONFIG_RTC_DRV_DS1390=m -CONFIG_RTC_DRV_DS3234=m CONFIG_RTC_DRV_M41T93=m CONFIG_RTC_DRV_M41T94=m CONFIG_RTC_DRV_MAX6902=m @@ -637,7 +647,6 @@ CONFIG_SENSORS_ADCXX=m CONFIG_SENSORS_ADS7871=m CONFIG_SENSORS_BH1780=m CONFIG_SENSORS_GPIO_FAN=m -CONFIG_SENSORS_HTU21=m CONFIG_SENSORS_ISL29018=m CONFIG_SENSORS_ISL29028=m CONFIG_SENSORS_LIS3_SPI=m @@ -728,7 +737,6 @@ CONFIG_CROS_EC_PROTO=y # This newly introduced mess needs to be fixed upstream :-( CONFIG_STMMAC_PLATFORM=m CONFIG_DWMAC_GENERIC=m -# CONFIG_DWMAC_IPQ806X is not set # CONFIG_DWMAC_LPC18XX is not set # CONFIG_DWMAC_MESON is not set # CONFIG_DWMAC_SOCFPGA is not set @@ -819,5 +827,4 @@ CONFIG_R8188EU=m # CONFIG_OMAP2_DSS_DEBUG is not set # CONFIG_CRYPTO_DEV_UX500_DEBUG is not set # CONFIG_AB8500_DEBUG is not set -# CONFIG_ARM_KERNMEM_PERMS is not set # CONFIG_DEBUG_LL is not set diff --git a/config-armv7-lpae b/config-armv7-lpae index 2ecc010e5..96d49e88a 100644 --- a/config-armv7-lpae +++ b/config-armv7-lpae @@ -27,7 +27,6 @@ CONFIG_ARM_ERRATA_773022=y CONFIG_KVM=y CONFIG_KVM_ARM_HOST=y -CONFIG_KVM_ARM_MAX_VCPUS=8 # CONFIG_XEN is not set CONFIG_XEN_FBDEV_FRONTEND=y @@ -62,6 +61,7 @@ CONFIG_KEYSTONE_IRQ=m CONFIG_PCI_KEYSTONE=y CONFIG_MTD_NAND_DAVINCI=m CONFIG_GPIO_SYSCON=m +CONFIG_TI_MESSAGE_MANAGER=m # Tegra (non A15 device options) # CONFIG_ARCH_TEGRA_2x_SOC is not set diff --git a/config-debug b/config-debug index c0b226889..821ff17b9 100644 --- a/config-debug +++ b/config-debug @@ -127,6 +127,4 @@ CONFIG_EDAC_DEBUG=y CONFIG_SPI_DEBUG=y -CONFIG_X86_DEBUG_STATIC_CPU_HAS=y - CONFIG_DEBUG_VM_PGFLAGS=y diff --git a/config-generic b/config-generic index e6e721c32..b4f8f091f 100644 --- a/config-generic +++ b/config-generic @@ -69,7 +69,6 @@ CONFIG_NET_NS=y CONFIG_USER_NS=y CONFIG_POSIX_MQUEUE=y -CONFIG_KDBUS=m # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set @@ -109,7 +108,9 @@ CONFIG_PCIE_ECRC=y CONFIG_PCIEAER_INJECT=m CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIE_DW_PLAT is not set # CONFIG_SGI_IOC4 is not set @@ -134,7 +135,6 @@ CONFIG_SDIO_UART=m # CONFIG_MMC_TEST is not set # CONFIG_MMC_DEBUG is not set # https://lists.fedoraproject.org/pipermail/kernel/2014-February/004889.html -# CONFIG_MMC_CLKGATE is not set CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 CONFIG_MMC_BLOCK_BOUNCE=y @@ -178,17 +178,15 @@ CONFIG_INFINIBAND_USER_MAD=m CONFIG_INFINIBAND_USER_ACCESS=m CONFIG_INFINIBAND_ON_DEMAND_PAGING=y # Deprecated and moved to staging -# CONFIG_INFINIBAND_IPATH is not set CONFIG_INFINIBAND_ISER=m CONFIG_INFINIBAND_ISERT=m # Deprecated and moved to staging -# CONFIG_INFINIBAND_AMSO1100 is not set -# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set CONFIG_INFINIBAND_CXGB3=m CONFIG_INFINIBAND_CXGB4=m CONFIG_SCSI_CXGB3_ISCSI=m CONFIG_SCSI_CXGB4_ISCSI=m # CONFIG_INFINIBAND_CXGB3_DEBUG is not set +CONFIG_INFINIBAND_I40IW=m CONFIG_INFINIBAND_NES=m # CONFIG_INFINIBAND_NES_DEBUG is not set CONFIG_INFINIBAND_QIB=m @@ -196,6 +194,8 @@ CONFIG_INFINIBAND_QIB_DCA=y CONFIG_INFINIBAND_OCRDMA=m CONFIG_INFINIBAND_USNIC=m +CONFIG_INFINIBAND_RDMAVT=m + # # Executable file formats # @@ -223,6 +223,9 @@ CONFIG_FW_LOADER=y # CONFIG_TEST_FIRMWARE is not set # CONFIG_FIRMWARE_IN_KERNEL is not set CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_CFG_SYSFS=m +# CONFIG_FW_CFG_SYSFS_CMDLINE is not set + # Give this a try in rawhide for now # CONFIG_FW_LOADER_USER_HELPER is not set @@ -252,6 +255,7 @@ CONFIG_REGMAP_I2C=m # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPMI is not set @@ -370,9 +374,7 @@ CONFIG_BLK_DEV_FD=m # CONFIG_PARIDE is not set CONFIG_ZRAM=m # CONFIG_ZRAM_LZ4_COMPRESS is not set -# CONFIG_ZRAM_DEBUG is not set -CONFIG_BLK_CPQ_DA=m CONFIG_BLK_CPQ_CISS_DA=m CONFIG_CISS_SCSI_TAPE=y CONFIG_BLK_DEV_DAC960=m @@ -512,10 +514,8 @@ CONFIG_SCSI_MVSAS=m CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MPT2SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 -CONFIG_SCSI_MPT2SAS_LOGGING=y CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT3SAS_MAX_SGE=128 -CONFIG_SCSI_MPT3SAS_LOGGING=y CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFSHCD_PCI=m @@ -703,7 +703,6 @@ CONFIG_DM_MULTIPATH=m CONFIG_DM_SNAPSHOT=y CONFIG_DM_THIN_PROVISIONING=m CONFIG_DM_CACHE=m -CONFIG_DM_CACHE_MQ=m CONFIG_DM_CACHE_SMQ=m CONFIG_DM_CACHE_CLEANER=m # CONFIG_DM_ERA is not set @@ -746,7 +745,6 @@ CONFIG_FIREWIRE_NOSY=m # I2O device support # # CONFIG_I2O is not set -# CONFIG_I2O_LCT_NOTIFY_ON_CHANGES is not set # # Virtualization support drivers @@ -757,7 +755,6 @@ CONFIG_FIREWIRE_NOSY=m # CONFIG_NET=y -CONFIG_NETLINK_MMAP=y CONFIG_NETLINK_DIAG=m CONFIG_BPF_JIT=y @@ -792,7 +789,6 @@ CONFIG_UNIX_DIAG=m CONFIG_NET_KEY=m CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y -CONFIG_INET_LRO=y CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m CONFIG_INET_UDP_DIAG=m @@ -816,8 +812,8 @@ CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=m CONFIG_NET_FOU=m CONFIG_NET_FOU_IP_TUNNELS=y -CONFIG_GENEVE_CORE=m CONFIG_GENEVE=m +CONFIG_MACSEC=m CONFIG_INET_AH=m CONFIG_INET_ESP=m CONFIG_INET_IPCOMP=m @@ -903,7 +899,6 @@ CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_QUEUE_CT=y CONFIG_NETFILTER_NETLINK_LOG=m # CONFIG_NETFILTER_NETLINK_GLUE_CT is not set CONFIG_NETFILTER_XTABLES=y @@ -1280,6 +1275,9 @@ CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_ACT_VLAN=m CONFIG_NET_ACT_BPF=m CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_IFE=m +CONFIG_NET_IFE_SKBMARK=m +CONFIG_NET_IFE_SKBPRIO=m CONFIG_DCB=y CONFIG_DNS_RESOLVER=m @@ -1288,10 +1286,10 @@ CONFIG_BATMAN_ADV_BLA=y CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_NC=y CONFIG_BATMAN_ADV_MCAST=y +CONFIG_BATMAN_ADV_BATMAN_V=y # CONFIG_BATMAN_ADV_DEBUG is not set CONFIG_OPENVSWITCH=m -CONFIG_OPENVSWITCH_CONNTRACK=y CONFIG_OPENVSWITCH_GRE=y CONFIG_OPENVSWITCH_VXLAN=y CONFIG_OPENVSWITCH_GENEVE=y @@ -1384,7 +1382,10 @@ CONFIG_L2TP_ETH=m # CONFIG_CAIF is not set +CONFIG_AF_KCM=m + CONFIG_LWTUNNEL=y +CONFIG_NET_DEVLINK=m CONFIG_RFKILL=m CONFIG_RFKILL_GPIO=m @@ -1440,6 +1441,7 @@ CONFIG_CHELSIO_T4=m CONFIG_CHELSIO_T4VF=m CONFIG_CHELSIO_T4_DCB=y # CONFIG_CHELSIO_T4_FCOE is not set +# CONFIG_CHELSIO_T4_UWIRE is not set CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m @@ -1646,6 +1648,7 @@ CONFIG_MICROCHIP_PHY=m CONFIG_FIXED_PHY=y CONFIG_MDIO_BITBANG=m CONFIG_MDIO_BCM_UNIMAC=m +# CONFIG_MDIO_THUNDER is not set CONFIG_NATIONAL_PHY=m CONFIG_ICPLUS_PHY=m CONFIG_BCM63XX_PHY=m @@ -1679,6 +1682,7 @@ CONFIG_BNX2=m CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y CONFIG_BNX2X_VXLAN=y +CONFIG_BNX2X_GENEVE=y CONFIG_CNIC=m CONFIG_FEALNX=m CONFIG_ETHOC=m @@ -1694,7 +1698,6 @@ CONFIG_JME=m # CONFIG_NET_VENDOR_AURORA is not set # -# CONFIG_IP1000 is not set CONFIG_MLX4_CORE=m CONFIG_MLX4_EN=m CONFIG_MLX4_EN_DCB=y @@ -1702,6 +1705,8 @@ CONFIG_MLX4_EN_VXLAN=y CONFIG_MLX4_INFINIBAND=m CONFIG_MLX5_CORE=m CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_CORE_EN_DCB=y +CONFIG_MLX5_CORE_EN_VXLAN=y CONFIG_MLX5_INFINIBAND=m CONFIG_MLXSW_CORE=m CONFIG_MLXSW_CORE_HWMON=y @@ -1742,7 +1747,6 @@ CONFIG_WLAN=y CONFIG_WIRELESS=y CONFIG_CFG80211=m CONFIG_CFG80211_WEXT=y -# CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_DEBUGFS=y # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set CONFIG_CFG80211_DEFAULT_PS=y @@ -1770,7 +1774,6 @@ CONFIG_MAC80211_DEBUGFS=y # CONFIG_ADM8211 is not set CONFIG_WLAN_VENDOR_ATH=y CONFIG_ATH_COMMON=m -CONFIG_ATH_CARDS=m CONFIG_ATH5K=m CONFIG_ATH5K_DEBUG=y # CONFIG_ATH5K_TRACER is not set @@ -1796,6 +1799,7 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y # CONFIG_ATH10K=m CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_TRACING is not set # CONFIG_ATH_TRACEPOINTS is not set @@ -1818,7 +1822,6 @@ CONFIG_WLAN_VENDOR_INTERSIL=y CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B43=m -CONFIG_B43_PCMCIA=y CONFIG_B43_SDIO=y CONFIG_B43_BCMA=y CONFIG_B43_BCMA_PIO=y @@ -1880,6 +1883,7 @@ CONFIG_IWLDVM=m CONFIG_IWLMVM=m # CONFIG_IWLWIFI_BCAST_FILTERING is not set # CONFIG_IWLWIFI_UAPSD is not set +CONFIG_IWLWIFI_PCIE_RTPM=y CONFIG_IWLWIFI_DEBUG=y CONFIG_IWLWIFI_DEBUGFS=y @@ -1907,7 +1911,6 @@ CONFIG_RSI_USB=m CONFIG_RT2X00=m CONFIG_RT2X00_LIB_DEBUGFS=y # CONFIG_RT2X00_DEBUG is not set -CONFIG_WL_MEDIATEK=y CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_MT7601U=m CONFIG_WLAN_VENDOR_RALINK=y @@ -1938,7 +1941,6 @@ CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m CONFIG_USB_NET_SMSC75XX=m CONFIG_USB_NET_CH9200=m -# CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set @@ -1967,7 +1969,7 @@ CONFIG_RTL8188EE=m CONFIG_RTL8821AE=m CONFIG_RTL8XXXU=m # NOTE! This should be disabled when branching to stable -# CONFIG_RTL8XXXU_UNTESTED is not set +CONFIG_RTL8XXXU_UNTESTED=y CONFIG_MWIFIEX=m CONFIG_MWIFIEX_SDIO=m @@ -2075,6 +2077,7 @@ CONFIG_CAN_GS_USB=m CONFIG_CAN_8DEV_USB=m CONFIG_CAN_SOFTING=m # CONFIG_CAN_SOFTING_CS is not set +CONFIG_CAN_IFI_CANFD=m CONFIG_NETROM=m CONFIG_ROSE=m @@ -2108,8 +2111,6 @@ CONFIG_NFC_MICROREAD_I2C=m CONFIG_NFC_TRF7970A=m CONFIG_NFC_ST21NFCA=m CONFIG_NFC_ST21NFCA_I2C=m -# CONFIG_NFC_ST21NFCB is not set -# CONFIG_NFC_ST21NFCB_I2C is not set # CONFIG_NFC_ST95HF is not set CONFIG_NFC_NXP_NCI=m CONFIG_NFC_NXP_NCI_I2C=m @@ -2169,6 +2170,7 @@ CONFIG_BT_BREDR=y CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_6LOWPAN=m +CONFIG_BT_LEDS=y # CONFIG_BT_SELFTEST is not set # CONFIG_BT_DEBUGFS is not set CONFIG_BT_SCO=y @@ -2196,6 +2198,7 @@ CONFIG_BT_HCIUART_3WIRE=y CONFIG_BT_HCIUART_INTEL=y CONFIG_BT_HCIUART_BCM=y CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIDTL1=m CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m @@ -2536,6 +2539,7 @@ CONFIG_TOUCHSCREEN_ZFORCE=m # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_E3X0_BUTTON=m @@ -2560,6 +2564,13 @@ CONFIG_INPUT_MPU3050=m CONFIG_INPUT_KXTJ9=m # CONFIG_INPUT_KXTJ9_POLLED_MODE is not set +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +CONFIG_RMI4_F30=y +CONFIG_RMI4_SPI=m + # # Character devices # @@ -2609,10 +2620,12 @@ CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_INGENIC is not set CONFIG_SERIAL_8250_RT288X=y CONFIG_SERIAL_8250_MID=y +CONFIG_SERIAL_8250_MOXA=m CONFIG_CYCLADES=m # CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set +# CONFIG_SERIAL_MVEBU_UART is not set # CONFIG_ISI is not set # CONFIG_RIO is not set CONFIG_SERIAL_JSM=m @@ -2662,6 +2675,7 @@ CONFIG_I2C_CHARDEV=m # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PINCTRL is not set # CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set # CONFIG_I2C_CADENCE is not set # @@ -2764,7 +2778,6 @@ CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_HDAPS=m # CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HTU21 is not set # CONFIG_SENSORS_I5K_AMB is not set # FIXME: IBMAEM x86 only? CONFIG_SENSORS_IBMAEM=m @@ -2790,6 +2803,7 @@ CONFIG_SENSORS_LM93=m CONFIG_SENSORS_LM95234=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC2945=m +CONFIG_SENSORS_LTC2990=m CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_MAX1619=m @@ -2936,10 +2950,13 @@ CONFIG_STK3310=m # CONFIG_TSL4531 is not set # CONFIG_NAU7802 is not set # CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_VIPERBOARD_ADC is not set # CONFIG_VF610_ADC is not set +# CONFIG_VF610_DAC is not set # CONFIG_CC10001_ADC is not set # CONFIG_INV_MPU6050_IIO is not set CONFIG_IIO_ST_GYRO_3AXIS=m @@ -2986,6 +3003,7 @@ CONFIG_ACPI_ALS=m # CONFIG_AD5624R_SPI is not set # CONFIG_AD5686 is not set # CONFIG_AD5755 is not set +# CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set @@ -3002,9 +3020,14 @@ CONFIG_ACPI_ALS=m # CONFIG_ADIS16400 is not set # CONFIG_ADIS16480 is not set CONFIG_DHT11=m +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set # CONFIG_MPL115 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_TPL0102 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # CONFIG_AS3935 is not set @@ -3013,6 +3036,8 @@ CONFIG_KXCJK1013=m # CONFIG_ISL29125 is not set # CONFIG_JSA1212 is not set CONFIG_RPR0521=m +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set CONFIG_MAX30100=m CONFIG_OPT3001=m CONFIG_PA12203001=m @@ -3023,6 +3048,7 @@ CONFIG_PA12203001=m # CONFIG_MAX1027 is not set # CONFIG_MXC4005 is not set # CONFIG_IAQCORE is not set +# CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_INA2XX_ADC is not set # CONFIG_VZ89X is not set # CONFIG_HDC100X is not set @@ -3051,7 +3077,6 @@ CONFIG_PA12203001=m # CONFIG_SENSORS_ISL29028 is not set # CONFIG_SENSORS_HMC5843 is not set # CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set # CONFIG_IIO_SIMPLE_DUMMY is not set # CONFIG_ADIS16201 is not set # CONFIG_ADIS16203 is not set @@ -3175,6 +3200,8 @@ CONFIG_WM831X_WATCHDOG=m # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_BCM7038_WDT is not set # CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_EBC_C384_WDT is not set +# CONFIG_NI903X_WDT is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=m @@ -3194,6 +3221,7 @@ CONFIG_RTC_INTF_DEV=y CONFIG_RTC_DRV_CMOS=y CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1307_HWMON=y CONFIG_RTC_DRV_DS1511=m CONFIG_RTC_DRV_DS1553=m CONFIG_RTC_DRV_DS1685_FAMILY=m @@ -3239,13 +3267,14 @@ CONFIG_RTC_DRV_MSM6242=m CONFIG_RTC_DRV_RP5C01=m CONFIG_RTC_DRV_EM3027=m CONFIG_RTC_DRV_RV3029C2=m +CONFIG_RTC_DRV_RV3029_HWMON=y CONFIG_RTC_DRV_PCF50633=m CONFIG_RTC_DRV_DS3232=m CONFIG_RTC_DRV_ISL12022=m CONFIG_RTC_DRV_MCP795=m CONFIG_RTC_DRV_RX4581=m +# CONFIG_RTC_DRV_RX6110 is not set CONFIG_RTC_DRV_PCF2123=m -CONFIG_RTC_DRV_DS3234=m CONFIG_RTC_DRV_RS5C348=m CONFIG_RTC_DRV_R9701=m CONFIG_RTC_DRV_MAX6902=m @@ -3288,6 +3317,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_DRM=m +CONFIG_DRM_DP_AUX_CHARDEV=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_AST=m # do not enable on f17 or older @@ -3296,8 +3326,8 @@ CONFIG_DRM_CIRRUS_QEMU=m # do not enable on f17 or older # CONFIG_DRM_R128 is not set CONFIG_DRM_RADEON=m CONFIG_DRM_RADEON_USERPTR=y -# CONFIG_DRM_RADEON_UMS is not set CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMD_ACP=y # CONFIG_DRM_AMDGPU_CIK is not set CONFIG_DRM_AMDGPU_USERPTR=y CONFIG_DRM_AMD_POWERPLAY=y @@ -3307,9 +3337,8 @@ CONFIG_DRM_MGAG200=m # do not enable on f17 or older # CONFIG_DRM_SIS is not set # CONFIG_DRM_SAVAGE is not set CONFIG_DRM_I915=m -CONFIG_DRM_I915_KMS=y -CONFIG_DRM_I915_FBDEV=y # CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set +CONFIG_DRM_I915_USERPTR=y CONFIG_DRM_VIA=m CONFIG_DRM_NOUVEAU=m CONFIG_NOUVEAU_DEBUG=5 @@ -3327,11 +3356,8 @@ CONFIG_DRM_VMWGFX_FBCON=y CONFIG_DRM_QXL=m CONFIG_DRM_BOCHS=m CONFIG_DRM_VIRTIO_GPU=m -CONFIG_DRM_PTN3460=m -CONFIG_DRM_PS8622=m # CONFIG_DRM_PANEL is not set # CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_PANEL_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set CONFIG_DRM_VGEM=m @@ -3347,6 +3373,9 @@ CONFIG_MWAVE=m CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 CONFIG_HANGCHECK_TIMER=m +CONFIG_XILLYBUS=m +CONFIG_XILLYBUS_PCIE=m +# CONFIG_XILLYBUS_OF is not set CONFIG_MEDIA_USB_SUPPORT=y CONFIG_MEDIA_PCI_SUPPORT=y @@ -3806,7 +3835,6 @@ CONFIG_SND_LX6464ES=m CONFIG_SND_HDA_INTEL=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 -CONFIG_SND_HDA_INPUT_JACK=y CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_CODEC_REALTEK=y @@ -3881,7 +3909,6 @@ CONFIG_SND_USB_VARIAX=m CONFIG_SND_FIREWIRE=y CONFIG_SND_ISIGHT=m -CONFIG_SND_SCS1X=m CONFIG_SND_DICE=m CONFIG_SND_OXFW=m CONFIG_SND_FIREWORKS=m @@ -4071,6 +4098,7 @@ CONFIG_HID_APPLEIR=m CONFIG_HID_LENOVO=m CONFIG_HID_CORSAIR=m CONFIG_HID_GFRM=m +CONFIG_HID_CMEDIA=m # # USB Imaging devices @@ -4242,7 +4270,6 @@ CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m # CONFIG_USB_SERIAL_METRO is not set -CONFIG_USB_SERIAL_MXUPORT11=m CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7715_PARPORT=y # CONFIG_USB_SERIAL_WISHBONE is not set @@ -4297,7 +4324,6 @@ CONFIG_USB_ULPI_BUS=m # CONFIG_PHY_TUSB1210 is not set # CONFIG_SAMSUNG_USBPHY is not set # CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_USB_RCAR_PHY is not set CONFIG_USB_ATM=m CONFIG_USB_CXACRU=m # CONFIG_USB_C67X00_HCD is not set @@ -4418,6 +4444,8 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_CROS_EC is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DLN2 is not set @@ -4427,7 +4455,6 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_TPS65218 is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_MENF21BMC is not set @@ -4443,12 +4470,22 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_INTEL_SOC_PMIC is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set # CONFIG_TS4800_IRQ is not set +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_AXP20X_RSB is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_TPS65086 is not set # # File systems # CONFIG_MISC_FILESYSTEMS=y +# CONFIG_FS_ENCRYPTION is not set + # ext4 is used for ext2 and ext3 filesystems # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set @@ -4526,6 +4563,7 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_NTFS_FS is not set # @@ -4545,6 +4583,7 @@ CONFIG_DEBUG_FS=y # # Miscellaneous filesystems # +CONFIG_ORANGEFS_FS=m # CONFIG_ADFS_FS is not set CONFIG_AFFS_FS=m CONFIG_ECRYPT_FS=m @@ -4611,6 +4650,8 @@ CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y CONFIG_NFSD_V4_SECURITY_LABEL=y CONFIG_NFS_FSCACHE=y # CONFIG_NFS_USE_LEGACY_DNS is not set @@ -4764,8 +4805,7 @@ CONFIG_NLS_ASCII=y # Profiling support # CONFIG_PROFILING=y -CONFIG_OPROFILE=m -CONFIG_OPROFILE_EVENT_MULTIPLEX=y +# CONFIG_OPROFILE is not set # # Kernel hacking @@ -4780,14 +4820,15 @@ CONFIG_DEBUG_INFO_VTA=y # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set CONFIG_FRAME_POINTER=y +CONFIG_STACK_VALIDATION=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set # CONFIG_DEBUG_DRIVER is not set CONFIG_HEADERS_CHECK=y # CONFIG_LKDTM is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_READABLE_ASM is not set -# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set # CONFIG_DEBUG_LOCKDEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set @@ -4804,6 +4845,8 @@ CONFIG_HEADERS_CHECK=y # This just changes a default enable with workqueue.debug_force_rr_cpu # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # +# CONFIG_KCOV is not set +# # These debug options are deliberatly left on (even in 'make release' kernels). # They aren't that much of a performance impact, and the value # from getting useful bug-reports makes it worth leaving them on. @@ -4840,6 +4883,7 @@ CONFIG_LATENCYTOP=y # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set CONFIG_EARLY_PRINTK_DBGP=y # CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set CONFIG_CRASH=m CONFIG_CRASH_DUMP=y # CONFIG_GCOV_KERNEL is not set @@ -4877,7 +4921,6 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set CONFIG_SECURITY_YAMA=y -CONFIG_SECURITY_YAMA_STACKED=y CONFIG_AUDIT=y CONFIG_AUDITSYSCALL=y # http://lists.fedoraproject.org/pipermail/kernel/2013-February/004125.html @@ -4993,7 +5036,6 @@ CONFIG_CRC8=m CONFIG_CORDIC=m # CONFIG_DDR is not set -CONFIG_CRYPTO_ZLIB=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m @@ -5076,7 +5118,6 @@ CONFIG_CGROUP_SCHED=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y CONFIG_MEMCG_SWAP_ENABLED=y -CONFIG_MEMCG_KMEM=y # CONFIG_CGROUP_HUGETLB is not set CONFIG_CGROUP_PERF=y CONFIG_CGROUP_NET_PRIO=y @@ -5184,7 +5225,6 @@ CONFIG_SND_SIMPLE_CARD=m CONFIG_SND_DESIGNWARE_I2S=m CONFIG_SND_SOC_ALL_CODECS=m CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_HDMI_CODEC=m CONFIG_SND_SOC_SPDIF=m CONFIG_SND_DMAENGINE_PCM=m CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y @@ -5200,12 +5240,13 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CS4271 is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1792A is not set # CONFIG_SND_SOC_PCM179X is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_QCOM is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set @@ -5256,6 +5297,7 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set @@ -5297,7 +5339,6 @@ CONFIG_LEDS_DELL_NETBOOKS=m # CONFIG_LEDS_LP8501 is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_PM8941_WLED is not set # CONFIG_LEDS_SYSCON is not set CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m @@ -5313,6 +5354,7 @@ CONFIG_LEDS_CLEVO_MAIL=m CONFIG_LEDS_INTEL_SS4200=m CONFIG_LEDS_LM3530=m # CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_IS31FL32XX is not set CONFIG_LEDS_BLINKM=m CONFIG_LEDS_LP3944=m CONFIG_LEDS_LT3593=m @@ -5343,6 +5385,8 @@ CONFIG_ASYNC_TX_DMA=y # CONFIG_HSU_DMA_PCI is not set # CONFIG_XGENE_DMA is not set # CONFIG_INTEL_IDMA64 is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set CONFIG_UNUSED_SYMBOLS=y @@ -5518,7 +5562,7 @@ CONFIG_NET_DSA=m CONFIG_NET_DSA_HWMON=y CONFIG_NET_DSA_MV88E6060=m CONFIG_NET_DSA_MV88E6131=m -CONFIG_NET_DSA_MV88E6123_61_65=m +CONFIG_NET_DSA_MV88E6123=m CONFIG_NET_DSA_MV88E6171=m CONFIG_NET_DSA_MV88E6352=m CONFIG_NET_DSA_BCM_SF2=m @@ -5585,9 +5629,7 @@ CONFIG_R8723AU=m # Jes Sorensen maintains this (rhbz 1100162) # CONFIG_SOLO6X10 is not set # CONFIG_LTE_GDM724X is not set CONFIG_R8712U=m # Larry Finger maintains this (rhbz 699618) -# CONFIG_FT1000 is not set # CONFIG_SPEAKUP is not set -# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set CONFIG_ALTERA_STAPL=m # CONFIG_DVB_CXD2099 is not set # CONFIG_DVB_RTL2832_SDR is not set @@ -5598,11 +5640,8 @@ CONFIG_USBIP_HOST=m # CONFIG_USBIP_DEBUG is not set # CONFIG_INTEL_MEI is not set # CONFIG_VT6655 is not set -# CONFIG_USB_WPAN_HCD is not set -# CONFIG_WIMAX_GDM72XX is not set # CONFIG_IPACK_BUS is not set # CONFIG_LUSTRE_FS is not set -# CONFIG_XILLYBUS is not set # CONFIG_DGAP is not set # CONFIG_DGNC is not set # CONFIG_RTS5208 is not set @@ -5612,13 +5651,12 @@ CONFIG_USBIP_HOST=m # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_DVB_MN88472 is not set # CONFIG_DVB_MN88473 is not set -# CONFIG_FB_SM7XX is not set # CONFIG_FB_TFT is not set # CONFIG_FB_SM750 is not set # CONFIG_STAGING_RDMA is not set -# CONFIG_WILC1000_DRIVER is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set +# CONFIG_LNET is not set # END OF STAGING # @@ -5642,7 +5680,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=65536 CONFIG_STRIP_ASM_SYMS=y -# CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y CONFIG_RCU_NOCB_CPU=y CONFIG_RCU_NOCB_CPU_ALL=y @@ -5654,9 +5691,7 @@ CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3 # CONFIG_RCU_TORTURE_TEST_SLOW_CLEANUP is not set # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set -# CONFIG_RCU_CPU_STALL_INFO is not set # CONFIG_TASKS_RCU is not set -# CONFIG_RCU_USER_QS is not set CONFIG_RCU_KTHREAD_PRIO=0 CONFIG_SPARSE_RCU_POINTER=y # CONFIG_RCU_EXPERT is not set @@ -5695,7 +5730,7 @@ CONFIG_ZBUD=y CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set # CONFIG_PGTABLE_MAPPING is not set - +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set # CONFIG_MDIO_GPIO is not set @@ -5716,7 +5751,6 @@ CONFIG_GPIO_SYSFS=y # CONFIG_GPIO_CS5535 is not set # CONFIG_GPIO_ADNP is not set # CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_IT8761E is not set # CONFIG SB105x is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_TS5500 is not set @@ -5749,6 +5783,13 @@ CONFIG_GPIO_VIPERBOARD=m # CONFIG_GPIO_AMDPT is not set # CONFIG_GPIO_104_IDIO_16 is not set # CONFIG_GPIO_IT87 is not set +# CONFIG_GPIO_TPIC2810 is not set +# CONFIG_GPIO_MPC8XXX is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_TS4800 is not set +# CONFIG_GPIO_TPS65218 is not set +# CONFIG_GPIO_104_DIO_48E is not set +# CONFIG_GPIO_WS16C48 is not set # FIXME: Why? @@ -5791,12 +5832,15 @@ CONFIG_PSTORE_RAM=m # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set # CONFIG_AVERAGE is not set # CONFIG_VMXNET3 is not set # CONFIG_SIGMA is not set +# CONFIG_GOLDFISH is not set + CONFIG_CHROME_PLATFORMS=y CONFIG_BCMA=m @@ -5857,6 +5901,7 @@ CONFIG_MODULE_SIG_SHA256=y # CONFIG_MODULE_SIG_FORCE is not set CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y diff --git a/config-nodebug b/config-nodebug index c070f68cf..5a4319a57 100644 --- a/config-nodebug +++ b/config-nodebug @@ -127,6 +127,4 @@ CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y # CONFIG_SPI_DEBUG is not set -# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set - # CONFIG_DEBUG_VM_PGFLAGS is not set diff --git a/config-powerpc64-generic b/config-powerpc64-generic index ffc765a13..de387d570 100644 --- a/config-powerpc64-generic +++ b/config-powerpc64-generic @@ -7,7 +7,6 @@ CONFIG_PPC_PSERIES=y # CONFIG_PPC_83xx is not set # CONFIG_PPC_86xx is not set # CONFIG_PPC_CELL is not set -# CONFIG_PPC_CELL_QPACE is not set # CONFIG_PPC_IBM_CELL_BLADE is not set # CONFIG_PPC_MAPLE is not set # CONFIG_PPC_PASEMI is not set @@ -54,7 +53,6 @@ CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_PPC_64K_PAGES=y CONFIG_PPC_SUBPAGE_PROT=y CONFIG_SCHED_SMT=y -# CONFIG_TUNE_CELL is not set CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTREMOVE=y CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y @@ -79,7 +77,6 @@ CONFIG_CRYPTO_DEV_NX_ENCRYPT=m CONFIG_CRYPTO_DEV_NX_COMPRESS=m CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m -CONFIG_CRYPTO_DEV_NX_COMPRESS_CRYPTO=m CONFIG_CRYPTO_DEV_VMX=y CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m @@ -129,7 +126,6 @@ CONFIG_CXL=m CONFIG_CXLFLASH=m CONFIG_IBMEBUS=y CONFIG_EHEA=m -CONFIG_INFINIBAND_EHCA=m CONFIG_PPC_ICSWX=y # CONFIG_PPC_ICSWX_PID is not set # CONFIG_PPC_ICSWX_USE_SIGILL is not set @@ -200,7 +196,6 @@ CONFIG_CAPI_EICON=y # CONFIG_BLK_DEV_PLATFORM is not set # Stuff which wants bus_to_virt() or virt_to_bus() -# CONFIG_BLK_CPQ_DA is not set # CONFIG_VIDEO_ZORAN is not set # CONFIG_ATM_HORIZON is not set # CONFIG_ATM_FIRESTREAM is not set @@ -222,7 +217,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y # CONFIG_MACINTOSH_DRIVERS is not set # CONFIG_EDAC_CPC925 is not set -CONFIG_SPU_FS_64K_LS=y CONFIG_EDAC=y CONFIG_EDAC_MM_EDAC=m @@ -291,7 +285,6 @@ CONFIG_SIMPLE_GPIO=y # CONFIG_PS3_VRAM is not set CONFIG_MDIO_GPIO=m CONFIG_SERIAL_OF_PLATFORM=m -# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_PCA953X=m CONFIG_GPIO_PCF857X=m diff --git a/config-powerpc64le b/config-powerpc64le index 7d9f3fc3a..ec80e8bf4 100644 --- a/config-powerpc64le +++ b/config-powerpc64le @@ -2,5 +2,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_POWER7_CPU=y +CONFIG_DISABLE_MPROFILE_KERNEL=y + # https://fedoraproject.org/wiki/Features/Checkpoint_Restore CONFIG_CHECKPOINT_RESTORE=y diff --git a/config-s390x b/config-s390x index 6188d09fb..d1ed636d9 100644 --- a/config-s390x +++ b/config-s390x @@ -62,7 +62,6 @@ CONFIG_SCLP_TTY=y CONFIG_SCLP_CONSOLE=y CONFIG_SCLP_VT220_TTY=y CONFIG_SCLP_VT220_CONSOLE=y -CONFIG_SCLP_CPI=m CONFIG_SCLP_ASYNC=m CONFIG_SCLP_ASYNC_ID="000000000" CONFIG_SCLP_OFB=y diff --git a/config-x86-32-generic b/config-x86-32-generic index 04100f267..ddc9f3047 100644 --- a/config-x86-32-generic +++ b/config-x86-32-generic @@ -82,7 +82,6 @@ CONFIG_X86_LONGRUN=y # e_powersaver is dangerous # CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_HT=y # CONFIG_4KSTACKS is not set @@ -124,7 +123,6 @@ CONFIG_CRYPTO_TWOFISH_586=m CONFIG_VIDEO_CAFE_CCIC=m -CONFIG_XEN_MAX_DOMAIN_MEMORY=8 CONFIG_MTD_NAND_CAFE=m @@ -185,13 +183,6 @@ CONFIG_MFD_CS5535=m # I2O enabled only for 32-bit x86, disabled for PAE kernel CONFIG_I2O=m -CONFIG_I2O_BLOCK=m -CONFIG_I2O_SCSI=m -CONFIG_I2O_PROC=m -CONFIG_I2O_CONFIG=y -CONFIG_I2O_EXT_ADAPTEC=y -CONFIG_I2O_CONFIG_OLD_IOCTL=y -CONFIG_I2O_BUS=m CONFIG_INPUT_PWM_BEEPER=m CONFIG_BACKLIGHT_PWM=m diff --git a/config-x86-generic b/config-x86-generic index 2ad965e6f..a4b2a04a2 100644 --- a/config-x86-generic +++ b/config-x86-generic @@ -13,11 +13,10 @@ CONFIG_HPET_TIMER=y CONFIG_I8K=m CONFIG_SONYPI_COMPAT=y CONFIG_MICROCODE=y -CONFIG_MICROCODE_EARLY=y CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_INTEL_EARLY=y CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_AMD_EARLY=y + +CONFIG_PERF_EVENTS_AMD_POWER=m CONFIG_X86_MSR=y CONFIG_X86_CPUID=y @@ -71,7 +70,6 @@ CONFIG_X86_MPPARSE=y CONFIG_MMIOTRACE=y # CONFIG_MMIOTRACE_TEST is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set -CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_WX is not set CONFIG_DEBUG_STACKOVERFLOW=y @@ -207,7 +205,6 @@ CONFIG_EDAC_I7300=m CONFIG_EDAC_I7CORE=m CONFIG_EDAC_R82600=m CONFIG_EDAC_X38=m -CONFIG_EDAC_MCE_INJ=m CONFIG_EDAC_DECODE_MCE=m CONFIG_EDAC_LEGACY_SYSFS=y CONFIG_EDAC_IE31200=m @@ -229,6 +226,7 @@ CONFIG_AMILO_RFKILL=m CONFIG_ASUS_LAPTOP=m CONFIG_ASUS_WIRELESS=m CONFIG_COMPAL_LAPTOP=m +CONFIG_DELL_SMBIOS=m CONFIG_DELL_LAPTOP=m CONFIG_DELL_RBTN=m CONFIG_CHROMEOS_LAPTOP=m @@ -490,7 +488,7 @@ CONFIG_SCHED_SMT=y CONFIG_CC_STACKPROTECTOR=y CONFIG_CC_STACKPROTECTOR_STRONG=y CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set # revisit this +CONFIG_RANDOMIZE_BASE=y CONFIG_HYPERV=m CONFIG_HYPERV_UTILS=m @@ -500,6 +498,8 @@ CONFIG_HYPERV_STORAGE=m CONFIG_HYPERV_BALLOON=m CONFIG_FB_HYPERV=m CONFIG_HYPERV_KEYBOARD=m +# This is x86_64 only, but we'll lump it here anyway +CONFIG_PCI_HYPERV=m # Depends on HOTPLUG_PCI_PCIE CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m @@ -513,6 +513,7 @@ CONFIG_RCU_FANOUT_LEAF=16 CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m CONFIG_INTEL_MEI_TXE=m +CONFIG_INTEL_MEI_WDT=m CONFIG_NFC_MEI_PHY=m CONFIG_NFC_PN544_MEI=m @@ -546,6 +547,9 @@ CONFIG_PINCTRL_CHERRYVIEW=y CONFIG_PINCTRL_SUNRISEPOINT=m CONFIG_PINCTRL_BROXTON=m +# I have no idea why this is x86-specific +CONFIG_E1000E_HWTS=y + #baytrail/cherrytrail stuff CONFIG_KEYBOARD_GPIO=m CONFIG_INPUT_SOC_BUTTON_ARRAY=m @@ -567,6 +571,7 @@ CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m CONFIG_SND_SOC_AC97_CODEC=m # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SUN4I_SPDIF is not set # CONFIG_INTEL_POWERCLAMP is not set CONFIG_X86_PKG_TEMP_THERMAL=m diff --git a/config-x86_64-generic b/config-x86_64-generic index 5d0f7b2b2..b6037709c 100644 --- a/config-x86_64-generic +++ b/config-x86_64-generic @@ -26,6 +26,8 @@ CONFIG_PHYSICAL_ALIGN=0x1000000 # https://lists.fedoraproject.org/pipermail/kernel/2013-December/004753.html CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y + # enable the 32-bit entry point for Baytrail CONFIG_EFI_MIXED=y @@ -63,6 +65,9 @@ CONFIG_INTEL_MIC_BUS=m CONFIG_INTEL_MIC_X100_DMA=m CONFIG_MIC_COSM=m +CONFIG_VOP_BUS=m +CONFIG_VOP=m + # SHPC has half-arsed PCI probing, which makes it load on too many systems CONFIG_HOTPLUG_PCI_SHPC=m @@ -130,7 +135,6 @@ CONFIG_SGI_GRU=m # CONFIG_VIDEO_CAFE_CCIC is not set -CONFIG_XEN_MAX_DOMAIN_MEMORY=128 # CONFIG_XEN_BALLOON_MEMORY_HOTPLUG is not set CONFIG_XEN_DEV_EVTCHN=m CONFIG_XEN_SYS_HYPERVISOR=y @@ -156,7 +160,6 @@ CONFIG_X86_X2APIC=y CONFIG_SPARSE_IRQ=y CONFIG_RCU_FANOUT=64 -# CONFIG_RCU_USER_QS is not set CONFIG_INTEL_TXT=y @@ -185,7 +188,6 @@ CONFIG_NTB_TRANSPORT=m # 10GigE # -CONFIG_IP1000=m CONFIG_SFC=m CONFIG_SFC_MCDI_MON=y CONFIG_SFC_SRIOV=y @@ -224,13 +226,7 @@ CONFIG_ND_PFN=m # Staging CONFIG_STAGING_RDMA=y -# CONFIG_INFINIBAND_AMSO1100 is not set -# CONFIG_INFINIBAND_EHCA is not set CONFIG_INFINIBAND_HFI1=m # CONFIG_HFI1_DEBUG_SDMA_ORDER is not set CONFIG_HFI1_VERBS_31BIT_PSN=y # CONFIG_SDMA_VERBOSITY is not set -# CONFIG_PRESCAN_RXQ is not set - -# Temporary workaround until SND_SOC_INTEL_HASWELL_MACH no longer requires builtin -CONFIG_DW_DMAC=y diff --git a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch index 9cc0525f4..784cf2035 100644 --- a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch +++ b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch @@ -1,4 +1,4 @@ -From 888ba9b2a02e8d144c3a9ae5e01a1a94280cd2bf Mon Sep 17 00:00:00 2001 +From 78bd7226c92c8309d1c6c1378f1224dcd591b49f Mon Sep 17 00:00:00 2001 From: Fedora Kernel Team <kernel-team@fedoraproject.org> Date: Fri, 22 Jan 2016 13:03:36 -0600 Subject: [PATCH] Make ZONE_DMA not depend on CONFIG_EXPERT @@ -13,12 +13,12 @@ Signed-off-by: Justin Forbes <jforbes@fedoraproject.org> 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index a02c842..ea2eaeb 100644 +index 3c74b549ea9a..8a5b7b8cc425 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig -@@ -315,7 +315,7 @@ source "kernel/Kconfig.freezer" +@@ -318,7 +318,7 @@ source "kernel/Kconfig.freezer" menu "Processor type and features" - + config ZONE_DMA - bool "DMA memory allocation support" if EXPERT + bool "DMA memory allocation support" @@ -26,18 +26,18 @@ index a02c842..ea2eaeb 100644 help DMA memory allocation support allows devices with less than 32-bit diff --git a/mm/Kconfig b/mm/Kconfig -index 97a4e06..26bbbe0 100644 +index 05efa6a5199e..c1a01e50c293 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -650,7 +650,7 @@ config IDLE_PAGE_TRACKING See Documentation/vm/idle_page_tracking.txt for more details. - + config ZONE_DEVICE - bool "Device memory (pmem, etc...) hotplug support" if EXPERT + bool "Device memory (pmem, etc...) hotplug support" - default !ZONE_DMA - depends on !ZONE_DMA depends on MEMORY_HOTPLUG + depends on MEMORY_HOTREMOVE + depends on SPARSEMEM_VMEMMAP -- 2.5.0 diff --git a/dmaengine-sun4i-support-module-autoloading.patch b/dmaengine-sun4i-support-module-autoloading.patch deleted file mode 100644 index 7d7937474..000000000 --- a/dmaengine-sun4i-support-module-autoloading.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 94c622b2a742c6793d74a71280df0c3a5365a156 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio.lopez@collabora.co.uk> -Date: Sun, 21 Feb 2016 22:26:35 -0300 -Subject: [PATCH 33831/39109] dmaengine: sun4i: support module autoloading -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -MODULE_DEVICE_TABLE() is missing, so the module isn't auto-loading on -supported systems. This commit adds the missing line so it loads -automatically when building it as a module and running on a system -with the early sunxi DMA engine. - -Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk> -Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> -Signed-off-by: Vinod Koul <vinod.koul@intel.com> ---- - drivers/dma/sun4i-dma.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c -index 1661d518..e0df233 100644 ---- a/drivers/dma/sun4i-dma.c -+++ b/drivers/dma/sun4i-dma.c -@@ -1271,6 +1271,7 @@ static const struct of_device_id sun4i_dma_match[] = { - { .compatible = "allwinner,sun4i-a10-dma" }, - { /* sentinel */ }, - }; -+MODULE_DEVICE_TABLE(of, sun4i_dma_match); - - static struct platform_driver sun4i_dma_driver = { - .probe = sun4i_dma_probe, --- -2.7.4 - diff --git a/filter-aarch64.sh b/filter-aarch64.sh index 139d1791d..cc560ca97 100644 --- a/filter-aarch64.sh +++ b/filter-aarch64.sh @@ -13,4 +13,4 @@ driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds medi ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i" diff --git a/filter-armv7hl.sh b/filter-armv7hl.sh index 6de77659a..0ae6d925b 100644 --- a/filter-armv7hl.sh +++ b/filter-armv7hl.sh @@ -15,4 +15,4 @@ ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco d drmdrvs="amd armada bridge ast exynos i2c imx mgag200 msm omapdrm panel nouveau radeon rockchip tegra tilcdc via" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target cxgbit iw_cxgb3 iw_cxgb4 cxgb3i cxgb3i cxgb3i_ddp cxgb4i" diff --git a/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch b/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch new file mode 100644 index 000000000..27744a0c3 --- /dev/null +++ b/hp-wmi-fix-wifi-cannot-be-hard-unblock.patch @@ -0,0 +1,48 @@ +From patchwork Mon Jun 13 11:44:00 2016 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: hp-wmi: fix wifi cannot be hard-unblock +From: Alex Hung <alex.hung@canonical.com> +X-Patchwork-Id: 9172765 +Message-Id: <1465818240-11994-1-git-send-email-alex.hung@canonical.com> +To: dvhart@infradead.org, platform-driver-x86@vger.kernel.org, + alex.hung@canonical.com, david.ward@ll.mit.edu +Date: Mon, 13 Jun 2016 19:44:00 +0800 + +Several users reported wifi cannot be unblocked as discussed in [1]. +This patch removes the useof 2009 flag by BIOS but uses the actual WMI +function calls - it will be skipped if WMI reports unsupported + +[1] https://bugzilla.kernel.org/show_bug.cgi?id=69131 + +Signed-off-by: Alex Hung <alex.hung@canonical.com> +--- + drivers/platform/x86/hp-wmi.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c +index 6f145f2..96ffda4 100644 +--- a/drivers/platform/x86/hp-wmi.c ++++ b/drivers/platform/x86/hp-wmi.c +@@ -718,6 +718,11 @@ static int __init hp_wmi_rfkill_setup(struct platform_device *device) + if (err) + return err; + ++ err = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, &wireless, ++ sizeof(wireless), 0); ++ if (err) ++ return err; ++ + if (wireless & 0x1) { + wifi_rfkill = rfkill_alloc("hp-wifi", &device->dev, + RFKILL_TYPE_WLAN, +@@ -882,7 +887,7 @@ static int __init hp_wmi_bios_setup(struct platform_device *device) + wwan_rfkill = NULL; + rfkill2_count = 0; + +- if (hp_wmi_bios_2009_later() || hp_wmi_rfkill_setup(device)) ++ if (hp_wmi_rfkill_setup(device)) + hp_wmi_rfkill2_setup(device); + + err = device_create_file(&device->dev, &dev_attr_display); diff --git a/ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch b/ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch deleted file mode 100644 index 16788f756..000000000 --- a/ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 14b627c610f93c2700f9a3825ac10c35d51acfe4 Mon Sep 17 00:00:00 2001 -From: Josh Boyer <jwboyer@fedoraproject.org> -Date: Mon, 7 Dec 2015 13:50:38 -0500 -Subject: [PATCH] ideapad-laptop: Add Lenovo ideapad Y700-17ISK to no_hw_rfkill - dmi list - -One of the newest ideapad models also lacks a physical hw rfkill switch, -and trying to read the hw rfkill switch through the ideapad module -causes it to always reported blocking breaking wifi. - -Fix it by adding this model to the DMI list. - -BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1286293 -Cc: stable@vger.kernel.org -Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org> ---- - drivers/platform/x86/ideapad-laptop.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/platform/x86/ideapad-laptop.c b/drivers/platform/x86/ideapad-laptop.c -index a313dfc0245f..d28db0e793df 100644 ---- a/drivers/platform/x86/ideapad-laptop.c -+++ b/drivers/platform/x86/ideapad-laptop.c -@@ -865,6 +865,13 @@ static const struct dmi_system_id no_hw_rfkill_list[] = { - }, - }, - { -+ .ident = "Lenovo ideapad Y700-17ISK", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), -+ DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo ideapad Y700-17ISK"), -+ }, -+ }, -+ { - .ident = "Lenovo Yoga 2 11 / 13 / Pro", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), --- -2.5.0 - diff --git a/kernel.spec b/kernel.spec index 44ccfadb4..0782930ba 100644 --- a/kernel.spec +++ b/kernel.spec @@ -50,7 +50,7 @@ Summary: The Linux kernel # base_sublevel is the kernel version we're starting with and patching # on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base, # which yields a base_sublevel of 0. -%define base_sublevel 5 +%define base_sublevel 6 ## If this is a released kernel ## %if 0%{?released_kernel} @@ -59,7 +59,7 @@ Summary: The Linux kernel # Do we have a -stable update to apply? -%define stable_update 7 +%define stable_update 3 # Set rpm version accordingly %if 0%{?stable_update} %define stablerev %{stable_update} @@ -361,7 +361,7 @@ Summary: The Linux kernel # Packages that need to be installed before the kernel is, because the %%post # scripts use them. # -%define kernel_prereq fileutils, systemd >= 203-2, /usr/bin/kernel-install +%define kernel_prereq coreutils, systemd >= 203-2, /usr/bin/kernel-install %define initrd_prereq dracut >= 027 @@ -514,6 +514,7 @@ Source5005: kbuild-AFTER_LINK.patch # Git trees. # Standalone patches + Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch Patch421: arm64-acpi-drop-expert-patch.patch @@ -524,31 +525,18 @@ Patch422: geekbox-v4-device-tree-support.patch # http://www.spinics.net/lists/arm-kernel/msg483898.html Patch423: Initial-AllWinner-A64-and-PINE64-support.patch -Patch424: dmaengine-sun4i-support-module-autoloading.patch - # http://www.spinics.net/lists/linux-tegra/msg26029.html Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch # http://patchwork.ozlabs.org/patch/587554/ Patch430: ARM-tegra-usb-no-reset.patch -Patch431: arm-i.MX6-Utilite-device-dtb.patch - # http://www.spinics.net/lists/linux-tegra/msg25152.html -Patch432: Fix-tegra-to-use-stdout-path-for-serial-console.patch +Patch431: Fix-tegra-to-use-stdout-path-for-serial-console.patch -Patch433: bcm283x-Pull-upstream-fixes-plus-iproc-mmc-driver.patch +Patch432: arm-i.MX6-Utilite-device-dtb.patch -# http://www.spinics.net/lists/netdev/msg369442.html -Patch434: revert-stmmac-Fix-eth0-No-PHY-found-regression.patch -Patch435: stmmac-fix-MDIO-settings.patch - -Patch436: ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch - -# mvebu DSA switch fixes -# http://www.spinics.net/lists/netdev/msg370841.html http://www.spinics.net/lists/netdev/msg370842.html -Patch438: 0001-net-dsa-mv88e6xxx-Introduce-_mv88e6xxx_phy_page_-rea.patch -Patch439: 0002-net-dsa-mv88e6xxx-Clear-the-PDOWN-bit-on-setup.patch +Patch433: bcm283x-upstream-fixes.patch Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch @@ -628,36 +616,9 @@ Patch502: firmware-Drop-WARN-from-usermodehelper_read_trylock-.patch Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch -#rhbz 1286293 -Patch571: ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch - #Required for some persistent memory options Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch -#rhbz 1255325 -Patch646: HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch - -#rhbz 1309658 -Patch648: 0001-mm-CONFIG_NR_ZONES_EXTENDED.patch - -#CVE-2016-3135 rhbz 1317386 1317387 -Patch664: netfilter-x_tables-check-for-size-overflow.patch - -#CVE-2016-3134 rhbz 1317383 1317384 -Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch - -# CVE-2016-3672 rhbz 1324749 1324750 -Patch689: x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch - -#rhbz 1302071 -Patch702: x86-build-Build-compressed-x86-kernels-as-PIE.patch - -# Stop splashing crap about broken firmware BGRT -Patch704: x86-efi-bgrt-Switch-all-pr_err-to-pr_debug-for-inval.patch - -#rhbz 1331092 -Patch705: mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch - #CVE-2016-4482 rhbz 1332931 1332932 Patch706: USB-usbfs-fix-potential-infoleak-in-devio.patch @@ -666,21 +627,47 @@ Patch714: ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch Patch715: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch Patch716: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch -#CVE-2016-0758 rhbz 1300257 1335386 -Patch717: KEYS-Fix-ASN.1-indefinite-length-object-parsing.patch - #CVE-2016-4440 rhbz 1337806 1337807 Patch719: kvm-vmx-more-complete-state-update-on-APICv-on-off.patch -#CVE-2016-4951 rhbz 1338625 1338626 -Patch720: tipc-check-nl-sock-before-parsing-nested-attributes.patch - #CVE-2016-5243 rhbz 1343338 1343335 Patch721: tipc-fix-an-infoleak-in-tipc_nl_compat_link_dump.patch #CVE-2016-5244 rhbz 1343338 1343337 Patch722: rds-fix-an-infoleak-in-rds_inc_info_copy.txt +#CVE-2016-4470 rhbz 1341716 1346626 +Patch727: KEYS-potential-uninitialized-variable.patch + +#rhbz 1338025 +Patch728: hp-wmi-fix-wifi-cannot-be-hard-unblock.patch + +#skl_update_other_pipe_wm issue patch-series from drm-next, rhbz 1305038 +Patch801: 0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch +Patch802: 0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch +Patch803: 0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch +Patch804: 0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch +Patch805: 0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch +Patch806: 0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch +Patch807: 0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch +Patch808: 0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch +Patch809: 0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch +Patch810: 0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch +Patch811: 0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch +Patch812: 0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch +Patch813: 0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch +Patch814: 0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch +Patch815: 0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch +Patch816: 0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch +Patch817: 0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch + +#other drm/kms fixes (most Cc-ed stable) +Patch821: 0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch +Patch822: 0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch +Patch823: 0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch +Patch824: 0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch +Patch825: 0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch + # END OF PATCH DEFINITIONS %endif @@ -894,7 +881,8 @@ Provides: kernel-devel = %{version}-%{release}%{?1:+%{1}}\ Provides: kernel-devel-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\ Provides: installonlypkg(kernel)\ AutoReqProv: no\ -Requires(pre): /usr/bin/find\ +Requires(pre): findutils\ +Requires: findutils\ Requires: perl\ %description %{?1:%{1}-}devel\ This package provides kernel headers and makefiles sufficient to build modules\ @@ -1501,6 +1489,9 @@ BuildKernel() { rm -rf $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include cp .config $RPM_BUILD_ROOT/lib/modules/$KernelVer/build cp -a scripts $RPM_BUILD_ROOT/lib/modules/$KernelVer/build + if [ -f tools/objtool/objtool ]; then + cp -a tools/objtool/objtool $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/tools/objtool/ || : + fi if [ -d arch/$Arch/scripts ]; then cp -a arch/$Arch/scripts $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/arch/%{_arch} || : fi @@ -2205,6 +2196,18 @@ fi # # %changelog +* Fri Jun 24 2016 Josh Boyer <jwboyer@fedoraproject.org> - 4.6.3-300 +- Linux v4.6.3 + +* Wed Jun 15 2016 Laura Abbott <labbott@fedoraproject.org> +- hp-wmi: fix wifi cannot be hard-unblock (rhbz 1338025) + +* Wed Jun 15 2016 Josh Boyer <jwboyer@fedoraproject.org> +- CVE-2016-4470 keys: uninitialized variable crash (rhbz 1341716 1346626) + +* Mon Jun 13 2016 Josh Boyer <jwboyer@fedoraproject.org> +- CVE-2016-1583 stack overflow via ecryptfs and /proc (rhbz 1344721 1344722) + * Wed Jun 08 2016 Josh Boyer <jwboyer@fedoraproject.org> - 4.5.7-300 - Linux v4.5.7 diff --git a/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch b/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch deleted file mode 100644 index cc3e2168c..000000000 --- a/mm-thp-kvm-fix-memory-corruption-in-KVM-with-THP-ena.patch +++ /dev/null @@ -1,126 +0,0 @@ -From 94f984ff563d1777652b822d7a282cacc1e481c2 Mon Sep 17 00:00:00 2001 -From: Andrea Arcangeli <aarcange@redhat.com> -Date: Wed, 27 Apr 2016 12:04:46 -0500 -Subject: [PATCH] mm: thp: kvm: fix memory corruption in KVM with THP enabled - -After the THP refcounting change, obtaining a compound pages from -get_user_pages() no longer allows us to assume the entire compound -page is immediately mappable from a secondary MMU. - -A secondary MMU doesn't want to call get_user_pages() more than once -for each compound page, in order to know if it can map the whole -compound page. So a secondary MMU needs to know from a single -get_user_pages() invocation when it can map immediately the entire -compound page to avoid a flood of unnecessary secondary MMU faults and -spurious atomic_inc()/atomic_dec() (pages don't have to be pinned by -MMU notifier users). - -Ideally instead of the page->_mapcount < 1 check, get_user_pages() -should return the granularity of the "page" mapping in the "mm" passed -to get_user_pages(). However it's non trivial change to pass the "pmd" -status belonging to the "mm" walked by get_user_pages up the stack (up -to the caller of get_user_pages). So the fix just checks if there is -not a single pte mapping on the page returned by get_user_pages, and -in turn if the caller can assume that the whole compound page is -mapped in the current "mm" (in a pmd_trans_huge()). In such case the -entire compound page is safe to map into the secondary MMU without -additional get_user_pages() calls on the surrounding tail/head -pages. In addition of being faster, not having to run other -get_user_pages() calls also reduces the memory footprint of the -secondary MMU fault in case the pmd split happened as result of memory -pressure. - -Without this fix after a MADV_DONTNEED (like invoked by QEMU during -postcopy live migration or balloning) or after generic swapping (with -a failure in split_huge_page() that would only result in pmd splitting -and not a physical page split), KVM would map the whole compound page -into the shadow pagetables, despite regular faults or userfaults (like -UFFDIO_COPY) may map regular pages into the primary MMU as result of -the pte faults, leading to the guest mode and userland mode going out -of sync and not working on the same memory at all times. - -Signed-off-by: Andrea Arcangeli <aarcange@redhat.com> ---- - arch/arm/kvm/mmu.c | 2 +- - arch/x86/kvm/mmu.c | 4 ++-- - include/linux/page-flags.h | 22 ++++++++++++++++++++++ - 3 files changed, 25 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c -index aba61fd..8dafe97 100644 ---- a/arch/arm/kvm/mmu.c -+++ b/arch/arm/kvm/mmu.c -@@ -997,7 +997,7 @@ static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap) - kvm_pfn_t pfn = *pfnp; - gfn_t gfn = *ipap >> PAGE_SHIFT; - -- if (PageTransCompound(pfn_to_page(pfn))) { -+ if (PageTransCompoundMap(pfn_to_page(pfn))) { - unsigned long mask; - /* - * The address we faulted on is backed by a transparent huge -diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c -index 1e7a49b..3a371f7 100644 ---- a/arch/x86/kvm/mmu.c -+++ b/arch/x86/kvm/mmu.c -@@ -2767,7 +2767,7 @@ static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu, - */ - if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) && - level == PT_PAGE_TABLE_LEVEL && -- PageTransCompound(pfn_to_page(pfn)) && -+ PageTransCompoundMap(pfn_to_page(pfn)) && - !has_wrprotected_page(vcpu, gfn, PT_DIRECTORY_LEVEL)) { - unsigned long mask; - /* -@@ -4621,7 +4621,7 @@ restart: - */ - if (sp->role.direct && - !kvm_is_reserved_pfn(pfn) && -- PageTransCompound(pfn_to_page(pfn))) { -+ PageTransCompoundMap(pfn_to_page(pfn))) { - drop_spte(kvm, sptep); - need_tlb_flush = 1; - goto restart; -diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h -index 19724e6..522bd6d 100644 ---- a/include/linux/page-flags.h -+++ b/include/linux/page-flags.h -@@ -517,6 +517,27 @@ static inline int PageTransCompound(struct page *page) - } - - /* -+ * PageTransCompoundMap is the same as PageTransCompound, but it also -+ * guarantees the primary MMU has the entire compound page mapped -+ * through pmd_trans_huge, which in turn guarantees the secondary MMUs -+ * can also map the entire compound page. This allows the secondary -+ * MMUs to call get_user_pages() only once for each compound page and -+ * to immediately map the entire compound page with a single secondary -+ * MMU fault. If there will be a pmd split later, the secondary MMUs -+ * will get an update through the MMU notifier invalidation through -+ * split_huge_pmd(). -+ * -+ * Unlike PageTransCompound, this is safe to be called only while -+ * split_huge_pmd() cannot run from under us, like if protected by the -+ * MMU notifier, otherwise it may result in page->_mapcount < 0 false -+ * positives. -+ */ -+static inline int PageTransCompoundMap(struct page *page) -+{ -+ return PageTransCompound(page) && atomic_read(&page->_mapcount) < 0; -+} -+ -+/* - * PageTransTail returns true for both transparent huge pages - * and hugetlbfs pages, so it should only be called when it's known - * that hugetlbfs pages aren't involved. -@@ -559,6 +580,7 @@ static inline int TestClearPageDoubleMap(struct page *page) - #else - TESTPAGEFLAG_FALSE(TransHuge) - TESTPAGEFLAG_FALSE(TransCompound) -+TESTPAGEFLAG_FALSE(TransCompoundMap) - TESTPAGEFLAG_FALSE(TransTail) - TESTPAGEFLAG_FALSE(DoubleMap) - TESTSETFLAG_FALSE(DoubleMap) --- -2.7.4 - diff --git a/netfilter-x_tables-check-for-size-overflow.patch b/netfilter-x_tables-check-for-size-overflow.patch deleted file mode 100644 index 81e3d36fa..000000000 --- a/netfilter-x_tables-check-for-size-overflow.patch +++ /dev/null @@ -1,31 +0,0 @@ -Subject: [PATCH nf] netfilter: x_tables: check for size overflow -From: Florian Westphal <fw () strlen ! de> -Date: 2016-03-10 0:56:23 - -Ben Hawkes says: - integer overflow in xt_alloc_table_info, which on 32-bit systems can - lead to small structure allocation and a copy_from_user based heap - corruption. - -Reported-by: Ben Hawkes <hawkes@google.com> -Signed-off-by: Florian Westphal <fw@strlen.de> ---- - net/netfilter/x_tables.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/net/netfilter/x_tables.c b/net/netfilter/x_tables.c -index c8a0b7d..17a9a9f 100644 ---- a/net/netfilter/x_tables.c -+++ b/net/netfilter/x_tables.c -@@ -659,6 +659,9 @@ struct xt_table_info *xt_alloc_table_info(unsigned int size) - struct xt_table_info *info = NULL; - size_t sz = sizeof(*info) + size; - -+ if (sz < sizeof(*info)) -+ return NULL; -+ - /* Pedantry: prevent them from hitting BUG() in vmalloc.c --RR */ - if ((SMP_ALIGN(size) >> PAGE_SHIFT) + 2 > totalram_pages) - return NULL; --- -2.4.10 diff --git a/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch b/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch deleted file mode 100644 index ebfe1716f..000000000 --- a/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch +++ /dev/null @@ -1,150 +0,0 @@ -Subject: [PATCH nf] netfilter: x_tables: deal with bogus nextoffset values -From: Florian Westphal <fw () strlen ! de> -Date: 2016-03-10 0:56:02 - -Ben Hawkes says: - - In the mark_source_chains function (net/ipv4/netfilter/ip_tables.c) it - is possible for a user-supplied ipt_entry structure to have a large - next_offset field. This field is not bounds checked prior to writing a - counter value at the supplied offset. - -Problem is that xt_entry_foreach() macro stops iterating once e->next_offset -is out of bounds, assuming this is the last entry. - -With malformed data thats not necessarily the case so we can -write outside of allocated area later as we might not have walked the -entire blob. - -Fix this by simplifying mark_source_chains -- it already has to check -if nextoff is in range to catch invalid jumps, so just do the check -when we move to a next entry as well. - -Signed-off-by: Florian Westphal <fw@strlen.de> ---- - net/ipv4/netfilter/arp_tables.c | 16 ++++++++-------- - net/ipv4/netfilter/ip_tables.c | 15 ++++++++------- - net/ipv6/netfilter/ip6_tables.c | 13 ++++++------- - 3 files changed, 22 insertions(+), 22 deletions(-) - -diff --git a/net/ipv4/netfilter/arp_tables.c b/net/ipv4/netfilter/arp_tables.c -index b488cac..5a0b591 100644 ---- a/net/ipv4/netfilter/arp_tables.c -+++ b/net/ipv4/netfilter/arp_tables.c -@@ -437,6 +437,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo, - - /* Move along one */ - size = e->next_offset; -+ -+ if (pos + size > newinfo->size - sizeof(*e)) -+ return 0; -+ - e = (struct arpt_entry *) - (entry0 + pos + size); - e->counters.pcnt = pos; -@@ -447,14 +451,6 @@ static int mark_source_chains(const struct xt_table_info *newinfo, - if (strcmp(t->target.u.user.name, - XT_STANDARD_TARGET) == 0 && - newpos >= 0) { -- if (newpos > newinfo->size - -- sizeof(struct arpt_entry)) { -- duprintf("mark_source_chains: " -- "bad verdict (%i)\n", -- newpos); -- return 0; -- } -- - /* This a jump; chase it. */ - duprintf("Jump rule %u -> %u\n", - pos, newpos); -@@ -462,6 +458,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo, - /* ... this is a fallthru */ - newpos = pos + e->next_offset; - } -+ -+ if (newpos > newinfo->size - sizeof(*e)) -+ return 0; -+ - e = (struct arpt_entry *) - (entry0 + newpos); - e->counters.pcnt = pos; -diff --git a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c -index b99affa..ceb995f 100644 ---- a/net/ipv4/netfilter/ip_tables.c -+++ b/net/ipv4/netfilter/ip_tables.c -@@ -519,6 +519,10 @@ mark_source_chains(const struct xt_table_info *newinfo, - - /* Move along one */ - size = e->next_offset; -+ -+ if (pos + size > newinfo->size - sizeof(*e)) -+ return 0; -+ - e = (struct ipt_entry *) - (entry0 + pos + size); - e->counters.pcnt = pos; -@@ -529,13 +533,6 @@ mark_source_chains(const struct xt_table_info *newinfo, - if (strcmp(t->target.u.user.name, - XT_STANDARD_TARGET) == 0 && - newpos >= 0) { -- if (newpos > newinfo->size - -- sizeof(struct ipt_entry)) { -- duprintf("mark_source_chains: " -- "bad verdict (%i)\n", -- newpos); -- return 0; -- } - /* This a jump; chase it. */ - duprintf("Jump rule %u -> %u\n", - pos, newpos); -@@ -543,6 +540,10 @@ mark_source_chains(const struct xt_table_info *newinfo, - /* ... this is a fallthru */ - newpos = pos + e->next_offset; - } -+ -+ if (newpos > newinfo->size - sizeof(*e)) -+ return 0; -+ - e = (struct ipt_entry *) - (entry0 + newpos); - e->counters.pcnt = pos; -diff --git a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c -index 99425cf..d88a794 100644 ---- a/net/ipv6/netfilter/ip6_tables.c -+++ b/net/ipv6/netfilter/ip6_tables.c -@@ -531,6 +531,8 @@ mark_source_chains(const struct xt_table_info *newinfo, - - /* Move along one */ - size = e->next_offset; -+ if (pos + size > newinfo->size - sizeof(*e)) -+ return 0; - e = (struct ip6t_entry *) - (entry0 + pos + size); - e->counters.pcnt = pos; -@@ -541,13 +543,6 @@ mark_source_chains(const struct xt_table_info *newinfo, - if (strcmp(t->target.u.user.name, - XT_STANDARD_TARGET) == 0 && - newpos >= 0) { -- if (newpos > newinfo->size - -- sizeof(struct ip6t_entry)) { -- duprintf("mark_source_chains: " -- "bad verdict (%i)\n", -- newpos); -- return 0; -- } - /* This a jump; chase it. */ - duprintf("Jump rule %u -> %u\n", - pos, newpos); -@@ -555,6 +550,10 @@ mark_source_chains(const struct xt_table_info *newinfo, - /* ... this is a fallthru */ - newpos = pos + e->next_offset; - } -+ -+ if (newpos > newinfo->size - sizeof(*e)) -+ return 0; -+ - e = (struct ip6t_entry *) - (entry0 + newpos); - e->counters.pcnt = pos; --- -2.4.10 diff --git a/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch b/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch deleted file mode 100644 index 68b9cd3ab..000000000 --- a/revert-stmmac-Fix-eth0-No-PHY-found-regression.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 44f947bb8ef5f4add9f2d84e1ff53afd8f2f5537 Mon Sep 17 00:00:00 2001 -From: Peter Robinson <pbrobinson@gmail.com> -Date: Wed, 16 Mar 2016 15:21:44 +0000 -Subject: [PATCH 1/2] Revert "stmmac: Fix 'eth0: No PHY found' regression" - -This reverts commit 88f8b1bb41c6208f81b6a480244533ded7b59493. ---- - drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 11 ++++++++++- - drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +-------- - include/linux/stmmac.h | 1 - - 3 files changed, 11 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -index efb54f3..0faf163 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -@@ -199,12 +199,21 @@ int stmmac_mdio_register(struct net_device *ndev) - struct stmmac_priv *priv = netdev_priv(ndev); - struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data; - int addr, found; -- struct device_node *mdio_node = priv->plat->mdio_node; -+ struct device_node *mdio_node = NULL; -+ struct device_node *child_node = NULL; - - if (!mdio_bus_data) - return 0; - - if (IS_ENABLED(CONFIG_OF)) { -+ for_each_child_of_node(priv->device->of_node, child_node) { -+ if (of_device_is_compatible(child_node, -+ "snps,dwmac-mdio")) { -+ mdio_node = child_node; -+ break; -+ } -+ } -+ - if (mdio_node) { - netdev_dbg(ndev, "FOUND MDIO subnode\n"); - } else { -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 4514ba7..6a52fa1 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -110,7 +110,6 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) - struct device_node *np = pdev->dev.of_node; - struct plat_stmmacenet_data *plat; - struct stmmac_dma_cfg *dma_cfg; -- struct device_node *child_node = NULL; - - plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL); - if (!plat) -@@ -141,19 +140,13 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) - plat->phy_node = of_node_get(np); - } - -- for_each_child_of_node(np, child_node) -- if (of_device_is_compatible(child_node, "snps,dwmac-mdio")) { -- plat->mdio_node = child_node; -- break; -- } -- - /* "snps,phy-addr" is not a standard property. Mark it as deprecated - * and warn of its use. Remove this when phy node support is added. - */ - if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0) - dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n"); - -- if ((plat->phy_node && !of_phy_is_fixed_link(np)) || !plat->mdio_node) -+ if ((plat->phy_node && !of_phy_is_fixed_link(np)) || plat->phy_bus_name) - plat->mdio_bus_data = NULL; - else - plat->mdio_bus_data = -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 881a79d..eead8ab 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -100,7 +100,6 @@ struct plat_stmmacenet_data { - int interface; - struct stmmac_mdio_bus_data *mdio_bus_data; - struct device_node *phy_node; -- struct device_node *mdio_node; - struct stmmac_dma_cfg *dma_cfg; - int clk_csr; - int has_gmac; --- -2.5.0 - @@ -1,3 +1,3 @@ -a60d48eee08ec0536d5efb17ca819aef linux-4.5.tar.xz -6f557fe90b800b615c85c2ca04da6154 perf-man-4.5.tar.gz -5405f81eacd09def60777b0e0f0a1cb5 patch-4.5.7.xz +d2927020e24a76da4ab482a8bc3e9ef3 linux-4.6.tar.xz +fd23b14b9d474c3dfacb6e8ee82d3a51 perf-man-4.6.tar.gz +0d59cb81eb7c0daf0f5019deda65af90 patch-4.6.3.xz diff --git a/stmmac-fix-MDIO-settings.patch b/stmmac-fix-MDIO-settings.patch deleted file mode 100644 index 41fa928a4..000000000 --- a/stmmac-fix-MDIO-settings.patch +++ /dev/null @@ -1,235 +0,0 @@ -From d55a02f460ffd64a5ba7f331489af87edeebf8da Mon Sep 17 00:00:00 2001 -From: Giuseppe CAVALLARO <peppe.cavallaro@st.com> -Date: Wed, 16 Mar 2016 10:38:49 +0100 -Subject: [PATCH 2/2] stmmac: fix MDIO settings -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Initially the phy_bus_name was added to manipulate the -driver name but it was recently just used to manage the -fixed-link and then to take some decision at run-time. -So the patch uses the is_pseudo_fixed_link and removes -the phy_bus_name variable not necessary anymore. - -The driver can manage the mdio registration by using phy-handle, -dwmac-mdio and own parameter e.g. snps,phy-addr. -This patch takes care about all these possible configurations -and fixes the mdio registration in case of there is a real -transceiver or a switch (that needs to be managed by using -fixed-link). - -Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> -Reviewed-by: Andreas Färber <afaerber@suse.de> -Tested-by: Frank Schäfer <fschaefer.oss@googlemail.com> -Cc: Gabriel Fernandez <gabriel.fernandez@linaro.org> -Cc: Dinh Nguyen <dinh.linux@gmail.com> -Cc: David S. Miller <davem@davemloft.net> -Cc: Phil Reid <preid@electromag.com.au> ---- - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 11 +-- - drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 19 +---- - .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 84 +++++++++++++++++----- - include/linux/stmmac.h | 2 +- - 4 files changed, 71 insertions(+), 45 deletions(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index c21015b..389d7d0 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -271,7 +271,6 @@ static void stmmac_eee_ctrl_timer(unsigned long arg) - */ - bool stmmac_eee_init(struct stmmac_priv *priv) - { -- char *phy_bus_name = priv->plat->phy_bus_name; - unsigned long flags; - bool ret = false; - -@@ -283,7 +282,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv) - goto out; - - /* Never init EEE in case of a switch is attached */ -- if (phy_bus_name && (!strcmp(phy_bus_name, "fixed"))) -+ if (priv->phydev->is_pseudo_fixed_link) - goto out; - - /* MAC core supports the EEE feature. */ -@@ -820,12 +819,8 @@ static int stmmac_init_phy(struct net_device *dev) - phydev = of_phy_connect(dev, priv->plat->phy_node, - &stmmac_adjust_link, 0, interface); - } else { -- if (priv->plat->phy_bus_name) -- snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x", -- priv->plat->phy_bus_name, priv->plat->bus_id); -- else -- snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x", -- priv->plat->bus_id); -+ snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x", -+ priv->plat->bus_id); - - snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id, - priv->plat->phy_addr); -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -index 0faf163..3f5512f 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c -@@ -198,29 +198,12 @@ int stmmac_mdio_register(struct net_device *ndev) - struct mii_bus *new_bus; - struct stmmac_priv *priv = netdev_priv(ndev); - struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data; -+ struct device_node *mdio_node = priv->plat->mdio_node; - int addr, found; -- struct device_node *mdio_node = NULL; -- struct device_node *child_node = NULL; - - if (!mdio_bus_data) - return 0; - -- if (IS_ENABLED(CONFIG_OF)) { -- for_each_child_of_node(priv->device->of_node, child_node) { -- if (of_device_is_compatible(child_node, -- "snps,dwmac-mdio")) { -- mdio_node = child_node; -- break; -- } -- } -- -- if (mdio_node) { -- netdev_dbg(ndev, "FOUND MDIO subnode\n"); -- } else { -- netdev_warn(ndev, "No MDIO subnode found\n"); -- } -- } -- - new_bus = mdiobus_alloc(); - if (new_bus == NULL) - return -ENOMEM; -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 6a52fa1..190fb6d 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -96,6 +96,69 @@ static int dwmac1000_validate_ucast_entries(int ucast_entries) - } - - /** -+ * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources -+ * @plat: driver data platform structure -+ * @np: device tree node -+ * @dev: device pointer -+ * Description: -+ * The mdio bus will be allocated in case of a phy transceiver is on board; -+ * it will be NULL if the fixed-link is configured. -+ * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated -+ * in any case (for DSA, mdio must be registered even if fixed-link). -+ * The table below sums the supported configurations: -+ * ------------------------------- -+ * snps,phy-addr | Y -+ * ------------------------------- -+ * phy-handle | Y -+ * ------------------------------- -+ * fixed-link | N -+ * ------------------------------- -+ * snps,dwmac-mdio | -+ * even if | Y -+ * fixed-link | -+ * ------------------------------- -+ * -+ * It returns 0 in case of success otherwise -ENODEV. -+ */ -+static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, -+ struct device_node *np, struct device *dev) -+{ -+ bool mdio = true; -+ -+ /* If phy-handle property is passed from DT, use it as the PHY */ -+ plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -+ if (plat->phy_node) -+ dev_dbg(dev, "Found phy-handle subnode\n"); -+ -+ /* If phy-handle is not specified, check if we have a fixed-phy */ -+ if (!plat->phy_node && of_phy_is_fixed_link(np)) { -+ if ((of_phy_register_fixed_link(np) < 0)) -+ return -ENODEV; -+ -+ dev_dbg(dev, "Found fixed-link subnode\n"); -+ plat->phy_node = of_node_get(np); -+ mdio = false; -+ } -+ -+ /* If snps,dwmac-mdio is passed from DT, always register the MDIO */ -+ for_each_child_of_node(np, plat->mdio_node) { -+ if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio")) -+ break; -+ } -+ -+ if (plat->mdio_node) { -+ dev_dbg(dev, "Found MDIO subnode\n"); -+ mdio = true; -+ } -+ -+ if (mdio) -+ plat->mdio_bus_data = -+ devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data), -+ GFP_KERNEL); -+ return 0; -+} -+ -+/** - * stmmac_probe_config_dt - parse device-tree driver parameters - * @pdev: platform_device structure - * @plat: driver data platform structure -@@ -129,30 +192,15 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) - /* Default to phy auto-detection */ - plat->phy_addr = -1; - -- /* If we find a phy-handle property, use it as the PHY */ -- plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -- -- /* If phy-handle is not specified, check if we have a fixed-phy */ -- if (!plat->phy_node && of_phy_is_fixed_link(np)) { -- if ((of_phy_register_fixed_link(np) < 0)) -- return ERR_PTR(-ENODEV); -- -- plat->phy_node = of_node_get(np); -- } -- - /* "snps,phy-addr" is not a standard property. Mark it as deprecated - * and warn of its use. Remove this when phy node support is added. - */ - if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0) - dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n"); - -- if ((plat->phy_node && !of_phy_is_fixed_link(np)) || plat->phy_bus_name) -- plat->mdio_bus_data = NULL; -- else -- plat->mdio_bus_data = -- devm_kzalloc(&pdev->dev, -- sizeof(struct stmmac_mdio_bus_data), -- GFP_KERNEL); -+ /* To Configure PHY by using all device-tree supported properties */ -+ if (stmmac_dt_phy(plat, np, &pdev->dev)) -+ return ERR_PTR(-ENODEV); - - of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size); - -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index eead8ab..8b1ff2b 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -94,12 +94,12 @@ struct stmmac_dma_cfg { - }; - - struct plat_stmmacenet_data { -- char *phy_bus_name; - int bus_id; - int phy_addr; - int interface; - struct stmmac_mdio_bus_data *mdio_bus_data; - struct device_node *phy_node; -+ struct device_node *mdio_node; - struct stmmac_dma_cfg *dma_cfg; - int clk_csr; - int has_gmac; --- -2.5.0 - diff --git a/tipc-check-nl-sock-before-parsing-nested-attributes.patch b/tipc-check-nl-sock-before-parsing-nested-attributes.patch deleted file mode 100644 index 09bfe1485..000000000 --- a/tipc-check-nl-sock-before-parsing-nested-attributes.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 45e093ae2830cd1264677d47ff9a95a71f5d9f9c Mon Sep 17 00:00:00 2001 -From: Richard Alpe <richard.alpe@ericsson.com> -Date: Mon, 16 May 2016 11:14:54 +0200 -Subject: [PATCH] tipc: check nl sock before parsing nested attributes - -Make sure the socket for which the user is listing publication exists -before parsing the socket netlink attributes. - -Prior to this patch a call without any socket caused a NULL pointer -dereference in tipc_nl_publ_dump(). - -Tested-and-reported-by: Baozeng Ding <sploving1@gmail.com> -Signed-off-by: Richard Alpe <richard.alpe@ericsson.com> -Acked-by: Jon Maloy <jon.maloy@ericsson.cm> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - net/tipc/socket.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/net/tipc/socket.c b/net/tipc/socket.c -index 12628890c219..3b7a79991d55 100644 ---- a/net/tipc/socket.c -+++ b/net/tipc/socket.c -@@ -2853,6 +2853,9 @@ int tipc_nl_publ_dump(struct sk_buff *skb, struct netlink_callback *cb) - if (err) - return err; - -+ if (!attrs[TIPC_NLA_SOCK]) -+ return -EINVAL; -+ - err = nla_parse_nested(sock, TIPC_NLA_SOCK_MAX, - attrs[TIPC_NLA_SOCK], - tipc_nl_sock_policy); --- -2.5.5 - diff --git a/x86-build-Build-compressed-x86-kernels-as-PIE.patch b/x86-build-Build-compressed-x86-kernels-as-PIE.patch deleted file mode 100644 index 064cb485b..000000000 --- a/x86-build-Build-compressed-x86-kernels-as-PIE.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 6d92bc9d483aa1751755a66fee8fb39dffb088c0 Mon Sep 17 00:00:00 2001 -From: "H.J. Lu" <hjl.tools@gmail.com> -Date: Wed, 16 Mar 2016 20:04:35 -0700 -Subject: [PATCH] x86/build: Build compressed x86 kernels as PIE - -The 32-bit x86 assembler in binutils 2.26 will generate R_386_GOT32X -relocation to get the symbol address in PIC. When the compressed x86 -kernel isn't built as PIC, the linker optimizes R_386_GOT32X relocations -to their fixed symbol addresses. However, when the compressed x86 -kernel is loaded at a different address, it leads to the following -load failure: - - Failed to allocate space for phdrs - -during the decompression stage. - -If the compressed x86 kernel is relocatable at run-time, it should be -compiled with -fPIE, instead of -fPIC, if possible and should be built as -Position Independent Executable (PIE) so that linker won't optimize -R_386_GOT32X relocation to its fixed symbol address. - -Older linkers generate R_386_32 relocations against locally defined -symbols, _bss, _ebss, _got and _egot, in PIE. It isn't wrong, just less -optimal than R_386_RELATIVE. But the x86 kernel fails to properly handle -R_386_32 relocations when relocating the kernel. To generate -R_386_RELATIVE relocations, we mark _bss, _ebss, _got and _egot as -hidden in both 32-bit and 64-bit x86 kernels. - -To build a 64-bit compressed x86 kernel as PIE, we need to disable the -relocation overflow check to avoid relocation overflow errors. We do -this with a new linker command-line option, -z noreloc-overflow, which -got added recently: - - commit 4c10bbaa0912742322f10d9d5bb630ba4e15dfa7 - Author: H.J. Lu <hjl.tools@gmail.com> - Date: Tue Mar 15 11:07:06 2016 -0700 - - Add -z noreloc-overflow option to x86-64 ld - - Add -z noreloc-overflow command-line option to the x86-64 ELF linker to - disable relocation overflow check. This can be used to avoid relocation - overflow check if there will be no dynamic relocation overflow at - run-time. - -The 64-bit compressed x86 kernel is built as PIE only if the linker supports --z noreloc-overflow. So far 64-bit relocatable compressed x86 kernel -boots fine even when it is built as a normal executable. - -Signed-off-by: H.J. Lu <hjl.tools@gmail.com> -Cc: Andy Lutomirski <luto@amacapital.net> -Cc: Borislav Petkov <bp@alien8.de> -Cc: Brian Gerst <brgerst@gmail.com> -Cc: Denys Vlasenko <dvlasenk@redhat.com> -Cc: H. Peter Anvin <hpa@zytor.com> -Cc: Linus Torvalds <torvalds@linux-foundation.org> -Cc: Peter Zijlstra <peterz@infradead.org> -Cc: Thomas Gleixner <tglx@linutronix.de> -Cc: linux-kernel@vger.kernel.org -[ Edited the changelog and comments. ] -Signed-off-by: Ingo Molnar <mingo@kernel.org> ---- - arch/x86/boot/compressed/Makefile | 14 +++++++++++++- - arch/x86/boot/compressed/head_32.S | 28 ++++++++++++++++++++++++++++ - arch/x86/boot/compressed/head_64.S | 8 ++++++++ - 3 files changed, 49 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile -index 6915ff2..8774cb2 100644 ---- a/arch/x86/boot/compressed/Makefile -+++ b/arch/x86/boot/compressed/Makefile -@@ -26,7 +26,7 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \ - vmlinux.bin.xz vmlinux.bin.lzo vmlinux.bin.lz4 - - KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 --KBUILD_CFLAGS += -fno-strict-aliasing -fPIC -+KBUILD_CFLAGS += -fno-strict-aliasing $(call cc-option, -fPIE, -fPIC) - KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING - cflags-$(CONFIG_X86_32) := -march=i386 - cflags-$(CONFIG_X86_64) := -mcmodel=small -@@ -40,6 +40,18 @@ GCOV_PROFILE := n - UBSAN_SANITIZE :=n - - LDFLAGS := -m elf_$(UTS_MACHINE) -+ifeq ($(CONFIG_RELOCATABLE),y) -+# If kernel is relocatable, build compressed kernel as PIE. -+ifeq ($(CONFIG_X86_32),y) -+LDFLAGS += $(call ld-option, -pie) $(call ld-option, --no-dynamic-linker) -+else -+# To build 64-bit compressed kernel as PIE, we disable relocation -+# overflow check to avoid relocation overflow error with a new linker -+# command-line option, -z noreloc-overflow. -+LDFLAGS += $(shell $(LD) --help 2>&1 | grep -q "\-z noreloc-overflow" \ -+ && echo "-z noreloc-overflow -pie --no-dynamic-linker") -+endif -+endif - LDFLAGS_vmlinux := -T - - hostprogs-y := mkpiggy -diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S -index 8ef964d..0256064 100644 ---- a/arch/x86/boot/compressed/head_32.S -+++ b/arch/x86/boot/compressed/head_32.S -@@ -31,6 +31,34 @@ - #include <asm/asm-offsets.h> - #include <asm/bootparam.h> - -+/* -+ * The 32-bit x86 assembler in binutils 2.26 will generate R_386_GOT32X -+ * relocation to get the symbol address in PIC. When the compressed x86 -+ * kernel isn't built as PIC, the linker optimizes R_386_GOT32X -+ * relocations to their fixed symbol addresses. However, when the -+ * compressed x86 kernel is loaded at a different address, it leads -+ * to the following load failure: -+ * -+ * Failed to allocate space for phdrs -+ * -+ * during the decompression stage. -+ * -+ * If the compressed x86 kernel is relocatable at run-time, it should be -+ * compiled with -fPIE, instead of -fPIC, if possible and should be built as -+ * Position Independent Executable (PIE) so that linker won't optimize -+ * R_386_GOT32X relocation to its fixed symbol address. Older -+ * linkers generate R_386_32 relocations against locally defined symbols, -+ * _bss, _ebss, _got and _egot, in PIE. It isn't wrong, just less -+ * optimal than R_386_RELATIVE. But the x86 kernel fails to properly handle -+ * R_386_32 relocations when relocating the kernel. To generate -+ * R_386_RELATIVE relocations, we mark _bss, _ebss, _got and _egot as -+ * hidden: -+ */ -+ .hidden _bss -+ .hidden _ebss -+ .hidden _got -+ .hidden _egot -+ - __HEAD - ENTRY(startup_32) - #ifdef CONFIG_EFI_STUB -diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S -index b0c0d16..86558a1 100644 ---- a/arch/x86/boot/compressed/head_64.S -+++ b/arch/x86/boot/compressed/head_64.S -@@ -33,6 +33,14 @@ - #include <asm/asm-offsets.h> - #include <asm/bootparam.h> - -+/* -+ * Locally defined symbols should be marked hidden: -+ */ -+ .hidden _bss -+ .hidden _ebss -+ .hidden _got -+ .hidden _egot -+ - __HEAD - .code32 - ENTRY(startup_32) --- -2.7.3 - diff --git a/x86-efi-bgrt-Switch-all-pr_err-to-pr_debug-for-inval.patch b/x86-efi-bgrt-Switch-all-pr_err-to-pr_debug-for-inval.patch deleted file mode 100644 index d3d0aa2c3..000000000 --- a/x86-efi-bgrt-Switch-all-pr_err-to-pr_debug-for-inval.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 3e4f68f273ef86e6ed8be24a86f8ef514deaecc0 Mon Sep 17 00:00:00 2001 -From: Josh Boyer <jwboyer@fedoraproject.org> -Date: Wed, 27 Apr 2016 08:37:41 -0400 -Subject: [PATCH] x86/efi-bgrt: Switch all pr_err() to pr_debug() for invalid - BGRT - -The promise of pretty boot splashes from firmware via BGRT was at -best only that; a promise. The kernel diligently checks to make -sure the BGRT data firmware gives it is valid, and dutifully warns -the user when it isn't. However, it does so via the pr_err log -level which seems unnecessary. The user cannot do anything about -this and there really isn't an error on the part of Linux to -correct. - -This lowers the log level by using pr_debug instead. Users will -no longer have their boot process uglified by the kernel reminding -us that firmware can and often is broken. Ironic, considering -BGRT is supposed to make boot pretty to begin with. - -Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org> ---- - arch/x86/platform/efi/efi-bgrt.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/arch/x86/platform/efi/efi-bgrt.c b/arch/x86/platform/efi/efi-bgrt.c -index ea48449b2e63..87da4108785b 100644 ---- a/arch/x86/platform/efi/efi-bgrt.c -+++ b/arch/x86/platform/efi/efi-bgrt.c -@@ -41,17 +41,17 @@ void __init efi_bgrt_init(void) - return; - - if (bgrt_tab->header.length < sizeof(*bgrt_tab)) { -- pr_err("Ignoring BGRT: invalid length %u (expected %zu)\n", -+ pr_debug("Ignoring BGRT: invalid length %u (expected %zu)\n", - bgrt_tab->header.length, sizeof(*bgrt_tab)); - return; - } - if (bgrt_tab->version != 1) { -- pr_err("Ignoring BGRT: invalid version %u (expected 1)\n", -+ pr_debug("Ignoring BGRT: invalid version %u (expected 1)\n", - bgrt_tab->version); - return; - } - if (bgrt_tab->status & 0xfe) { -- pr_err("Ignoring BGRT: reserved status bits are non-zero %u\n", -+ pr_debug("Ignoring BGRT: reserved status bits are non-zero %u\n", - bgrt_tab->status); - return; - } -@@ -61,12 +61,12 @@ void __init efi_bgrt_init(void) - return; - } - if (bgrt_tab->image_type != 0) { -- pr_err("Ignoring BGRT: invalid image type %u (expected 0)\n", -+ pr_debug("Ignoring BGRT: invalid image type %u (expected 0)\n", - bgrt_tab->image_type); - return; - } - if (!bgrt_tab->image_address) { -- pr_err("Ignoring BGRT: null image address\n"); -+ pr_debug("Ignoring BGRT: null image address\n"); - return; - } - -@@ -76,7 +76,7 @@ void __init efi_bgrt_init(void) - sizeof(bmp_header)); - ioremapped = true; - if (!image) { -- pr_err("Ignoring BGRT: failed to map image header memory\n"); -+ pr_debug("Ignoring BGRT: failed to map image header memory\n"); - return; - } - } -@@ -88,7 +88,7 @@ void __init efi_bgrt_init(void) - - bgrt_image = kmalloc(bgrt_image_size, GFP_KERNEL | __GFP_NOWARN); - if (!bgrt_image) { -- pr_err("Ignoring BGRT: failed to allocate memory for image (wanted %zu bytes)\n", -+ pr_debug("Ignoring BGRT: failed to allocate memory for image (wanted %zu bytes)\n", - bgrt_image_size); - return; - } -@@ -97,7 +97,7 @@ void __init efi_bgrt_init(void) - image = early_ioremap(bgrt_tab->image_address, - bmp_header.size); - if (!image) { -- pr_err("Ignoring BGRT: failed to map image memory\n"); -+ pr_debug("Ignoring BGRT: failed to map image memory\n"); - kfree(bgrt_image); - bgrt_image = NULL; - return; --- -2.5.5 - diff --git a/x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch b/x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch deleted file mode 100644 index 0776982c1..000000000 --- a/x86-mm-32-Enable-full-randomization-on-i386-and-X86_.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 8b8addf891de8a00e4d39fc32f93f7c5eb8feceb Mon Sep 17 00:00:00 2001 -From: Hector Marco-Gisbert <hecmargi@upv.es> -Date: Thu, 10 Mar 2016 20:51:00 +0100 -Subject: [PATCH] x86/mm/32: Enable full randomization on i386 and X86_32 - -Currently on i386 and on X86_64 when emulating X86_32 in legacy mode, only -the stack and the executable are randomized but not other mmapped files -(libraries, vDSO, etc.). This patch enables randomization for the -libraries, vDSO and mmap requests on i386 and in X86_32 in legacy mode. - -By default on i386 there are 8 bits for the randomization of the libraries, -vDSO and mmaps which only uses 1MB of VA. - -This patch preserves the original randomness, using 1MB of VA out of 3GB or -4GB. We think that 1MB out of 3GB is not a big cost for having the ASLR. - -The first obvious security benefit is that all objects are randomized (not -only the stack and the executable) in legacy mode which highly increases -the ASLR effectiveness, otherwise the attackers may use these -non-randomized areas. But also sensitive setuid/setgid applications are -more secure because currently, attackers can disable the randomization of -these applications by setting the ulimit stack to "unlimited". This is a -very old and widely known trick to disable the ASLR in i386 which has been -allowed for too long. - -Another trick used to disable the ASLR was to set the ADDR_NO_RANDOMIZE -personality flag, but fortunately this doesn't work on setuid/setgid -applications because there is security checks which clear Security-relevant -flags. - -This patch always randomizes the mmap_legacy_base address, removing the -possibility to disable the ASLR by setting the stack to "unlimited". - -Signed-off-by: Hector Marco-Gisbert <hecmargi@upv.es> -Acked-by: Ismael Ripoll Ripoll <iripoll@upv.es> -Acked-by: Kees Cook <keescook@chromium.org> -Acked-by: Arjan van de Ven <arjan@linux.intel.com> -Cc: Linus Torvalds <torvalds@linux-foundation.org> -Cc: Peter Zijlstra <peterz@infradead.org> -Cc: Thomas Gleixner <tglx@linutronix.de> -Cc: akpm@linux-foundation.org -Cc: kees Cook <keescook@chromium.org> -Link: http://lkml.kernel.org/r/1457639460-5242-1-git-send-email-hecmargi@upv.es -Signed-off-by: Ingo Molnar <mingo@kernel.org> ---- - arch/x86/mm/mmap.c | 14 +------------- - 1 file changed, 1 insertion(+), 13 deletions(-) - -diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c -index 96bd1e2..389939f 100644 ---- a/arch/x86/mm/mmap.c -+++ b/arch/x86/mm/mmap.c -@@ -94,18 +94,6 @@ static unsigned long mmap_base(unsigned long rnd) - } - - /* -- * Bottom-up (legacy) layout on X86_32 did not support randomization, X86_64 -- * does, but not when emulating X86_32 -- */ --static unsigned long mmap_legacy_base(unsigned long rnd) --{ -- if (mmap_is_ia32()) -- return TASK_UNMAPPED_BASE; -- else -- return TASK_UNMAPPED_BASE + rnd; --} -- --/* - * This function, called very early during the creation of a new - * process VM image, sets up which VM layout function to use: - */ -@@ -116,7 +104,7 @@ void arch_pick_mmap_layout(struct mm_struct *mm) - if (current->flags & PF_RANDOMIZE) - random_factor = arch_mmap_rnd(); - -- mm->mmap_legacy_base = mmap_legacy_base(random_factor); -+ mm->mmap_legacy_base = TASK_UNMAPPED_BASE + random_factor; - - if (mmap_is_legacy()) { - mm->mmap_base = mm->mmap_legacy_base; --- -2.7.3 - |