diff options
50 files changed, 2913 insertions, 77 deletions
diff --git a/0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch b/0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch new file mode 100644 index 000000000..8a2f68f82 --- /dev/null +++ b/0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch @@ -0,0 +1,78 @@ +From 39a8883a2b989d1d21bd8dd99f5557f0c5e89694 Mon Sep 17 00:00:00 2001 +From: Theodore Ts'o <tytso@mit.edu> +Date: Tue, 17 Jul 2018 18:24:27 -0400 +Subject: [PATCH] random: add a config option to trust the CPU's hwrng + +This gives the user building their own kernel (or a Linux +distribution) the option of deciding whether or not to trust the CPU's +hardware random number generator (e.g., RDRAND for x86 CPU's) as being +correctly implemented and not having a back door introduced (perhaps +courtesy of a Nation State's law enforcement or intelligence +agencies). + +This will prevent getrandom(2) from blocking, if there is a +willingness to trust the CPU manufacturer. + +Signed-off-by: Theodore Ts'o <tytso@mit.edu> +--- + drivers/char/Kconfig | 14 ++++++++++++++ + drivers/char/random.c | 11 ++++++++++- + 2 files changed, 24 insertions(+), 1 deletion(-) + +diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig +index 212f447938ae..ce277ee0a28a 100644 +--- a/drivers/char/Kconfig ++++ b/drivers/char/Kconfig +@@ -554,3 +554,17 @@ config ADI + + endmenu + ++config RANDOM_TRUST_CPU ++ bool "Trust the CPU manufacturer to initialize Linux's CRNG" ++ depends on X86 || S390 || PPC ++ default n ++ help ++ Assume that CPU manufacturer (e.g., Intel or AMD for RDSEED or ++ RDRAND, IBM for the S390 and Power PC architectures) is trustworthy ++ for the purposes of initializing Linux's CRNG. Since this is not ++ something that can be independently audited, this amounts to trusting ++ that CPU manufacturer (perhaps with the insistence or mandate ++ of a Nation State's intelligence or law enforcement agencies) ++ has not installed a hidden back door to compromise the CPU's ++ random number generation facilities. ++ +diff --git a/drivers/char/random.c b/drivers/char/random.c +index 34ddfd57419b..f4013b8a711b 100644 +--- a/drivers/char/random.c ++++ b/drivers/char/random.c +@@ -782,6 +782,7 @@ static void invalidate_batched_entropy(void); + static void crng_initialize(struct crng_state *crng) + { + int i; ++ int arch_init = 1; + unsigned long rv; + + memcpy(&crng->state[0], "expand 32-byte k", 16); +@@ -792,10 +793,18 @@ static void crng_initialize(struct crng_state *crng) + _get_random_bytes(&crng->state[4], sizeof(__u32) * 12); + for (i = 4; i < 16; i++) { + if (!arch_get_random_seed_long(&rv) && +- !arch_get_random_long(&rv)) ++ !arch_get_random_long(&rv)) { + rv = random_get_entropy(); ++ arch_init = 0; ++ } + crng->state[i] ^= rv; + } ++#ifdef CONFIG_RANDOM_TRUST_CPU ++ if (arch_init) { ++ crng_init = 2; ++ pr_notice("random: crng done (trusting CPU's manufacturer)\n"); ++ } ++#endif + crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1; + } + +-- +2.17.1 + diff --git a/0001-random-make-CPU-trust-a-boot-parameter.patch b/0001-random-make-CPU-trust-a-boot-parameter.patch new file mode 100644 index 000000000..33695fcb4 --- /dev/null +++ b/0001-random-make-CPU-trust-a-boot-parameter.patch @@ -0,0 +1,82 @@ +From 9b25436662d5fb4c66eb527ead53cab15f596ee0 Mon Sep 17 00:00:00 2001 +From: Kees Cook <keescook@chromium.org> +Date: Mon, 27 Aug 2018 14:51:54 -0700 +Subject: [PATCH] random: make CPU trust a boot parameter + +Instead of forcing a distro or other system builder to choose +at build time whether the CPU is trusted for CRNG seeding via +CONFIG_RANDOM_TRUST_CPU, provide a boot-time parameter for end users to +control the choice. The CONFIG will set the default state instead. + +Signed-off-by: Kees Cook <keescook@chromium.org> +Signed-off-by: Theodore Ts'o <tytso@mit.edu> +--- + Documentation/admin-guide/kernel-parameters.txt | 6 ++++++ + drivers/char/Kconfig | 4 ++-- + drivers/char/random.c | 11 ++++++++--- + 3 files changed, 16 insertions(+), 5 deletions(-) + +diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt +index 0c8f7889efa1..227c5c6fa4c1 100644 +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -3390,6 +3390,12 @@ + ramdisk_size= [RAM] Sizes of RAM disks in kilobytes + See Documentation/blockdev/ramdisk.txt. + ++ random.trust_cpu={on,off} ++ [KNL] Enable or disable trusting the use of the ++ CPU's random number generator (if available) to ++ fully seed the kernel's CRNG. Default is controlled ++ by CONFIG_RANDOM_TRUST_CPU. ++ + ras=option[,option,...] [KNL] RAS-specific options + + cec_disable [X86] +diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig +index ce277ee0a28a..40728491f37b 100644 +--- a/drivers/char/Kconfig ++++ b/drivers/char/Kconfig +@@ -566,5 +566,5 @@ config RANDOM_TRUST_CPU + that CPU manufacturer (perhaps with the insistence or mandate + of a Nation State's intelligence or law enforcement agencies) + has not installed a hidden back door to compromise the CPU's +- random number generation facilities. +- ++ random number generation facilities. This can also be configured ++ at boot with "random.trust_cpu=on/off". +diff --git a/drivers/char/random.c b/drivers/char/random.c +index bf5f99fc36f1..c75b6cdf0053 100644 +--- a/drivers/char/random.c ++++ b/drivers/char/random.c +@@ -779,6 +779,13 @@ static struct crng_state **crng_node_pool __read_mostly; + + static void invalidate_batched_entropy(void); + ++static bool trust_cpu __ro_after_init = IS_ENABLED(CONFIG_RANDOM_TRUST_CPU); ++static int __init parse_trust_cpu(char *arg) ++{ ++ return kstrtobool(arg, &trust_cpu); ++} ++early_param("random.trust_cpu", parse_trust_cpu); ++ + static void crng_initialize(struct crng_state *crng) + { + int i; +@@ -799,12 +806,10 @@ static void crng_initialize(struct crng_state *crng) + } + crng->state[i] ^= rv; + } +-#ifdef CONFIG_RANDOM_TRUST_CPU +- if (arch_init) { ++ if (trust_cpu && arch_init) { + crng_init = 2; + pr_notice("random: crng done (trusting CPU's manufacturer)\n"); + } +-#endif + crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1; + } + +-- +2.17.1 + diff --git a/CVE-2018-5391-additional.patch b/CVE-2018-5391-additional.patch new file mode 100644 index 000000000..47c9be758 --- /dev/null +++ b/CVE-2018-5391-additional.patch @@ -0,0 +1,110 @@ +From 5d407b071dc369c26a38398326ee2be53651cfe4 Mon Sep 17 00:00:00 2001 +From: Taehee Yoo <ap420073@gmail.com> +Date: Mon, 10 Sep 2018 02:47:05 +0900 +Subject: [PATCH] ip: frags: fix crash in ip_do_fragment() + +A kernel crash occurrs when defragmented packet is fragmented +in ip_do_fragment(). +In defragment routine, skb_orphan() is called and +skb->ip_defrag_offset is set. but skb->sk and +skb->ip_defrag_offset are same union member. so that +frag->sk is not NULL. +Hence crash occurrs in skb->sk check routine in ip_do_fragment() when +defragmented packet is fragmented. + +test commands: + %iptables -t nat -I POSTROUTING -j MASQUERADE + %hping3 192.168.4.2 -s 1000 -p 2000 -d 60000 + +splat looks like: +[ 261.069429] kernel BUG at net/ipv4/ip_output.c:636! +[ 261.075753] invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC KASAN PTI +[ 261.083854] CPU: 1 PID: 1349 Comm: hping3 Not tainted 4.19.0-rc2+ #3 +[ 261.100977] RIP: 0010:ip_do_fragment+0x1613/0x2600 +[ 261.106945] Code: e8 e2 38 e3 fe 4c 8b 44 24 18 48 8b 74 24 08 e9 92 f6 ff ff 80 3c 02 00 0f 85 da 07 00 00 48 8b b5 d0 00 00 00 e9 25 f6 ff ff <0f> 0b 0f 0b 44 8b 54 24 58 4c 8b 4c 24 18 4c 8b 5c 24 60 4c 8b 6c +[ 261.127015] RSP: 0018:ffff8801031cf2c0 EFLAGS: 00010202 +[ 261.134156] RAX: 1ffff1002297537b RBX: ffffed0020639e6e RCX: 0000000000000004 +[ 261.142156] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff880114ba9bd8 +[ 261.150157] RBP: ffff880114ba8a40 R08: ffffed0022975395 R09: ffffed0022975395 +[ 261.158157] R10: 0000000000000001 R11: ffffed0022975394 R12: ffff880114ba9ca4 +[ 261.166159] R13: 0000000000000010 R14: ffff880114ba9bc0 R15: dffffc0000000000 +[ 261.174169] FS: 00007fbae2199700(0000) GS:ffff88011b400000(0000) knlGS:0000000000000000 +[ 261.183012] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 261.189013] CR2: 00005579244fe000 CR3: 0000000119bf4000 CR4: 00000000001006e0 +[ 261.198158] Call Trace: +[ 261.199018] ? dst_output+0x180/0x180 +[ 261.205011] ? save_trace+0x300/0x300 +[ 261.209018] ? ip_copy_metadata+0xb00/0xb00 +[ 261.213034] ? sched_clock_local+0xd4/0x140 +[ 261.218158] ? kill_l4proto+0x120/0x120 [nf_conntrack] +[ 261.223014] ? rt_cpu_seq_stop+0x10/0x10 +[ 261.227014] ? find_held_lock+0x39/0x1c0 +[ 261.233008] ip_finish_output+0x51d/0xb50 +[ 261.237006] ? ip_fragment.constprop.56+0x220/0x220 +[ 261.243011] ? nf_ct_l4proto_register_one+0x5b0/0x5b0 [nf_conntrack] +[ 261.250152] ? rcu_is_watching+0x77/0x120 +[ 261.255010] ? nf_nat_ipv4_out+0x1e/0x2b0 [nf_nat_ipv4] +[ 261.261033] ? nf_hook_slow+0xb1/0x160 +[ 261.265007] ip_output+0x1c7/0x710 +[ 261.269005] ? ip_mc_output+0x13f0/0x13f0 +[ 261.273002] ? __local_bh_enable_ip+0xe9/0x1b0 +[ 261.278152] ? ip_fragment.constprop.56+0x220/0x220 +[ 261.282996] ? nf_hook_slow+0xb1/0x160 +[ 261.287007] raw_sendmsg+0x21f9/0x4420 +[ 261.291008] ? dst_output+0x180/0x180 +[ 261.297003] ? sched_clock_cpu+0x126/0x170 +[ 261.301003] ? find_held_lock+0x39/0x1c0 +[ 261.306155] ? stop_critical_timings+0x420/0x420 +[ 261.311004] ? check_flags.part.36+0x450/0x450 +[ 261.315005] ? _raw_spin_unlock_irq+0x29/0x40 +[ 261.320995] ? _raw_spin_unlock_irq+0x29/0x40 +[ 261.326142] ? cyc2ns_read_end+0x10/0x10 +[ 261.330139] ? raw_bind+0x280/0x280 +[ 261.334138] ? sched_clock_cpu+0x126/0x170 +[ 261.338995] ? check_flags.part.36+0x450/0x450 +[ 261.342991] ? __lock_acquire+0x4500/0x4500 +[ 261.348994] ? inet_sendmsg+0x11c/0x500 +[ 261.352989] ? dst_output+0x180/0x180 +[ 261.357012] inet_sendmsg+0x11c/0x500 +[ ... ] + +v2: + - clear skb->sk at reassembly routine.(Eric Dumarzet) + +Fixes: fa0f527358bd ("ip: use rb trees for IP frag queue.") +Suggested-by: Eric Dumazet <edumazet@google.com> +Signed-off-by: Taehee Yoo <ap420073@gmail.com> +Reviewed-by: Eric Dumazet <edumazet@google.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + net/ipv4/ip_fragment.c | 1 + + net/ipv6/netfilter/nf_conntrack_reasm.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c +index 88281fbce88c..e7227128df2c 100644 +--- a/net/ipv4/ip_fragment.c ++++ b/net/ipv4/ip_fragment.c +@@ -599,6 +599,7 @@ static int ip_frag_reasm(struct ipq *qp, struct sk_buff *skb, + nextp = &fp->next; + fp->prev = NULL; + memset(&fp->rbnode, 0, sizeof(fp->rbnode)); ++ fp->sk = NULL; + head->data_len += fp->len; + head->len += fp->len; + if (head->ip_summed != fp->ip_summed) +diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c +index 2a14d8b65924..8f68a518d9db 100644 +--- a/net/ipv6/netfilter/nf_conntrack_reasm.c ++++ b/net/ipv6/netfilter/nf_conntrack_reasm.c +@@ -445,6 +445,7 @@ nf_ct_frag6_reasm(struct frag_queue *fq, struct sk_buff *prev, struct net_devic + else if (head->ip_summed == CHECKSUM_COMPLETE) + head->csum = csum_add(head->csum, fp->csum); + head->truesize += fp->truesize; ++ fp->sk = NULL; + } + sub_frag_mem_limit(fq->q.net, head->truesize); + +-- +2.17.1 + diff --git a/HID-fixes.patch b/HID-fixes.patch new file mode 100644 index 000000000..c934baad7 --- /dev/null +++ b/HID-fixes.patch @@ -0,0 +1,406 @@ +From patchwork Tue Sep 4 13:31:12 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Benjamin Tissoires <benjamin.tissoires@redhat.com> +X-Patchwork-Id: 10587363 +Return-Path: <linux-input-owner@kernel.org> +Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org + [172.30.200.125]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6F0A13AC + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:39 +0000 (UTC) +Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) + by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B853A297E4 + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:39 +0000 (UTC) +Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) + id B5F90298AD; Tue, 4 Sep 2018 13:31:39 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on + pdx-wl-mail.web.codeaurora.org +X-Spam-Level: +X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, + RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 59B642985E + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:39 +0000 (UTC) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727136AbeIDR4q (ORCPT + <rfc822;patchwork-linux-input@patchwork.kernel.org>); + Tue, 4 Sep 2018 13:56:46 -0400 +Received: from mx3-rdu2.redhat.com ([66.187.233.73]:54264 "EHLO + mx1.redhat.com" + rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP + id S1727057AbeIDR4q (ORCPT <rfc822;linux-input@vger.kernel.org>); + Tue, 4 Sep 2018 13:56:46 -0400 +Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com + [10.11.54.5]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by mx1.redhat.com (Postfix) with ESMTPS id AEC9A804B9F2; + Tue, 4 Sep 2018 13:31:36 +0000 (UTC) +Received: from plouf.redhat.com (ovpn-116-25.ams2.redhat.com [10.36.116.25]) + by smtp.corp.redhat.com (Postfix) with ESMTP id 88B24A9EF9; + Tue, 4 Sep 2018 13:31:35 +0000 (UTC) +From: Benjamin Tissoires <benjamin.tissoires@redhat.com> +To: Jiri Kosina <jikos@kernel.org>, + Dmitry Torokhov <dmitry.torokhov@gmail.com> +Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>, + linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, + stable@vger.kernel.org +Subject: [PATCH 1/4] HID: multitouch: fix Elan panels with 2 input modes + declaration +Date: Tue, 4 Sep 2018 15:31:12 +0200 +Message-Id: <20180904133115.5111-2-benjamin.tissoires@redhat.com> +In-Reply-To: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +References: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 +X-Greylist: Sender IP whitelisted, + not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); + Tue, 04 Sep 2018 13:31:36 +0000 (UTC) +X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); + Tue, + 04 Sep 2018 13:31:36 +0000 (UTC) for IP:'10.11.54.5' + DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' + HELO:'smtp.corp.redhat.com' FROM:'benjamin.tissoires@redhat.com' RCPT:'' +Sender: linux-input-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-input.vger.kernel.org> +X-Mailing-List: linux-input@vger.kernel.org +X-Virus-Scanned: ClamAV using ClamSMTP + +When implementing commit 7f81c8db5489 ("HID: multitouch: simplify +the settings of the various features"), I wrongly removed a test +that made sure we never try to set the second InputMode feature +to something else than 0. + +This broke badly some recent Elan panels that now forget to send the +click button in some area of the touchpad. + +Fixes 7f81c8db5489 + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=200899 + +Cc: stable@vger.kernel.org # v4.18+ +Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> +--- + drivers/hid/hid-multitouch.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 40fbb7c52723..88da991ef256 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -1375,7 +1375,8 @@ static bool mt_need_to_apply_feature(struct hid_device *hdev, + struct hid_usage *usage, + enum latency_mode latency, + bool surface_switch, +- bool button_switch) ++ bool button_switch, ++ bool *inputmode_found) + { + struct mt_device *td = hid_get_drvdata(hdev); + struct mt_class *cls = &td->mtclass; +@@ -1387,6 +1388,14 @@ static bool mt_need_to_apply_feature(struct hid_device *hdev, + + switch (usage->hid) { + case HID_DG_INPUTMODE: ++ /* ++ * Some elan panels wrongly declare 2 input mode features, ++ * and silently ignore when we set the value in the second ++ * field. Skip the second feature and hope for the best. ++ */ ++ if (*inputmode_found) ++ return false; ++ + if (cls->quirks & MT_QUIRK_FORCE_GET_FEATURE) { + report_len = hid_report_len(report); + buf = hid_alloc_report_buf(report, GFP_KERNEL); +@@ -1402,6 +1411,7 @@ static bool mt_need_to_apply_feature(struct hid_device *hdev, + } + + field->value[index] = td->inputmode_value; ++ *inputmode_found = true; + return true; + + case HID_DG_CONTACTMAX: +@@ -1439,6 +1449,7 @@ static void mt_set_modes(struct hid_device *hdev, enum latency_mode latency, + struct hid_usage *usage; + int i, j; + bool update_report; ++ bool inputmode_found = false; + + rep_enum = &hdev->report_enum[HID_FEATURE_REPORT]; + list_for_each_entry(rep, &rep_enum->report_list, list) { +@@ -1457,7 +1468,8 @@ static void mt_set_modes(struct hid_device *hdev, enum latency_mode latency, + usage, + latency, + surface_switch, +- button_switch)) ++ button_switch, ++ &inputmode_found)) + update_report = true; + } + } + +From patchwork Tue Sep 4 13:31:13 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Benjamin Tissoires <benjamin.tissoires@redhat.com> +X-Patchwork-Id: 10587365 +Return-Path: <linux-input-owner@kernel.org> +Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org + [172.30.200.125]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CE7013BB + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:43 +0000 (UTC) +Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) + by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F2E1E29869 + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:42 +0000 (UTC) +Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) + id F10BF2988D; Tue, 4 Sep 2018 13:31:42 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on + pdx-wl-mail.web.codeaurora.org +X-Spam-Level: +X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, + RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AA59D29869 + for <patchwork-linux-input@patchwork.kernel.org>; + Tue, 4 Sep 2018 13:31:42 +0000 (UTC) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727401AbeIDR4u (ORCPT + <rfc822;patchwork-linux-input@patchwork.kernel.org>); + Tue, 4 Sep 2018 13:56:50 -0400 +Received: from mx3-rdu2.redhat.com ([66.187.233.73]:46152 "EHLO + mx1.redhat.com" + rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP + id S1727057AbeIDR4u (ORCPT <rfc822;linux-input@vger.kernel.org>); + Tue, 4 Sep 2018 13:56:50 -0400 +Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com + [10.11.54.5]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by mx1.redhat.com (Postfix) with ESMTPS id E039740241C8; + Tue, 4 Sep 2018 13:31:40 +0000 (UTC) +Received: from plouf.redhat.com (ovpn-116-25.ams2.redhat.com [10.36.116.25]) + by smtp.corp.redhat.com (Postfix) with ESMTP id DC6AEA9EFD; + Tue, 4 Sep 2018 13:31:39 +0000 (UTC) +From: Benjamin Tissoires <benjamin.tissoires@redhat.com> +To: Jiri Kosina <jikos@kernel.org>, + Dmitry Torokhov <dmitry.torokhov@gmail.com> +Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>, + linux-input@vger.kernel.org, linux-kernel@vger.kernel.org +Subject: [PATCH 2/4] HID: input: do not append a suffix if the name already + has it +Date: Tue, 4 Sep 2018 15:31:13 +0200 +Message-Id: <20180904133115.5111-3-benjamin.tissoires@redhat.com> +In-Reply-To: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +References: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 +X-Greylist: Sender IP whitelisted, + not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); + Tue, 04 Sep 2018 13:31:40 +0000 (UTC) +X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); + Tue, + 04 Sep 2018 13:31:40 +0000 (UTC) for IP:'10.11.54.5' + DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' + HELO:'smtp.corp.redhat.com' FROM:'benjamin.tissoires@redhat.com' RCPT:'' +Sender: linux-input-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-input.vger.kernel.org> +X-Mailing-List: linux-input@vger.kernel.org +X-Virus-Scanned: ClamAV using ClamSMTP + +Or it creates some weird input names like: +"MI Dongle MI Wireless Mouse Mouse" + +Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> +--- + drivers/hid/hid-input.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index ac201817a2dd..1e9ba8f7a16b 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -1516,6 +1516,7 @@ static struct hid_input *hidinput_allocate(struct hid_device *hid, + struct hid_input *hidinput = kzalloc(sizeof(*hidinput), GFP_KERNEL); + struct input_dev *input_dev = input_allocate_device(); + const char *suffix = NULL; ++ size_t suffix_len, name_len; + + if (!hidinput || !input_dev) + goto fail; +@@ -1559,10 +1560,15 @@ static struct hid_input *hidinput_allocate(struct hid_device *hid, + } + + if (suffix) { +- hidinput->name = kasprintf(GFP_KERNEL, "%s %s", +- hid->name, suffix); +- if (!hidinput->name) +- goto fail; ++ name_len = strlen(hid->name); ++ suffix_len = strlen(suffix); ++ if ((name_len < suffix_len) || ++ strcmp(hid->name + name_len - suffix_len, suffix)) { ++ hidinput->name = kasprintf(GFP_KERNEL, "%s %s", ++ hid->name, suffix); ++ if (!hidinput->name) ++ goto fail; ++ } + } + + input_set_drvdata(input_dev, hid); + +From patchwork Tue Sep 4 13:31:14 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Benjamin Tissoires <benjamin.tissoires@redhat.com> +X-Patchwork-Id: 10587369 +Return-Path: <linux-input-owner@kernel.org> +Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org + [172.30.200.125]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5F2F2175A + for <patchwork-linux-input@patchwork.kernel.org>; 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+ Tue, 4 Sep 2018 13:56:56 -0400 +Received: from mx3-rdu2.redhat.com ([66.187.233.73]:60400 "EHLO + mx1.redhat.com" + rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP + id S1727057AbeIDR4z (ORCPT <rfc822;linux-input@vger.kernel.org>); + Tue, 4 Sep 2018 13:56:55 -0400 +Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com + [10.11.54.5]) + (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) + (No client certificate requested) + by mx1.redhat.com (Postfix) with ESMTPS id 640FC4023842; + Tue, 4 Sep 2018 13:31:46 +0000 (UTC) +Received: from plouf.redhat.com (ovpn-116-25.ams2.redhat.com [10.36.116.25]) + by smtp.corp.redhat.com (Postfix) with ESMTP id 6F8E8A9EF7; + Tue, 4 Sep 2018 13:31:43 +0000 (UTC) +From: Benjamin Tissoires <benjamin.tissoires@redhat.com> +To: Jiri Kosina <jikos@kernel.org>, + Dmitry Torokhov <dmitry.torokhov@gmail.com> +Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>, + linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, + stable@vger.kernel.org +Subject: [PATCH 3/4] HID: core: fix grouping by application +Date: Tue, 4 Sep 2018 15:31:14 +0200 +Message-Id: <20180904133115.5111-4-benjamin.tissoires@redhat.com> +In-Reply-To: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +References: <20180904133115.5111-1-benjamin.tissoires@redhat.com> +X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 +X-Greylist: Sender IP whitelisted, + not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); + Tue, 04 Sep 2018 13:31:46 +0000 (UTC) +X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); + Tue, + 04 Sep 2018 13:31:46 +0000 (UTC) for IP:'10.11.54.5' + DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' + HELO:'smtp.corp.redhat.com' FROM:'benjamin.tissoires@redhat.com' RCPT:'' +Sender: linux-input-owner@vger.kernel.org +Precedence: bulk +List-ID: <linux-input.vger.kernel.org> +X-Mailing-List: linux-input@vger.kernel.org +X-Virus-Scanned: ClamAV using ClamSMTP + +commit f07b3c1da92d ("HID: generic: create one input report per +application type") was effectively the same as MULTI_INPUT: +hidinput->report was never set, so hidinput_match_application() +always returned null. + +Fix that by testing against the real application. + +Note that this breaks some old eGalax touchscreens that expect MULTI_INPUT +instead of HID_QUIRK_INPUT_PER_APP. Enable this quirk for backward +compatibility on all non-Win8 touchscreens. + +link: https://bugzilla.kernel.org/show_bug.cgi?id=200847 +link: https://bugzilla.kernel.org/show_bug.cgi?id=200849 +link: https://bugs.archlinux.org/task/59699 +link: https://github.com/NixOS/nixpkgs/issues/45165 + +Cc: stable@vger.kernel.org # v4.18+ +Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> +--- + +This replaces https://patchwork.kernel.org/patch/10583471/ +A proper fix is better than a revert. + + drivers/hid/hid-input.c | 4 ++-- + drivers/hid/hid-multitouch.c | 3 +++ + include/linux/hid.h | 1 + + 3 files changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index 1e9ba8f7a16b..907b08e50a9b 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -1588,6 +1588,7 @@ static struct hid_input *hidinput_allocate(struct hid_device *hid, + input_dev->dev.parent = &hid->dev; + + hidinput->input = input_dev; ++ hidinput->application = application; + list_add_tail(&hidinput->list, &hid->inputs); + + INIT_LIST_HEAD(&hidinput->reports); +@@ -1683,8 +1684,7 @@ static struct hid_input *hidinput_match_application(struct hid_report *report) + struct hid_input *hidinput; + + list_for_each_entry(hidinput, &hid->inputs, list) { +- if (hidinput->report && +- hidinput->report->application == report->application) ++ if (hidinput->application == report->application) + return hidinput; + } + +diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c +index 88da991ef256..da954f3f4da7 100644 +--- a/drivers/hid/hid-multitouch.c ++++ b/drivers/hid/hid-multitouch.c +@@ -1697,6 +1697,9 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id) + */ + hdev->quirks |= HID_QUIRK_INPUT_PER_APP; + ++ if (id->group != HID_GROUP_MULTITOUCH_WIN_8) ++ hdev->quirks |= HID_QUIRK_MULTI_INPUT; ++ + timer_setup(&td->release_timer, mt_expired_timeout, 0); + + ret = hid_parse(hdev); +diff --git a/include/linux/hid.h b/include/linux/hid.h +index 834e6461a690..d44a78362942 100644 +--- a/include/linux/hid.h ++++ b/include/linux/hid.h +@@ -526,6 +526,7 @@ struct hid_input { + const char *name; + bool registered; + struct list_head reports; /* the list of reports */ ++ unsigned int application; /* application usage for this input */ + }; + + enum hid_type { + diff --git a/arm64-96boards-RK3399-Ficus-board.patch b/arm64-96boards-RK3399-Ficus-board.patch new file mode 100644 index 000000000..5311050d8 --- /dev/null +++ b/arm64-96boards-RK3399-Ficus-board.patch @@ -0,0 +1,780 @@ +From 7c41a3f42a51d88e271c989c16be178bd6d38dfe Mon Sep 17 00:00:00 2001 +From: Peter Robinson <pbrobinson@gmail.com> +Date: Mon, 10 Sep 2018 18:17:36 +0100 +Subject: [PATCH 1/4] arm64: dts: rockchip: add 96boards RK3399 Ficus board + +The RK3399 Ficus board is an Enterprise Edition board +manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. + +The board exposes a bunch of nice peripherals, including +SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. + +Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> +Reviewed-by: Rob Herring <robh@kernel.org> +Signed-off-by: Heiko Stuebner <heiko@sntech.de> +Signed-off-by: Peter Robinson <pbrobinson@gmail.com> +--- + .../devicetree/bindings/arm/rockchip.txt | 5 + + arch/arm64/boot/dts/rockchip/Makefile | 1 + + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ + 3 files changed, 520 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt +index 1c1d62d03c4f..d46c5d43e27f 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.txt ++++ b/Documentation/devicetree/bindings/arm/rockchip.txt +@@ -1,5 +1,10 @@ + Rockchip platforms device tree bindings + --------------------------------------- ++ ++- 96boards RK3399 Ficus (ROCK960 Enterprise Edition) ++ Required root node properties: ++ - compatible = "vamrs,ficus", "rockchip,rk3399"; ++ + - Amarula Vyasa RK3288 board + Required root node properties: + - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 48a83f882947..2811fb701f12 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +new file mode 100644 +index 000000000000..0d14183dd4a9 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -0,0 +1,514 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2018 Collabora Ltd. ++ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. ++ * ++ * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw ++ */ ++ ++/dts-v1/; ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "96boards RK3399 Ficus"; ++ compatible = "vamrs,ficus", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ vcc1v8_s0: vcc1v8-s0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_s0"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_drv>; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_pcie"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 0>; ++ regulator-name = "vdd_log"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ /* for rockchip boot on */ ++ rockchip,pwm_id= <2>; ++ rockchip,pwm_voltage = <900000>; ++ ++ vin-supply = <&vcc_sys>; ++ }; ++ ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ clock_in_out = "input"; ++ phy-supply = <&vcc3v3_sys>; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ tx_delay = <0x28>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ status = "okay"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sys>; ++ vcc10-supply = <&vcc_sys>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc_1v8>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_hdmi: LDO_REG2 { ++ regulator-name = "vcca1v8_hdmi"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG3 { ++ regulator-name = "vcca_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc3v0_sd: LDO_REG5 { ++ regulator-name = "vcc3v0_sd"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca0v9_hdmi: LDO_REG7 { ++ regulator-name = "vcca0v9_hdmi"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; ++}; ++ ++&io_domains { ++ bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ ++ audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ ++ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ ++ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ ++ status = "okay"; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gmac { ++ rgmii_sleep_pins: rgmii-sleep-pins { ++ rockchip,pins = ++ <3 15 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus1: sdmmc-bus1 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = ++ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = ++ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ pcie { ++ pcie_drv: pcie-drv { ++ rockchip,pins = ++ <1 24 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 21 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = ++ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = ++ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&pwm3 { ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ clock-frequency = <100000000>; ++ clock-freq-min-max = <100000 100000000>; ++ disable-wp; ++ sd-uhs-sdr104; ++ vqmmc-supply = <&vcc_sd>; ++ card-detect-delay = <800>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +-- +2.19.0.rc1 + +From 2e3f4fb6f0a94b6cf56407536414b93bd3c45471 Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra <enric.balletbo@collabora.com> +Date: Sat, 14 Jul 2018 14:09:22 -0300 +Subject: [PATCH 2/4] arm64: dts: rockchip: add USB 2.0 and 3.0 support on + Ficus board + +The board exposes two types A ports, one is USB 3.0, up to 5.0Gbps and +another one is USB 2.0 up to 480Mbps. Enable the USB PHYs and the USB +controllers to enable theses devices. + +Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> +Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> +Signed-off-by: Heiko Stuebner <heiko@sntech.de> +--- + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 88 +++++++++++++++++++ + 1 file changed, 88 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +index 0d14183dd4a9..890b9e13cfe8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -61,6 +61,19 @@ + vin-supply = <&vcc3v3_sys>; + }; + ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 0>; +@@ -454,6 +467,13 @@ + <1 14 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = ++ <4 27 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; + }; + + &pwm2 { +@@ -487,6 +507,40 @@ + status = "okay"; + }; + ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; +@@ -497,6 +551,40 @@ + status = "okay"; + }; + ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ + &vopb { + status = "okay"; + }; +-- +2.19.0.rc1 + +From d875193399378e17911829b9df9d27fd4a1ba195 Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra <enric.balletbo@collabora.com> +Date: Sat, 14 Jul 2018 14:09:22 -0300 +Subject: [PATCH 3/4] arm64: dts: rockchip: add voltage properties for + vcc3v3_pcie on rk3399 ficus + +The vcc3v3_pcie regulator supplies 3.3V so add voltage properties +for it. + +Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> +Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> +[split off from original patch] +Signed-off-by: Heiko Stuebner <heiko@sntech.de> +--- + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +index 890b9e13cfe8..6295483b701f 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -58,6 +58,8 @@ + pinctrl-0 = <&pcie_drv>; + regulator-boot-on; + regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + +-- +2.19.0.rc1 + +From 416756dbf32ff2394b320fa88c09e9461496fc4c Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner <heiko@sntech.de> +Date: Mon, 16 Jul 2018 18:52:44 +0200 +Subject: [PATCH 4/4] arm64: dts: rockchip: drop out-of-tree properties from + rk3399-ficus regulator + +The pwm-regulator for vdd_log uses additional unreviewed properties in the +vendor kernel, which slipped in with the devicetree. +As written, they are unreviewed and unused in all mainline implementations +so drop them again. + +Signed-off-by: Heiko Stuebner <heiko@sntech.de> +--- + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +index 6295483b701f..8978d924eb83 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -84,11 +84,6 @@ + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; +- +- /* for rockchip boot on */ +- rockchip,pwm_id= <2>; +- rockchip,pwm_voltage = <900000>; +- + vin-supply = <&vcc_sys>; + }; + +-- +2.19.0.rc1 + diff --git a/arm64-96boards-Rock960-CE-board-support.patch b/arm64-96boards-Rock960-CE-board-support.patch new file mode 100644 index 000000000..7d0d338a1 --- /dev/null +++ b/arm64-96boards-Rock960-CE-board-support.patch @@ -0,0 +1,1201 @@ +From 18c1ec0b6501f2aa0aabcc8ca75824f9f49bcd91 Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Date: Mon, 10 Sep 2018 20:43:53 +0530 +Subject: [PATCH 1/4] arm64: dts: rockchip: Split out common nodes for Rock960 + based boards + +Since the same family members of Rock960 boards (Rock960 and Ficus) +share the same configuration, split out the common nodes into a common +dtsi file for reducing code duplication. The board specific nodes for +Ficus boards are then placed in corresponding board DTS file. + +Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +--- + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 429 +---------------- + .../boot/dts/rockchip/rk3399-rock960.dtsi | 439 ++++++++++++++++++ + 2 files changed, 440 insertions(+), 428 deletions(-) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +index 8978d924eb83..7f6ec37d5a69 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +@@ -7,8 +7,7 @@ + */ + + /dts-v1/; +-#include "rk3399.dtsi" +-#include "rk3399-opp.dtsi" ++#include "rk3399-rock960.dtsi" + + / { + model = "96boards RK3399 Ficus"; +@@ -25,31 +24,6 @@ + #clock-cells = <0>; + }; + +- vcc1v8_s0: vcc1v8-s0 { +- compatible = "regulator-fixed"; +- regulator-name = "vcc1v8_s0"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-always-on; +- }; +- +- vcc_sys: vcc-sys { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_sys"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- }; +- +- vcc3v3_sys: vcc3v3-sys { +- compatible = "regulator-fixed"; +- regulator-name = "vcc3v3_sys"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- vin-supply = <&vcc_sys>; +- }; +- + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -75,46 +49,6 @@ + regulator-always-on; + vin-supply = <&vcc_sys>; + }; +- +- vdd_log: vdd-log { +- compatible = "pwm-regulator"; +- pwms = <&pwm2 0 25000 0>; +- regulator-name = "vdd_log"; +- regulator-min-microvolt = <800000>; +- regulator-max-microvolt = <1400000>; +- regulator-always-on; +- regulator-boot-on; +- vin-supply = <&vcc_sys>; +- }; +- +-}; +- +-&cpu_l0 { +- cpu-supply = <&vdd_cpu_l>; +-}; +- +-&cpu_l1 { +- cpu-supply = <&vdd_cpu_l>; +-}; +- +-&cpu_l2 { +- cpu-supply = <&vdd_cpu_l>; +-}; +- +-&cpu_l3 { +- cpu-supply = <&vdd_cpu_l>; +-}; +- +-&cpu_b0 { +- cpu-supply = <&vdd_cpu_b>; +-}; +- +-&cpu_b1 { +- cpu-supply = <&vdd_cpu_b>; +-}; +- +-&emmc_phy { +- status = "okay"; + }; + + &gmac { +@@ -133,263 +67,6 @@ + status = "okay"; + }; + +-&hdmi { +- ddc-i2c-bus = <&i2c3>; +- pinctrl-names = "default"; +- pinctrl-0 = <&hdmi_cec>; +- status = "okay"; +-}; +- +-&i2c0 { +- clock-frequency = <400000>; +- i2c-scl-rising-time-ns = <168>; +- i2c-scl-falling-time-ns = <4>; +- status = "okay"; +- +- vdd_cpu_b: regulator@40 { +- compatible = "silergy,syr827"; +- reg = <0x40>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_b"; +- regulator-min-microvolt = <712500>; +- regulator-max-microvolt = <1500000>; +- regulator-ramp-delay = <1000>; +- regulator-always-on; +- regulator-boot-on; +- vin-supply = <&vcc_sys>; +- status = "okay"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_gpu: regulator@41 { +- compatible = "silergy,syr828"; +- reg = <0x41>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_gpu"; +- regulator-min-microvolt = <712500>; +- regulator-max-microvolt = <1500000>; +- regulator-ramp-delay = <1000>; +- regulator-always-on; +- regulator-boot-on; +- vin-supply = <&vcc_sys>; +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- rk808: pmic@1b { +- compatible = "rockchip,rk808"; +- reg = <0x1b>; +- interrupt-parent = <&gpio1>; +- interrupts = <21 IRQ_TYPE_LEVEL_LOW>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pmic_int_l>; +- rockchip,system-power-controller; +- wakeup-source; +- #clock-cells = <1>; +- clock-output-names = "xin32k", "rk808-clkout2"; +- +- vcc1-supply = <&vcc_sys>; +- vcc2-supply = <&vcc_sys>; +- vcc3-supply = <&vcc_sys>; +- vcc4-supply = <&vcc_sys>; +- vcc6-supply = <&vcc_sys>; +- vcc7-supply = <&vcc_sys>; +- vcc8-supply = <&vcc3v3_sys>; +- vcc9-supply = <&vcc_sys>; +- vcc10-supply = <&vcc_sys>; +- vcc11-supply = <&vcc_sys>; +- vcc12-supply = <&vcc3v3_sys>; +- vddio-supply = <&vcc_1v8>; +- +- regulators { +- vdd_center: DCDC_REG1 { +- regulator-name = "vdd_center"; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <1350000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_cpu_l: DCDC_REG2 { +- regulator-name = "vdd_cpu_l"; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <1350000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vcc_ddr: DCDC_REG3 { +- regulator-name = "vcc_ddr"; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- }; +- }; +- +- vcc_1v8: DCDC_REG4 { +- regulator-name = "vcc_1v8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vcc1v8_dvp: LDO_REG1 { +- regulator-name = "vcc1v8_dvp"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vcca1v8_hdmi: LDO_REG2 { +- regulator-name = "vcca1v8_hdmi"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vcca_1v8: LDO_REG3 { +- regulator-name = "vcca_1v8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vcc_sd: LDO_REG4 { +- regulator-name = "vcc_sd"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <3300000>; +- }; +- }; +- +- vcc3v0_sd: LDO_REG5 { +- regulator-name = "vcc3v0_sd"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3000000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <3000000>; +- }; +- }; +- +- vcc_1v5: LDO_REG6 { +- regulator-name = "vcc_1v5"; +- regulator-min-microvolt = <1500000>; +- regulator-max-microvolt = <1500000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1500000>; +- }; +- }; +- +- vcca0v9_hdmi: LDO_REG7 { +- regulator-name = "vcca0v9_hdmi"; +- regulator-min-microvolt = <900000>; +- regulator-max-microvolt = <900000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <900000>; +- }; +- }; +- +- vcc_3v0: LDO_REG8 { +- regulator-name = "vcc_3v0"; +- regulator-min-microvolt = <3000000>; +- regulator-max-microvolt = <3000000>; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <3000000>; +- }; +- }; +- +- vcc3v3_s3: SWITCH_REG1 { +- regulator-name = "vcc3v3_s3"; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- }; +- }; +- +- vcc3v3_s0: SWITCH_REG2 { +- regulator-name = "vcc3v3_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-state-mem { +- regulator-on-in-suspend; +- }; +- }; +- }; +- }; +-}; +- +-&i2c1 { +- status = "okay"; +-}; +- +-&i2c2 { +- status = "okay"; +-}; +- +-&i2c3 { +- status = "okay"; +-}; +- +-&i2c4 { +- status = "okay"; +-}; +- +-&io_domains { +- bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ +- audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ +- sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ +- gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ +- status = "okay"; +-}; +- + &pcie_phy { + status = "okay"; + }; +@@ -403,11 +80,6 @@ + status = "okay"; + }; + +-&pmu_io_domains { +- pmu1830-supply = <&vcc_1v8>; +- status = "okay"; +-}; +- + &pinctrl { + gmac { + rgmii_sleep_pins: rgmii-sleep-pins { +@@ -416,31 +88,6 @@ + }; + }; + +- sdmmc { +- sdmmc_bus1: sdmmc-bus1 { +- rockchip,pins = +- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; +- }; +- +- sdmmc_bus4: sdmmc-bus4 { +- rockchip,pins = +- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, +- <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; +- }; +- +- sdmmc_clk: sdmmc-clk { +- rockchip,pins = +- <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; +- }; +- +- sdmmc_cmd: sdmmc-cmd { +- rockchip,pins = +- <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; +- }; +- }; +- + pcie { + pcie_drv: pcie-drv { + rockchip,pins = +@@ -448,23 +95,6 @@ + }; + }; + +- pmic { +- pmic_int_l: pmic-int-l { +- rockchip,pins = +- <1 21 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- +- vsel1_gpio: vsel1-gpio { +- rockchip,pins = +- <1 17 RK_FUNC_GPIO &pcfg_pull_down>; +- }; +- +- vsel2_gpio: vsel2-gpio { +- rockchip,pins = +- <1 14 RK_FUNC_GPIO &pcfg_pull_down>; +- }; +- }; +- + usb2 { + host_vbus_drv: host-vbus-drv { + rockchip,pins = +@@ -473,37 +103,6 @@ + }; + }; + +-&pwm2 { +- status = "okay"; +-}; +- +-&pwm3 { +- status = "okay"; +-}; +- +-&sdhci { +- bus-width = <8>; +- mmc-hs400-1_8v; +- mmc-hs400-enhanced-strobe; +- non-removable; +- status = "okay"; +-}; +- +-&sdmmc { +- bus-width = <4>; +- cap-mmc-highspeed; +- cap-sd-highspeed; +- clock-frequency = <100000000>; +- clock-freq-min-max = <100000 100000000>; +- disable-wp; +- sd-uhs-sdr104; +- vqmmc-supply = <&vcc_sd>; +- card-detect-delay = <800>; +- pinctrl-names = "default"; +- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; +- status = "okay"; +-}; +- + &tcphy0 { + status = "okay"; + }; +@@ -538,16 +137,6 @@ + status = "okay"; + }; + +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_xfer &uart0_cts>; +- status = "okay"; +-}; +- +-&uart2 { +- status = "okay"; +-}; +- + &usb_host0_ehci { + status = "okay"; + }; +@@ -581,19 +170,3 @@ + status = "okay"; + dr_mode = "host"; + }; +- +-&vopb { +- status = "okay"; +-}; +- +-&vopb_mmu { +- status = "okay"; +-}; +- +-&vopl { +- status = "okay"; +-}; +- +-&vopl_mmu { +- status = "okay"; +-}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +new file mode 100644 +index 000000000000..5a5d8e28ef55 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +@@ -0,0 +1,439 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2018 Collabora Ltd. ++ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2018 Linaro Ltd. ++ */ ++ ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ vcc1v8_s0: vcc1v8-s0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_s0"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ ++ vcc_sys: vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 0>; ++ regulator-name = "vdd_log"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ }; ++ ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_cec>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-rising-time-ns = <168>; ++ i2c-scl-falling-time-ns = <4>; ++ status = "okay"; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ status = "okay"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_gpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-ramp-delay = <1000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc_sys>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sys>; ++ vcc10-supply = <&vcc_sys>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vddio-supply = <&vcc_1v8>; ++ ++ regulators { ++ vdd_center: DCDC_REG1 { ++ regulator-name = "vdd_center"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-name = "vdd_cpu_l"; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG4 { ++ regulator-name = "vcc_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc1v8_dvp: LDO_REG1 { ++ regulator-name = "vcc1v8_dvp"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_hdmi: LDO_REG2 { ++ regulator-name = "vcca1v8_hdmi"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG3 { ++ regulator-name = "vcca_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sd: LDO_REG4 { ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc3v0_sd: LDO_REG5 { ++ regulator-name = "vcc3v0_sd"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-name = "vcc_1v5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca0v9_hdmi: LDO_REG7 { ++ regulator-name = "vcca0v9_hdmi"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-name = "vcc_3v0"; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-name = "vcc3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; ++}; ++ ++&io_domains { ++ bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ ++ audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ ++ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ ++ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ sdmmc { ++ sdmmc_bus1: sdmmc-bus1 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = ++ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, ++ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = ++ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = ++ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 21 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = ++ <1 17 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = ++ <1 14 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&pwm3 { ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ clock-frequency = <100000000>; ++ clock-freq-min-max = <100000 100000000>; ++ disable-wp; ++ sd-uhs-sdr104; ++ vqmmc-supply = <&vcc_sd>; ++ card-detect-delay = <800>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; +-- +2.19.0.rc1 + +From afb33f3ec13b5ca3d7f2acd0a03dd707cba90638 Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Date: Mon, 10 Sep 2018 20:43:54 +0530 +Subject: [PATCH 2/4] dt-bindings: arm: rockchip: Add binding for Rock960 board + +Add devicetree binding for Rock960 board from Vamrs Limited. + +Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +--- + Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt +index d46c5d43e27f..4ed03f7e8eb2 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.txt ++++ b/Documentation/devicetree/bindings/arm/rockchip.txt +@@ -5,6 +5,10 @@ Rockchip platforms device tree bindings + Required root node properties: + - compatible = "vamrs,ficus", "rockchip,rk3399"; + ++- 96boards RK3399 Rock960 (ROCK960 Consumer Edition) ++ Required root node properties: ++ - compatible = "vamrs,rk3399-rock960", "rockchip,rk3399"; ++ + - Amarula Vyasa RK3288 board + Required root node properties: + - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; +-- +2.19.0.rc1 + +From d7c58c9061b4aee405e328d1c8a60850605aac94 Mon Sep 17 00:00:00 2001 +From: Peter Robinson <pbrobinson@gmail.com> +Date: Mon, 10 Sep 2018 18:26:45 +0100 +Subject: [PATCH 3/4] arm64: boot: dts: rockchip: Add support for Rock960 board + +Add devicetree support for Rock960 board, one of the Consumer Edition +boards of the 96Boards family. This board support utilizes the common +Rock960 family board support that includes Ficus 96Board. + +Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Signed-off-by: Peter Robinson <pbrobinson@gmail.com> +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3399-rock960.dts | 139 ++++++++++++++++++ + 2 files changed, 140 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dts + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 2811fb701f12..458cce9e1a05 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -13,5 +13,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +new file mode 100644 +index 000000000000..281f3d79b38e +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +@@ -0,0 +1,139 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2018 Linaro Ltd. ++ */ ++ ++/dts-v1/; ++#include "rk3399-rock960.dtsi" ++ ++/ { ++ model = "96boards Rock960"; ++ compatible = "vamrs,rk3399-rock960", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_drv>; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&host_vbus_drv>; ++ regulator-name = "vcc5v0_host"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ vin-supply = <&vcc_sys>; ++ }; ++}; ++ ++&pinctrl { ++ pcie { ++ pcie_drv: pcie-drv { ++ rockchip,pins = ++ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb2 { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = ++ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ status = "okay"; ++}; ++ ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ dr_mode = "otg"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ status = "okay"; ++ dr_mode = "host"; ++}; +-- +2.19.0.rc1 + +From defb2d89461057066a7d233a3072010da24d774c Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Date: Mon, 10 Sep 2018 20:43:56 +0530 +Subject: [PATCH 4/4] arm64: dts: rockchip: Enable SD card detection for + Rock960 boards + +For proper working of SD cards, let's add the Card Detect GPIO property +to the common devicetree for Rock960 family boards. + +Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +--- + arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +index 5a5d8e28ef55..f68254831ad9 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +@@ -403,6 +403,7 @@ + cap-sd-highspeed; + clock-frequency = <100000000>; + clock-freq-min-max = <100000 100000000>; ++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; +-- +2.19.0.rc1 + diff --git a/arm64-drm-msm-fix-missing-CTL-flush.patch b/arm64-drm-msm-fix-missing-CTL-flush.patch new file mode 100644 index 000000000..607102077 --- /dev/null +++ b/arm64-drm-msm-fix-missing-CTL-flush.patch @@ -0,0 +1,42 @@ +From 6e8bed6a3e2fd6f1e82ea9b1f705bbc82060a2b7 Mon Sep 17 00:00:00 2001 +From: Rob Clark <robdclark@gmail.com> +Date: Tue, 3 Jul 2018 08:14:32 -0400 +Subject: [PATCH] drm/msm/mdp5: fix missing CTL flush + +f9cb8d8d836e fixed various race conditions with CTL flush, in particular +flushing and sending the START signal before encoder state was updated. +But it did this a little too well in some cases that don't trigger +encoder->enable(), and CTL[n].FLUSH would never be set. When page flips +happen it would paper over the bug, since the first plag flip would +flush out the state to the hardware. + +The issue could be reproduced with, for example, modetest (without the +'-v' argument). + +Fixes: f9cb8d8d836e drm/msm/mdp5: rework CTL START signal handling +Signed-off-by: Rob Clark <robdclark@gmail.com> +Reviewed-by: Sean Paul <seanpaul@chromium.org> + +diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c +index 9af94e35f678..fcd44d1d1068 100644 +--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c ++++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c +@@ -319,7 +319,17 @@ static int mdp5_encoder_atomic_check(struct drm_encoder *encoder, + + mdp5_cstate->ctl = ctl; + mdp5_cstate->pipeline.intf = intf; +- mdp5_cstate->defer_start = true; ++ ++ /* ++ * This is a bit awkward, but we want to flush the CTL and hit the ++ * START bit at most once for an atomic update. In the non-full- ++ * modeset case, this is done from crtc->atomic_flush(), but that ++ * is too early in the case of full modeset, in which case we ++ * defer to encoder->enable(). But we need to *know* whether ++ * encoder->enable() will be called to do this: ++ */ ++ if (drm_atomic_crtc_needs_modeset(crtc_state)) ++ mdp5_cstate->defer_start = true; + + return 0; + } diff --git a/configs/fedora/generic/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/CONFIG_BACKLIGHT_PWM index e867170c2..44737e214 100644 --- a/configs/fedora/generic/CONFIG_BACKLIGHT_PWM +++ b/configs/fedora/generic/CONFIG_BACKLIGHT_PWM @@ -1 +1 @@ -# CONFIG_BACKLIGHT_PWM is not set +CONFIG_BACKLIGHT_PWM=m diff --git a/configs/fedora/generic/CONFIG_RANDOM_TRUST_CPU b/configs/fedora/generic/CONFIG_RANDOM_TRUST_CPU new file mode 100644 index 000000000..f79be1a54 --- /dev/null +++ b/configs/fedora/generic/CONFIG_RANDOM_TRUST_CPU @@ -0,0 +1 @@ +CONFIG_RANDOM_TRUST_CPU=y diff --git a/configs/fedora/generic/arm/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/arm/CONFIG_BACKLIGHT_PWM deleted file mode 100644 index 44737e214..000000000 --- a/configs/fedora/generic/arm/CONFIG_BACKLIGHT_PWM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BACKLIGHT_PWM=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_BATTERY_SBS b/configs/fedora/generic/arm/CONFIG_BATTERY_SBS index b364b07f0..b364b07f0 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_BATTERY_SBS +++ b/configs/fedora/generic/arm/CONFIG_BATTERY_SBS diff --git a/configs/fedora/generic/arm/armv7/CONFIG_CHARGER_BQ24735 b/configs/fedora/generic/arm/CONFIG_CHARGER_BQ24735 index 658d71eb4..658d71eb4 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_CHARGER_BQ24735 +++ b/configs/fedora/generic/arm/CONFIG_CHARGER_BQ24735 diff --git a/configs/fedora/generic/arm/armv7/CONFIG_MFD_AS3722 b/configs/fedora/generic/arm/CONFIG_MFD_AS3722 index 6aa06bd4b..6aa06bd4b 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_MFD_AS3722 +++ b/configs/fedora/generic/arm/CONFIG_MFD_AS3722 diff --git a/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 b/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 new file mode 100644 index 000000000..399c5bf8e --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_PINCTRL_AS3722 @@ -0,0 +1 @@ +CONFIG_PINCTRL_AS3722=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_POWER_RESET_AS3722 b/configs/fedora/generic/arm/CONFIG_POWER_RESET_AS3722 index d73cd6d68..d73cd6d68 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_POWER_RESET_AS3722 +++ b/configs/fedora/generic/arm/CONFIG_POWER_RESET_AS3722 diff --git a/configs/fedora/generic/arm/armv7/CONFIG_REGULATOR_AS3722 b/configs/fedora/generic/arm/CONFIG_REGULATOR_AS3722 index 8eececb2a..8eececb2a 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_REGULATOR_AS3722 +++ b/configs/fedora/generic/arm/CONFIG_REGULATOR_AS3722 diff --git a/configs/fedora/generic/arm/CONFIG_RTC_DRV_AS3722 b/configs/fedora/generic/arm/CONFIG_RTC_DRV_AS3722 new file mode 100644 index 000000000..2430f5b3b --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_RTC_DRV_AS3722 @@ -0,0 +1 @@ +CONFIG_RTC_DRV_AS3722=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_TCG_TIS_I2C_INFINEON b/configs/fedora/generic/arm/CONFIG_TCG_TIS_I2C_INFINEON index c4409f95b..c4409f95b 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_TCG_TIS_I2C_INFINEON +++ b/configs/fedora/generic/arm/CONFIG_TCG_TIS_I2C_INFINEON diff --git a/configs/fedora/generic/arm/armv7/CONFIG_PINCTRL_AS3722 b/configs/fedora/generic/arm/armv7/CONFIG_PINCTRL_AS3722 deleted file mode 100644 index c620f49f9..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_PINCTRL_AS3722 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PINCTRL_AS3722=y diff --git a/configs/fedora/generic/arm/armv7/CONFIG_RTC_DRV_AS3722 b/configs/fedora/generic/arm/armv7/CONFIG_RTC_DRV_AS3722 deleted file mode 100644 index 2b582bcab..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_RTC_DRV_AS3722 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RTC_DRV_AS3722=y diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_MACH_OMAP_LDP b/configs/fedora/generic/arm/armv7/armv7/CONFIG_MACH_OMAP_LDP deleted file mode 100644 index e35637633..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_MACH_OMAP_LDP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MACH_OMAP_LDP is not set diff --git a/configs/fedora/generic/powerpc/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/powerpc/CONFIG_BACKLIGHT_PWM deleted file mode 100644 index 44737e214..000000000 --- a/configs/fedora/generic/powerpc/CONFIG_BACKLIGHT_PWM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BACKLIGHT_PWM=m diff --git a/configs/fedora/generic/s390x/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/s390x/CONFIG_BACKLIGHT_PWM new file mode 100644 index 000000000..e867170c2 --- /dev/null +++ b/configs/fedora/generic/s390x/CONFIG_BACKLIGHT_PWM @@ -0,0 +1 @@ +# CONFIG_BACKLIGHT_PWM is not set diff --git a/configs/fedora/generic/s390x/CONFIG_EXPOLINE_AUTO b/configs/fedora/generic/s390x/CONFIG_EXPOLINE_AUTO new file mode 100644 index 000000000..465c4673e --- /dev/null +++ b/configs/fedora/generic/s390x/CONFIG_EXPOLINE_AUTO @@ -0,0 +1 @@ +CONFIG_EXPOLINE_AUTO=y diff --git a/configs/fedora/generic/s390x/CONFIG_EXPOLINE_FULL b/configs/fedora/generic/s390x/CONFIG_EXPOLINE_FULL new file mode 100644 index 000000000..b6ea26036 --- /dev/null +++ b/configs/fedora/generic/s390x/CONFIG_EXPOLINE_FULL @@ -0,0 +1 @@ +# CONFIG_EXPOLINE_FULL is not set diff --git a/configs/fedora/generic/s390x/CONFIG_EXPOLINE_MEDIUM b/configs/fedora/generic/s390x/CONFIG_EXPOLINE_MEDIUM deleted file mode 100644 index 82c8370c3..000000000 --- a/configs/fedora/generic/s390x/CONFIG_EXPOLINE_MEDIUM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EXPOLINE_MEDIUM=y diff --git a/configs/fedora/generic/s390x/CONFIG_KERNEL_NOBP b/configs/fedora/generic/s390x/CONFIG_KERNEL_NOBP index b3c291602..dd71bbe4a 100644 --- a/configs/fedora/generic/s390x/CONFIG_KERNEL_NOBP +++ b/configs/fedora/generic/s390x/CONFIG_KERNEL_NOBP @@ -1 +1 @@ -CONFIG_KERNEL_NOBP=y +# CONFIG_KERNEL_NOBP is not set diff --git a/configs/fedora/generic/x86/i686/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/x86/i686/CONFIG_BACKLIGHT_PWM deleted file mode 100644 index 44737e214..000000000 --- a/configs/fedora/generic/x86/i686/CONFIG_BACKLIGHT_PWM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BACKLIGHT_PWM=m diff --git a/configs/fedora/generic/x86/i686PAE/CONFIG_BACKLIGHT_PWM b/configs/fedora/generic/x86/i686PAE/CONFIG_BACKLIGHT_PWM deleted file mode 100644 index 44737e214..000000000 --- a/configs/fedora/generic/x86/i686PAE/CONFIG_BACKLIGHT_PWM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BACKLIGHT_PWM=m diff --git a/efi-x86-call-parse-options-from-efi-main.patch b/efi-x86-call-parse-options-from-efi-main.patch new file mode 100644 index 000000000..44fb01d00 --- /dev/null +++ b/efi-x86-call-parse-options-from-efi-main.patch @@ -0,0 +1,58 @@ +From 5f5251591ad0e9ae2e446eca48e27ac251c0d14b Mon Sep 17 00:00:00 2001 +From: Hans de Goede <hdegoede@redhat.com> +Date: Wed, 12 Sep 2018 20:32:05 +0200 +Subject: [PATCH] efi/x86: Call efi_parse_options() from efi_main() + +Before this commit we were only calling efi_parse_options() from +make_boot_params(), but make_boot_params() only gets called if the +kernel gets booted directly as an EFI executable. So when booted through +e.g. grub we ended up not parsing the commandline in the boot code. + +This makes the drivers/firmware/efi/libstub code ignore the "quiet" +commandline argument resulting in the following message being printed: +"EFI stub: UEFI Secure Boot is enabled." + +Despite the quiet request. This commits adds an extra call to +efi_parse_options() to efi_main() to make sure that the options are +always processed. This fixes quiet not working. + +This also fixes the libstub code ignoring nokaslr and efi=nochunk. + +Reported-by: Peter Robinson <pbrobinson@redhat.com> +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +--- + arch/x86/boot/compressed/eboot.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c +index e98522e..8aa6f96 100644 +--- a/arch/x86/boot/compressed/eboot.c ++++ b/arch/x86/boot/compressed/eboot.c +@@ -918,6 +918,7 @@ struct boot_params *efi_main(struct efi_config *c, + struct desc_struct *desc; + void *handle; + efi_system_table_t *_table; ++ unsigned long cmdline_paddr; + bool is64; + + efi_early = c; +@@ -937,6 +938,15 @@ struct boot_params *efi_main(struct efi_config *c, + else + setup_boot_services32(efi_early); + ++ /* ++ * make_boot_params() may have been called before efi_main(), in which ++ * case this is the second time we parse the cmdline. This is ok, ++ * parsing the cmdline multiple times does not have side-effects. ++ */ ++ cmdline_paddr = ((u64)hdr->cmd_line_ptr | ++ ((u64)boot_params->ext_cmd_line_ptr << 32)); ++ efi_parse_options((char *)cmdline_paddr); ++ + /* + * If the boot loader gave us a value for secure_boot then we use that, + * otherwise we ask the BIOS. +-- +2.19.0.rc1 + diff --git a/gpio-pxa-handle-corner-case-of-unprobed-device.patch b/gpio-pxa-handle-corner-case-of-unprobed-device.patch new file mode 100644 index 000000000..f42af913d --- /dev/null +++ b/gpio-pxa-handle-corner-case-of-unprobed-device.patch @@ -0,0 +1,56 @@ +From patchwork Sat Aug 25 08:44:17 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: gpio: pxa: handle corner case of unprobed device +X-Patchwork-Submitter: Robert Jarzmik <robert.jarzmik@free.fr> +X-Patchwork-Id: 962145 +Message-Id: <20180825084417.13526-1-robert.jarzmik@free.fr> +To: Robert Jarzmik <robert.jarzmik@free.fr>, + Linus Walleij <linus.walleij@linaro.org> +Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org +Date: Sat, 25 Aug 2018 10:44:17 +0200 +From: Robert Jarzmik <robert.jarzmik@free.fr> +List-Id: <linux-gpio.vger.kernel.org> + +In the corner case where the gpio driver probe fails, for whatever +reason, the suspend and resume handlers will still be called as they +have to be registered as syscore operations. This applies as well when +no probe was called while the driver has been built in the kernel. + +Nicolas tracked this in : +https://bugzilla.kernel.org/show_bug.cgi?id=200905 + +Therefore, add a failsafe in these function, and test if a proper probe +succeeded and the driver is functional. + +Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> +Reported-by: Nicolas Chauvet <kwizart@gmail.com> +--- + drivers/gpio/gpio-pxa.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c +index c18712dabf93..bfe4c5c9f41c 100644 +--- a/drivers/gpio/gpio-pxa.c ++++ b/drivers/gpio/gpio-pxa.c +@@ -776,6 +776,9 @@ static int pxa_gpio_suspend(void) + struct pxa_gpio_bank *c; + int gpio; + ++ if (!pchip) ++ return 0; ++ + for_each_gpio_bank(gpio, c, pchip) { + c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); + c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); +@@ -794,6 +797,9 @@ static void pxa_gpio_resume(void) + struct pxa_gpio_bank *c; + int gpio; + ++ if (!pchip) ++ return; ++ + for_each_gpio_bank(gpio, c, pchip) { + /* restore level with set/clear */ + writel_relaxed(c->saved_gplr, c->regbase + GPSR_OFFSET); diff --git a/kernel-aarch64-debug.config b/kernel-aarch64-debug.config index e541e683f..ff9de9e20 100644 --- a/kernel-aarch64-debug.config +++ b/kernel-aarch64-debug.config @@ -528,7 +528,7 @@ CONFIG_BATTERY_AXP20X=m # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_BATTERY_MAX1721X is not set -# CONFIG_BATTERY_SBS is not set +CONFIG_BATTERY_SBS=m CONFIG_BAYCOM_EPP=m CONFIG_BAYCOM_PAR=m CONFIG_BAYCOM_SER_FDX=m @@ -875,7 +875,7 @@ CONFIG_CHARGER_AXP20X=m # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set +CONFIG_CHARGER_BQ24735=m # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_GPIO is not set @@ -3222,7 +3222,7 @@ CONFIG_MFD_AC100=m # CONFIG_MFD_ARIZONA is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set +CONFIG_MFD_AS3722=y # CONFIG_MFD_ASIC3 is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set # CONFIG_MFD_ATMEL_HLCDC is not set @@ -4384,6 +4384,7 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_AMD=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4459,6 +4460,7 @@ CONFIG_POSIX_MQUEUE=y # CONFIG_POWER9_CPU is not set CONFIG_POWER_AVS=y CONFIG_POWERCAP=y +CONFIG_POWER_RESET_AS3722=y # CONFIG_POWER_RESET_BRCMKONA is not set # CONFIG_POWER_RESET_BRCMSTB is not set CONFIG_POWER_RESET_GPIO_RESTART=y @@ -4653,6 +4655,7 @@ CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -4703,6 +4706,7 @@ CONFIG_REGMAP=y CONFIG_REGULATOR_ACT8865=m # CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_AS3722=m CONFIG_REGULATOR_AXP20X=m CONFIG_REGULATOR_BD9571MWV=m # CONFIG_REGULATOR_DA9210 is not set @@ -4852,6 +4856,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y @@ -5993,7 +5998,7 @@ CONFIG_TCG_CRB=y # CONFIG_TCG_INFINEON is not set CONFIG_TCG_NSC=m CONFIG_TCG_TIS_I2C_ATMEL=m -# CONFIG_TCG_TIS_I2C_INFINEON is not set +CONFIG_TCG_TIS_I2C_INFINEON=m # CONFIG_TCG_TIS_I2C_NUVOTON is not set # CONFIG_TCG_TIS_SPI is not set # CONFIG_TCG_TIS_ST33ZP24_I2C is not set diff --git a/kernel-aarch64.config b/kernel-aarch64.config index b9f5a5b13..214a09ad1 100644 --- a/kernel-aarch64.config +++ b/kernel-aarch64.config @@ -528,7 +528,7 @@ CONFIG_BATTERY_AXP20X=m # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_BATTERY_MAX1721X is not set -# CONFIG_BATTERY_SBS is not set +CONFIG_BATTERY_SBS=m CONFIG_BAYCOM_EPP=m CONFIG_BAYCOM_PAR=m CONFIG_BAYCOM_SER_FDX=m @@ -875,7 +875,7 @@ CONFIG_CHARGER_AXP20X=m # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set +CONFIG_CHARGER_BQ24735=m # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_GPIO is not set @@ -3201,7 +3201,7 @@ CONFIG_MFD_AC100=m # CONFIG_MFD_ARIZONA is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set +CONFIG_MFD_AS3722=y # CONFIG_MFD_ASIC3 is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set # CONFIG_MFD_ATMEL_HLCDC is not set @@ -4362,6 +4362,7 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_AMD=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4437,6 +4438,7 @@ CONFIG_POSIX_MQUEUE=y # CONFIG_POWER9_CPU is not set CONFIG_POWER_AVS=y CONFIG_POWERCAP=y +CONFIG_POWER_RESET_AS3722=y # CONFIG_POWER_RESET_BRCMKONA is not set # CONFIG_POWER_RESET_BRCMSTB is not set CONFIG_POWER_RESET_GPIO_RESTART=y @@ -4630,6 +4632,7 @@ CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -4680,6 +4683,7 @@ CONFIG_REGMAP=y CONFIG_REGULATOR_ACT8865=m # CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_AS3722=m CONFIG_REGULATOR_AXP20X=m CONFIG_REGULATOR_BD9571MWV=m # CONFIG_REGULATOR_DA9210 is not set @@ -4829,6 +4833,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y @@ -5969,7 +5974,7 @@ CONFIG_TCG_CRB=y # CONFIG_TCG_INFINEON is not set CONFIG_TCG_NSC=m CONFIG_TCG_TIS_I2C_ATMEL=m -# CONFIG_TCG_TIS_I2C_INFINEON is not set +CONFIG_TCG_TIS_I2C_INFINEON=m # CONFIG_TCG_TIS_I2C_NUVOTON is not set # CONFIG_TCG_TIS_SPI is not set # CONFIG_TCG_TIS_ST33ZP24_I2C is not set diff --git a/kernel-armv7hl-debug.config b/kernel-armv7hl-debug.config index a9c6b6a84..ceacc3558 100644 --- a/kernel-armv7hl-debug.config +++ b/kernel-armv7hl-debug.config @@ -3243,7 +3243,6 @@ CONFIG_MACH_MESON8B=y CONFIG_MACH_MMP2_DT=y # CONFIG_MACH_OMAP3517EVM is not set # CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP_LDP is not set CONFIG_MACH_SUN4I=y CONFIG_MACH_SUN5I=y CONFIG_MACH_SUN6I=y @@ -4646,7 +4645,7 @@ CONFIG_PINCTRL_APQ8064=m CONFIG_PINCTRL_APQ8084=m CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4928,6 +4927,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -5150,7 +5150,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m -CONFIG_RTC_DRV_AS3722=y +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y diff --git a/kernel-armv7hl-lpae-debug.config b/kernel-armv7hl-lpae-debug.config index 93264c3c1..7548e14be 100644 --- a/kernel-armv7hl-lpae-debug.config +++ b/kernel-armv7hl-lpae-debug.config @@ -4413,7 +4413,7 @@ CONFIG_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4652,6 +4652,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -4855,7 +4856,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m -CONFIG_RTC_DRV_AS3722=y +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y diff --git a/kernel-armv7hl-lpae.config b/kernel-armv7hl-lpae.config index 4d60ac8d3..be8a63cd2 100644 --- a/kernel-armv7hl-lpae.config +++ b/kernel-armv7hl-lpae.config @@ -4391,7 +4391,7 @@ CONFIG_PINCONF=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4629,6 +4629,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -4832,7 +4833,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m -CONFIG_RTC_DRV_AS3722=y +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y diff --git a/kernel-armv7hl.config b/kernel-armv7hl.config index d6decdcd0..7fac1e75d 100644 --- a/kernel-armv7hl.config +++ b/kernel-armv7hl.config @@ -3223,7 +3223,6 @@ CONFIG_MACH_MESON8B=y CONFIG_MACH_MMP2_DT=y # CONFIG_MACH_OMAP3517EVM is not set # CONFIG_MACH_OMAP3_PANDORA is not set -# CONFIG_MACH_OMAP_LDP is not set CONFIG_MACH_SUN4I=y CONFIG_MACH_SUN5I=y CONFIG_MACH_SUN6I=y @@ -4624,7 +4623,7 @@ CONFIG_PINCTRL_APQ8064=m CONFIG_PINCTRL_APQ8084=m CONFIG_PINCTRL_ARMADA_370=y CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_AS3722=m CONFIG_PINCTRL_AXP209=m # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_BROXTON is not set @@ -4905,6 +4904,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y @@ -5127,7 +5127,7 @@ CONFIG_RTC_DRV_88PM80X=m CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_AC100=m CONFIG_RTC_DRV_ARMADA38X=m -CONFIG_RTC_DRV_AS3722=y +CONFIG_RTC_DRV_AS3722=m CONFIG_RTC_DRV_BQ32K=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_CMOS=y diff --git a/kernel-i686-PAE.config b/kernel-i686-PAE.config index 4df33ecab..8bb52324b 100644 --- a/kernel-i686-PAE.config +++ b/kernel-i686-PAE.config @@ -4381,6 +4381,7 @@ CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-i686-PAEdebug.config b/kernel-i686-PAEdebug.config index eeebe7911..c4f37cf4b 100644 --- a/kernel-i686-PAEdebug.config +++ b/kernel-i686-PAEdebug.config @@ -4405,6 +4405,7 @@ CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-i686-debug.config b/kernel-i686-debug.config index 485f38cc8..15de8dae9 100644 --- a/kernel-i686-debug.config +++ b/kernel-i686-debug.config @@ -4405,6 +4405,7 @@ CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-i686.config b/kernel-i686.config index 355359352..e3008bd4a 100644 --- a/kernel-i686.config +++ b/kernel-i686.config @@ -4381,6 +4381,7 @@ CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-ppc64le-debug.config b/kernel-ppc64le-debug.config index 183eba1da..f738a60ea 100644 --- a/kernel-ppc64le-debug.config +++ b/kernel-ppc64le-debug.config @@ -4148,6 +4148,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-ppc64le.config b/kernel-ppc64le.config index b48434f3e..3ca9d47fb 100644 --- a/kernel-ppc64le.config +++ b/kernel-ppc64le.config @@ -4122,6 +4122,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-s390x-debug.config b/kernel-s390x-debug.config index 1a2147560..d0c414b44 100644 --- a/kernel-s390x-debug.config +++ b/kernel-s390x-debug.config @@ -1357,9 +1357,8 @@ CONFIG_ETHERNET=y # CONFIG_EXOFS_DEBUG is not set # CONFIG_EXOFS_FS is not set # CONFIG_EXPERT is not set -# CONFIG_EXPOLINE_AUTO is not set -CONFIG_EXPOLINE_FULL=y -CONFIG_EXPOLINE_MEDIUM=y +CONFIG_EXPOLINE_AUTO=y +# CONFIG_EXPOLINE_FULL is not set # CONFIG_EXPOLINE_OFF is not set CONFIG_EXPOLINE=y CONFIG_EXPORTFS=y @@ -2445,7 +2444,7 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_LZO is not set -CONFIG_KERNEL_NOBP=y +# CONFIG_KERNEL_NOBP is not set # CONFIG_KERNEL_XZ is not set CONFIG_KEXEC_FILE=y CONFIG_KEXEC=y @@ -4040,6 +4039,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set CONFIG_RAW_DRIVER=y diff --git a/kernel-s390x.config b/kernel-s390x.config index 697f5d9cd..559002a51 100644 --- a/kernel-s390x.config +++ b/kernel-s390x.config @@ -1344,9 +1344,8 @@ CONFIG_ETHERNET=y # CONFIG_EXOFS_DEBUG is not set # CONFIG_EXOFS_FS is not set # CONFIG_EXPERT is not set -# CONFIG_EXPOLINE_AUTO is not set -CONFIG_EXPOLINE_FULL=y -CONFIG_EXPOLINE_MEDIUM=y +CONFIG_EXPOLINE_AUTO=y +# CONFIG_EXPOLINE_FULL is not set # CONFIG_EXPOLINE_OFF is not set CONFIG_EXPOLINE=y CONFIG_EXPORTFS=y @@ -2422,7 +2421,7 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_LZO is not set -CONFIG_KERNEL_NOBP=y +# CONFIG_KERNEL_NOBP is not set # CONFIG_KERNEL_XZ is not set CONFIG_KEXEC_FILE=y CONFIG_KEXEC=y @@ -4014,6 +4013,7 @@ CONFIG_RADIO_WL1273=m CONFIG_RADIO_ZOLTRIX=m CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set +CONFIG_RANDOM_TRUST_CPU=y CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set CONFIG_RAW_DRIVER=y diff --git a/kernel-x86_64-debug.config b/kernel-x86_64-debug.config index fe46a50ae..0147e251a 100644 --- a/kernel-x86_64-debug.config +++ b/kernel-x86_64-debug.config @@ -411,7 +411,7 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LP855X=m # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_PM8941_WLED is not set -# CONFIG_BACKLIGHT_PWM is not set +CONFIG_BACKLIGHT_PWM=m # CONFIG_BACKLIGHT_SAHARA is not set CONFIG_BACKLIGHT_WM831X=m # CONFIG_BACKTRACE_SELF_TEST is not set @@ -4449,6 +4449,7 @@ CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MEMORY=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel-x86_64.config b/kernel-x86_64.config index a33ff6b59..f875d10fe 100644 --- a/kernel-x86_64.config +++ b/kernel-x86_64.config @@ -408,7 +408,7 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LP855X=m # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_PM8941_WLED is not set -# CONFIG_BACKLIGHT_PWM is not set +CONFIG_BACKLIGHT_PWM=m # CONFIG_BACKLIGHT_SAHARA is not set CONFIG_BACKLIGHT_WM831X=m # CONFIG_BACKTRACE_SELF_TEST is not set @@ -4425,6 +4425,7 @@ CONFIG_RAID_ATTRS=m # CONFIG_RANDOM32_SELFTEST is not set CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MEMORY=y +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RAPIDIO is not set CONFIG_RAS_CEC=y # CONFIG_RAVE_SP_CORE is not set diff --git a/kernel.spec b/kernel.spec index f09cb5e69..e39f2f4a5 100644 --- a/kernel.spec +++ b/kernel.spec @@ -58,7 +58,7 @@ Summary: The Linux kernel %define stable_rc 0 # Do we have a -stable update to apply? -%define stable_update 7 +%define stable_update 8 # Set rpm version accordingly %if 0%{?stable_update} %define stablerev %{stable_update} @@ -578,6 +578,10 @@ Patch211: drm-i915-hush-check-crtc-state.patch Patch212: efi-secureboot.patch Patch213: lockdown-fix-coordination-of-kernel-module-signature-verification.patch +# Fix printing of "EFI stub: UEFI Secure Boot is enabled.", +# queued upstream in efi.git/next +Patch214: efi-x86-call-parse-options-from-efi-main.patch + # 300 - ARM patches Patch300: arm64-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch @@ -614,6 +618,13 @@ Patch312: usb-dwc2-Turn-on-uframe-sched-everywhere.patch Patch313: arm64-dts-marvell-a3700-reserve-ATF-memory.patch +Patch315: arm64-96boards-RK3399-Ficus-board.patch +Patch316: arm64-96boards-Rock960-CE-board-support.patch + +Patch317: arm64-drm-msm-fix-missing-CTL-flush.patch + +Patch318: gpio-pxa-handle-corner-case-of-unprobed-device.patch + # Enabling Patches for the RPi3+ Patch330: bcm2837-enable-pmu.patch @@ -639,9 +650,6 @@ Patch501: Fix-for-module-sig-verification.patch # rhbz 1431375 Patch502: input-rmi4-remove-the-need-for-artifical-IRQ.patch -# rhbz 1470995 -Patch504: kexec-bzimage-verify-pe-signature-fix.patch - # Support for unique build ids # All queued in the kbuild tree Patch506: 0001-kbuild-Add-build-salt-to-the-kernel-and-modules.patch @@ -670,6 +678,16 @@ Patch530: 0010-fbcon-Do-not-takeover-the-console-from-atomic-contex.patch # CVE-2018-15471 rhbz 1610555 1618414 Patch531: xsa270.patch +# rhbz 1627963 1628715 +Patch532: HID-fixes.patch + +# rhbz 1572944 +Patch533: 0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch +Patch534: 0001-random-make-CPU-trust-a-boot-parameter.patch + +# Additional Fixes for CVE-2018-5391 +# Patch535: CVE-2018-5391-additional.patch + # END OF PATCH DEFINITIONS %endif @@ -1932,6 +1950,27 @@ fi # # %changelog +* Sun Sep 16 2018 Laura Abbott <labbott@redhat.com> - 4.18.8-300 +- Linux v4.18.8 + +* Fri Sep 14 2018 Justin M. Forbes <jforbes@fedoraproject.org> +- Additional Fixes for CVE-2018-5391 (rhbz 1616059) + +* Thu Sep 13 2018 Laura Abbott <labbott@redhat.com> +- Use the CPU RNG for entropy (rhbz 1572944) + +* Thu Sep 13 2018 Laura Abbott <labbott@redhat.com> +- HID fixes (rhbz 1627963 1628715) + +* Thu Sep 13 2018 Hans de Goede <hdegoede@redhat.com> +- Add patch silencing "EFI stub: UEFI Secure Boot is enabled." at boot + +* Mon Sep 10 2018 Peter Robinson <pbrobinson@fedoraproject.org> +- Add 96boards rk3399 Ficus and Rock960 support + +* Mon Sep 10 2018 Laura Abbott <labbott@redhat.com> - 4.18.7-300 +- Linux v4.18.7 + * Wed Sep 05 2018 Laura Abbott <labbott@redhat.com> - 4.18.6-300 - Linux v4.18.6 diff --git a/kexec-bzimage-verify-pe-signature-fix.patch b/kexec-bzimage-verify-pe-signature-fix.patch deleted file mode 100644 index 6c8a51b95..000000000 --- a/kexec-bzimage-verify-pe-signature-fix.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: Dave Young <dyoung@redhat.com> - -Fix kexec_file_load pefile signature verification - -Similar with Fix-for-module-sig-verification.patch, kexec_file syscall also -need pass 1UL to verify_pefile_signature so that secondary keys can be used. - -Fedora bug -https://bugzilla.redhat.com/show_bug.cgi?id=1470995 - -Latest upstream effort is below: -https://www.spinics.net/lists/kernel/msg2825184.html - -Ideally this need an upstream fix, but since nobody response we can workaround -it like the module code did. - -Signed-off-by: Dave Young <dyoung@redhat.com> ---- - arch/x86/kernel/kexec-bzimage64.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- linux-x86.orig/arch/x86/kernel/kexec-bzimage64.c -+++ linux-x86/arch/x86/kernel/kexec-bzimage64.c -@@ -533,7 +533,7 @@ static int bzImage64_cleanup(void *loade - static int bzImage64_verify_sig(const char *kernel, unsigned long kernel_len) - { - return verify_pefile_signature(kernel, kernel_len, -- NULL, -+ (void *)1UL, - VERIFYING_KEXEC_PE_SIGNATURE); - } - #endif --- -2.17.0 @@ -1,2 +1,2 @@ SHA512 (linux-4.18.tar.xz) = 950eb85ac743b291afe9f21cd174d823e25f11883ee62cecfbfff8fe8c5672aae707654b1b8f29a133b1f2e3529e63b9f7fba4c45d6dacccc8000b3a9a9ae038 -SHA512 (patch-4.18.7.xz) = 483ce39833de636cc8ba52908db14819fcd61bf3a3bfe6409dc858bd5a563de24beade909fb71c3a529a5761f638398bc30fdf2796220ae3da78e3e2a363fdb7 +SHA512 (patch-4.18.8.xz) = df8e7d24714012fcc6a0532bfd92c2d3ed7651910a5fe7b136bfac0394414690c7617d4e7114113d539fbe53d3375f55840af652f739eb685577458f766d5c03 |