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authorPeter Robinson <pbrobinson@gmail.com>2018-09-27 11:28:10 +0100
committerPeter Robinson <pbrobinson@gmail.com>2018-09-27 11:28:10 +0100
commitbe97548395eaae679fd6992b6f5092a9fb5d954c (patch)
tree860948fc229fb1605d384d59af463ef412babbfa
parent49bf49c457f4216a8df24634689bb3e4dea46879 (diff)
downloadkernel-be97548395eaae679fd6992b6f5092a9fb5d954c.tar.gz
kernel-be97548395eaae679fd6992b6f5092a9fb5d954c.tar.xz
kernel-be97548395eaae679fd6992b6f5092a9fb5d954c.zip
Add initial RockPro64 DT support
-rw-r--r--arm64-rockchip-add-initial-Rockpro64.patch862
-rw-r--r--kernel.spec4
2 files changed, 865 insertions, 1 deletions
diff --git a/arm64-rockchip-add-initial-Rockpro64.patch b/arm64-rockchip-add-initial-Rockpro64.patch
new file mode 100644
index 000000000..5ccb2e955
--- /dev/null
+++ b/arm64-rockchip-add-initial-Rockpro64.patch
@@ -0,0 +1,862 @@
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+From: Akash Gajjar <Akash_Gajjar@mentor.com>
+To: <heiko@sntech.de>
+Subject: [PATCH v3] arm64: dts: rockchip: add initial dts support for
+ Rockpro64
+Date: Wed, 26 Sep 2018 11:54:57 +0530
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+
+Rockpro64 is a rockchip RK3399 based board from pine64.org.
+This patch adds basic device node support for Rockpro64 board and make it able
+to bring up.
+
+Peripheral Works
+- Sdcard
+- USB 2.0, 3.0
+- Leds
+- Ethernet
+- Debug console
+
+Not working:
+- USB Type-C
+
+Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com>
+Acked-by: Deepak Das <Deepak_Das@mentor.com>
+---
+changes for v2
+- Added support for usb 2.0, 3.0
+- Added fusb302 node and its regulator support
+- Cleanup pinctrl node
+- Remove backlight, pcie, sound codec node inherited from firefly-rk3399 dts
+changes for v3
+- Added copyright properly
+- Typo correction in commit message
+
+ Documentation/devicetree/bindings/arm/rockchip.txt | 4 +
+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
+ arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts | 692 +++++++++++++++++++++
+ 3 files changed, 697 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
+
+diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
+index acfd3c7..ac95183 100644
+--- a/Documentation/devicetree/bindings/arm/rockchip.txt
++++ b/Documentation/devicetree/bindings/arm/rockchip.txt
+@@ -160,6 +160,10 @@ Rockchip platforms device tree bindings
+ Required root node properties:
+ - compatible = "pine64,rock64", "rockchip,rk3328";
+
++- Pine64 RockPro64 board:
++ Required root node properties:
++ - compatible = "pine64,rockpro64", "rockchip,rk3399";
++
+ - Rockchip PX3 Evaluation board:
+ Required root node properties:
+ - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index b0092d9..03d523a 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -15,5 +15,6 @@
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
+new file mode 100644
+index 0000000..1d35f54
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
+@@ -0,0 +1,692 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
++ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
++ */
++
++/dts-v1/;
++#include <dt-bindings/input/linux-event-codes.h>
++#include <dt-bindings/pwm/pwm.h>
++#include "rk3399.dtsi"
++#include "rk3399-opp.dtsi"
++
++/ {
++ model = "Pine64 RockPro64";
++ compatible = "pine64,rockpro64", "rockchip,rk3399";
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ clkin_gmac: external-gmac-clock {
++ compatible = "fixed-clock";
++ clock-frequency = <125000000>;
++ clock-output-names = "clkin_gmac";
++ #clock-cells = <0>;
++ };
++
++ dc_12v: dc-12v {
++ compatible = "regulator-fixed";
++ regulator-name = "dc_12v";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <12000000>;
++ regulator-max-microvolt = <12000000>;
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++ autorepeat;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwrbtn>;
++
++ power {
++ debounce-interval = <100>;
++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
++ label = "GPIO Key Power";
++ linux,code = <KEY_POWER>;
++ wakeup-source;
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
++
++ work-led {
++ label = "work";
++ default-state = "on";
++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
++ };
++
++ diy-led {
++ label = "diy";
++ default-state = "off";
++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
++ };
++ };
++
++ sdio_pwrseq: sdio-pwrseq {
++ compatible = "mmc-pwrseq-simple";
++ clocks = <&rk808 1>;
++ clock-names = "ext_clock";
++ pinctrl-names = "default";
++ pinctrl-0 = <&wifi_enable_h>;
++
++ /*
++ * On the module itself this is one of these (depending
++ * on the actual card populated):
++ * - SDIO_RESET_L_WL_REG_ON
++ * - PDN (power down when low)
++ */
++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
++ };
++
++ /* switched by pmic_sleep */
++ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc1v8_s3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ vin-supply = <&vcc_1v8>;
++ };
++
++ vcc3v3_pcie: vcc3v3-pcie-regulator {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie_pwr_en>;
++ regulator-name = "vcc3v3_pcie";
++ regulator-always-on;
++ regulator-boot-on;
++ vin-supply = <&dc_12v>;
++ };
++
++ vcc3v3_sys: vcc3v3-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc_sys>;
++ };
++
++ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
++ vcc5v0_host: vcc5v0-host-regulator {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vcc5v0_host_en>;
++ regulator-name = "vcc5v0_host";
++ regulator-always-on;
++ vin-supply = <&vcc_sys>;
++ };
++
++ vcc5v0_typec: vcc5v0-typec-regulator {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vcc5v0_typec_en>;
++ regulator-name = "vcc5v0_typec";
++ regulator-always-on;
++ vin-supply = <&vcc_sys>;
++ };
++
++ vcc_sys: vcc-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&dc_12v>;
++ };
++
++ vdd_log: vdd-log {
++ compatible = "pwm-regulator";
++ pwms = <&pwm2 0 25000 1>;
++ regulator-name = "vdd_log";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1400000>;
++ vin-supply = <&vcc_sys>;
++ };
++};
++
++&cpu_l0 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l1 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l2 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_l3 {
++ cpu-supply = <&vdd_cpu_l>;
++};
++
++&cpu_b0 {
++ cpu-supply = <&vdd_cpu_b>;
++};
++
++&cpu_b1 {
++ cpu-supply = <&vdd_cpu_b>;
++};
++
++&emmc_phy {
++ status = "okay";
++};
++
++&gmac {
++ assigned-clocks = <&cru SCLK_RMII_SRC>;
++ assigned-clock-parents = <&clkin_gmac>;
++ clock_in_out = "input";
++ phy-supply = <&vcc_lan>;
++ phy-mode = "rgmii";
++ pinctrl-names = "default";
++ pinctrl-0 = <&rgmii_pins>;
++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
++ snps,reset-active-low;
++ snps,reset-delays-us = <0 10000 50000>;
++ tx_delay = <0x28>;
++ rx_delay = <0x11>;
++ status = "okay";
++};
++
++&i2c0 {
++ clock-frequency = <400000>;
++ i2c-scl-rising-time-ns = <168>;
++ i2c-scl-falling-time-ns = <4>;
++ status = "okay";
++
++ rk808: pmic@1b {
++ compatible = "rockchip,rk808";
++ reg = <0x1b>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++ #clock-cells = <1>;
++ clock-output-names = "xin32k", "rk808-clkout2";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pmic_int_l>;
++ rockchip,system-power-controller;
++ wakeup-source;
++
++ vcc1-supply = <&vcc_sys>;
++ vcc2-supply = <&vcc_sys>;
++ vcc3-supply = <&vcc_sys>;
++ vcc4-supply = <&vcc_sys>;
++ vcc6-supply = <&vcc_sys>;
++ vcc7-supply = <&vcc_sys>;
++ vcc8-supply = <&vcc3v3_sys>;
++ vcc9-supply = <&vcc_sys>;
++ vcc10-supply = <&vcc_sys>;
++ vcc11-supply = <&vcc_sys>;
++ vcc12-supply = <&vcc3v3_sys>;
++ vddio-supply = <&vcc1v8_pmu>;
++
++ regulators {
++ vdd_center: DCDC_REG1 {
++ regulator-name = "vdd_center";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <1350000>;
++ regulator-ramp-delay = <6001>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_cpu_l: DCDC_REG2 {
++ regulator-name = "vdd_cpu_l";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <1350000>;
++ regulator-ramp-delay = <6001>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_ddr: DCDC_REG3 {
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_1v8: DCDC_REG4 {
++ regulator-name = "vcc_1v8";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vcc1v8_dvp: LDO_REG1 {
++ regulator-name = "vcc1v8_dvp";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc2v8_dvp: LDO_REG2 {
++ regulator-name = "vcc2v8_dvp";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <2800000>;
++ regulator-max-microvolt = <2800000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc1v8_pmu: LDO_REG3 {
++ regulator-name = "vcc1v8_pmu";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vcc_sdio: LDO_REG4 {
++ regulator-name = "vcc_sdio";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3000000>;
++ };
++ };
++
++ vcca3v0_codec: LDO_REG5 {
++ regulator-name = "vcca3v0_codec";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_1v5: LDO_REG6 {
++ regulator-name = "vcc_1v5";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1500000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1500000>;
++ };
++ };
++
++ vcca1v8_codec: LDO_REG7 {
++ regulator-name = "vcca1v8_codec";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_3v0: LDO_REG8 {
++ regulator-name = "vcc_3v0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3000000>;
++ };
++ };
++
++ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
++ regulator-name = "vcc3v3_s3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc3v3_s0: SWITCH_REG2 {
++ regulator-name = "vcc3v3_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++ };
++ };
++
++ vdd_cpu_b: regulator@40 {
++ compatible = "silergy,syr827";
++ reg = <0x40>;
++ fcs,suspend-voltage-selector = <0>;
++ regulator-name = "vdd_cpu_b";
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1500000>;
++ regulator-ramp-delay = <1000>;
++ regulator-always-on;
++ regulator-boot-on;
++ vin-supply = <&vcc_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_gpu: regulator@41 {
++ compatible = "silergy,syr828";
++ reg = <0x41>;
++ fcs,suspend-voltage-selector = <1>;
++ regulator-name = "vdd_gpu";
++ regulator-min-microvolt = <712500>;
++ regulator-max-microvolt = <1500000>;
++ regulator-ramp-delay = <1000>;
++ regulator-always-on;
++ regulator-boot-on;
++ vin-supply = <&vcc_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++};
++
++&i2c1 {
++ i2c-scl-rising-time-ns = <300>;
++ i2c-scl-falling-time-ns = <15>;
++ status = "okay";
++};
++
++&i2c3 {
++ i2c-scl-rising-time-ns = <450>;
++ i2c-scl-falling-time-ns = <15>;
++ status = "okay";
++};
++
++&i2c4 {
++ i2c-scl-rising-time-ns = <600>;
++ i2c-scl-falling-time-ns = <20>;
++ status = "okay";
++
++ fusb0: typec-portc@22 {
++ compatible = "fcs,fusb302";
++ reg = <0x22>;
++ interrupt-parent = <&gpio1>;
++ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&fusb0_int>;
++ vbus-supply = <&vcc5v0_typec>;
++ status = "okay";
++ };
++};
++
++&i2s0 {
++ rockchip,playback-channels = <8>;
++ rockchip,capture-channels = <8>;
++ status = "okay";
++};
++
++&i2s1 {
++ rockchip,playback-channels = <2>;
++ rockchip,capture-channels = <2>;
++ status = "okay";
++};
++
++&i2s2 {
++ status = "okay";
++};
++
++&io_domains {
++ status = "okay";
++
++ bt656-supply = <&vcc1v8_dvp>;
++ audio-supply = <&vcca1v8_codec>;
++ sdmmc-supply = <&vcc_sdio>;
++ gpio1830-supply = <&vcc_3v0>;
++};
++
++&pmu_io_domains {
++ pmu1830-supply = <&vcc_3v0>;
++ status = "okay";
++};
++
++&pinctrl {
++ buttons {
++ pwrbtn: pwrbtn {
++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ fusb302x {
++ fusb0_int: fusb0-int {
++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ leds {
++ work_led_gpio: work_led-gpio {
++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ diy_led_gpio: diy_led-gpio {
++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ lcd-panel {
++ lcd_panel_reset: lcd-panel-reset {
++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ pcie {
++ pcie_pwr_en: pcie-pwr-en {
++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pmic {
++ pmic_int_l: pmic-int-l {
++ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++
++ vsel1_gpio: vsel1-gpio {
++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++
++ vsel2_gpio: vsel2-gpio {
++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++ };
++
++ sdio-pwrseq {
++ wifi_enable_h: wifi-enable-h {
++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ usb-typec {
++ vcc5v0_typec_en: vcc5v0_typec_en {
++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ usb2 {
++ vcc5v0_host_en: vcc5v0-host-en {
++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&pwm0 {
++ status = "okay";
++};
++
++&pwm2 {
++ status = "okay";
++};
++
++&saradc {
++ vref-supply = <&vcca1v8_s3>;
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-mmc-highspeed;
++ cap-sd-highspeed;
++ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
++ disable-wp;
++ max-frequency = <150000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ mmc-hs400-1_8v;
++ mmc-hs400-enhanced-strobe;
++ non-removable;
++ status = "okay";
++};
++
++&tcphy0 {
++ status = "okay";
++};
++
++&tcphy1 {
++ status = "okay";
++};
++
++&tsadc {
++ /* tshut mode 0:CRU 1:GPIO */
++ rockchip,hw-tshut-mode = <1>;
++ /* tshut polarity 0:LOW 1:HIGH */
++ rockchip,hw-tshut-polarity = <1>;
++ status = "okay";
++};
++
++&u2phy0 {
++ status = "okay";
++
++ u2phy0_otg: otg-port {
++ status = "okay";
++ };
++
++ u2phy0_host: host-port {
++ phy-supply = <&vcc5v0_host>;
++ status = "okay";
++ };
++};
++
++&u2phy1 {
++ status = "okay";
++
++ u2phy1_otg: otg-port {
++ status = "okay";
++ };
++
++ u2phy1_host: host-port {
++ phy-supply = <&vcc5v0_host>;
++ status = "okay";
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_xfer &uart0_cts>;
++ status = "okay";
++};
++
++&uart2 {
++ status = "okay";
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
++
++&usb_host1_ehci {
++ status = "okay";
++};
++
++&usb_host1_ohci {
++ status = "okay";
++};
++
++&usbdrd3_0 {
++ status = "okay";
++};
++
++&usbdrd_dwc3_0 {
++ status = "okay";
++ dr_mode = "otg";
++};
++
++&usbdrd3_1 {
++ status = "okay";
++};
++
++&usbdrd_dwc3_1 {
++ status = "okay";
++ dr_mode = "host";
++};
++
++&vopb {
++ status = "okay";
++};
++
++&vopb_mmu {
++ status = "okay";
++};
++
++&vopl {
++ status = "okay";
++};
++
++&vopl_mmu {
++ status = "okay";
++};
diff --git a/kernel.spec b/kernel.spec
index 02849d271..0ac510c18 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -587,8 +587,9 @@ Patch306: arm-sdhci-esdhc-imx-fixes.patch
Patch307: arm64-ZynqMP-firmware-clock-drivers-core.patch
Patch308: arm64-96boards-Rock960-CE-board-support.patch
+Patch309: arm64-rockchip-add-initial-Rockpro64.patch
-Patch309: gpio-pxa-handle-corner-case-of-unprobed-device.patch
+Patch310: gpio-pxa-handle-corner-case-of-unprobed-device.patch
Patch330: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch
@@ -1878,6 +1879,7 @@ fi
%changelog
* Wed Sep 26 2018 Peter Robinson <pbrobinson@fedoraproject.org>
- Add thermal trip to bcm283x (Raspberry Pi) cpufreq
+- Add initial RockPro64 DT support
* Wed Sep 26 2018 Jeremy Cline <jcline@redhat.com> - 4.19.0-0.rc5.git2.1
- Linux v4.19-rc5-143-gc307aaf3eb47