Merge remote-tracking branch 'origin/f24' into f24-user-thl-vanilla-fedorakernel-4.8.6-200.vanilla.knurd.1.fc24

5 files changed, 242 insertions, 306 deletions

diff --git a/ARM-OMAP4-Fix-crashes.patch b/ARM-OMAP4-Fix-crashes.patch
new file mode 100644
index 000000000..57e56e507
--- /dev/null
+++ b/ARM-OMAP4-Fix-crashes.patch
@@ -0,0 +1,97 @@
+From patchwork Wed Oct 26 15:17:01 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [3/5] ARM: OMAP4+: Fix bad fallthrough for cpuidle
+From: Tony Lindgren <tony@atomide.com>
+X-Patchwork-Id: 9397501
+Message-Id: <20161026151703.24730-4-tony@atomide.com>
+To: linux-omap@vger.kernel.org
+Cc: Nishanth Menon <nm@ti.com>, Dmitry Lifshitz <lifshitz@compulab.co.il>,
+ Dave Gerlach <d-gerlach@ti.com>,
+ Enric Balletbo Serra <eballetbo@gmail.com>, 
+ "Dr . H . Nikolaus Schaller" <hns@goldelico.com>,
+ Pau Pajuel <ppajuel@gmail.com>, Grazvydas Ignotas <notasas@gmail.com>,
+ Benoit Cousson <bcousson@baylibre.com>,
+ Santosh Shilimkar <ssantosh@kernel.org>,
+ Javier Martinez Canillas <javier@dowhile0.org>,
+ Robert Nelson <robertcnelson@gmail.com>,
+ Marek Belisko <marek@goldelico.com>, linux-arm-kernel@lists.infradead.org
+Date: Wed, 26 Oct 2016 08:17:01 -0700
+
+We don't want to fall through to a bunch of errors for retention
+if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC.
+
+Fixes: 6099dd37c669 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend")
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+---
+ arch/arm/mach-omap2/omap-mpuss-lowpower.c | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
++++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+@@ -244,10 +244,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
+ 		save_state = 1;
+ 		break;
+ 	case PWRDM_POWER_RET:
+-		if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) {
++		if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
+ 			save_state = 0;
+-			break;
+-		}
++		break;
+ 	default:
+ 		/*
+ 		 * CPUx CSWR is invalid hardware state. Also CPUx OSWR
+From 5a78ff7bf7e25191144b550961001bbf6c734da4 Mon Sep 17 00:00:00 2001
+From: Peter Chen <peter.chen@nxp.com>
+Date: Thu, 11 Aug 2016 17:44:54 +0800
+Subject: [PATCH 04152/16809] Revert "gpu: drm: omapdrm: dss-of: add missing
+ of_node_put after calling of_parse_phandle"
+
+This reverts
+commit 2ab9f5879162499e1c4e48613287e3f59e593c4f
+Author: Peter Chen <peter.chen@nxp.com>
+Date:   Fri Jul 15 11:17:03 2016 +0800
+    gpu: drm: omapdrm: dss-of: add missing of_node_put after calling of_parse_phandle
+
+The of_get_next_parent will drop refcount on the passed node, so the reverted
+patch is wrong, thanks for Tomi Valkeinen points it.
+
+Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Signed-off-by: Peter Chen <peter.chen@nxp.com>
+Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+Signed-off-by: Sean Paul <seanpaul@chromium.org>
+Link: http://patchwork.freedesktop.org/patch/msgid/1470908694-16362-1-git-send-email-peter.chen@nxp.com
+---
+ drivers/gpu/drm/omapdrm/dss/dss-of.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/omapdrm/dss/dss-of.c b/drivers/gpu/drm/omapdrm/dss/dss-of.c
+index e256d87..dfd4e96 100644
+--- a/drivers/gpu/drm/omapdrm/dss/dss-of.c
++++ b/drivers/gpu/drm/omapdrm/dss/dss-of.c
+@@ -125,16 +125,15 @@ u32 dss_of_port_get_port_number(struct device_node *port)
+ 
+ static struct device_node *omapdss_of_get_remote_port(const struct device_node *node)
+ {
+-	struct device_node *np, *np_parent;
++	struct device_node *np;
+ 
+ 	np = of_parse_phandle(node, "remote-endpoint", 0);
+ 	if (!np)
+ 		return NULL;
+ 
+-	np_parent = of_get_next_parent(np);
+-	of_node_put(np);
++	np = of_get_next_parent(np);
+ 
+-	return np_parent;
++	return np;
+ }
+ 
+ struct device_node *
+-- 
+2.9.3
+
diff --git a/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch b/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
new file mode 100644
index 000000000..b55dec0cb
--- /dev/null
+++ b/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
@@ -0,0 +1,100 @@
+From bb3e08008c0e48fd4f51a0f0957eecae61a24d69 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Tue, 1 Nov 2016 09:35:30 +0000
+Subject: [PATCH] Revert "mmc: omap_hsmmc: Use dma_request_chan() for
+ requesting DMA channel"
+
+This reverts commit 81eef6ca92014845d40e3f1310e42b7010303acc.
+---
+ drivers/mmc/host/omap_hsmmc.c | 50 ++++++++++++++++++++++++++++++++++---------
+ 1 file changed, 40 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
+index 24ebc9a..3563321 100644
+--- a/drivers/mmc/host/omap_hsmmc.c
++++ b/drivers/mmc/host/omap_hsmmc.c
+@@ -32,6 +32,7 @@
+ #include <linux/of_irq.h>
+ #include <linux/of_gpio.h>
+ #include <linux/of_device.h>
++#include <linux/omap-dmaengine.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/core.h>
+ #include <linux/mmc/mmc.h>
+@@ -1992,6 +1993,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
+ 	struct resource *res;
+ 	int ret, irq;
+ 	const struct of_device_id *match;
++	dma_cap_mask_t mask;
++	unsigned tx_req, rx_req;
+ 	const struct omap_mmc_of_data *data;
+ 	void __iomem *base;
+ 
+@@ -2121,17 +2124,44 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
+ 
+ 	omap_hsmmc_conf_bus_power(host);
+ 
+-	host->rx_chan = dma_request_chan(&pdev->dev, "rx");
+-	if (IS_ERR(host->rx_chan)) {
+-		dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n");
+-		ret = PTR_ERR(host->rx_chan);
++	if (!pdev->dev.of_node) {
++		res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
++		if (!res) {
++			dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
++			ret = -ENXIO;
++			goto err_irq;
++		}
++		tx_req = res->start;
++
++		res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
++		if (!res) {
++			dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
++			ret = -ENXIO;
++			goto err_irq;
++		}
++		rx_req = res->start;
++	}
++
++	dma_cap_zero(mask);
++	dma_cap_set(DMA_SLAVE, mask);
++
++	host->rx_chan =
++		dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
++						 &rx_req, &pdev->dev, "rx");
++
++	if (!host->rx_chan) {
++		dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel\n");
++		ret = -ENXIO;
+ 		goto err_irq;
+ 	}
+ 
+-	host->tx_chan = dma_request_chan(&pdev->dev, "tx");
+-	if (IS_ERR(host->tx_chan)) {
+-		dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n");
+-		ret = PTR_ERR(host->tx_chan);
++	host->tx_chan =
++		dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
++						 &tx_req, &pdev->dev, "tx");
++
++	if (!host->tx_chan) {
++		dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel\n");
++		ret = -ENXIO;
+ 		goto err_irq;
+ 	}
+ 
+@@ -2189,9 +2219,9 @@ err_slot_name:
+ 	mmc_remove_host(mmc);
+ err_irq:
+ 	device_init_wakeup(&pdev->dev, false);
+-	if (!IS_ERR_OR_NULL(host->tx_chan))
++	if (host->tx_chan)
+ 		dma_release_channel(host->tx_chan);
+-	if (!IS_ERR_OR_NULL(host->rx_chan))
++	if (host->rx_chan)
+ 		dma_release_channel(host->rx_chan);
+ 	pm_runtime_dont_use_autosuspend(host->dev);
+ 	pm_runtime_put_sync(host->dev);
+-- 
+2.9.3
+
diff --git a/bcm283x-vc4-fixes.patch b/bcm283x-vc4-fixes.patch
index afde6e2f2..3f77b7485 100644
--- a/bcm283x-vc4-fixes.patch
+++ b/bcm283x-vc4-fixes.patch
@@ -133,237 +133,6 @@ index 160942a..9ecd6ff 100644
 -- 
 2.9.3
 
-From 107d3188b3723840deddaa5efeffcaf167e462f2 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 28 Sep 2016 08:42:42 -0700
-Subject: [PATCH 3/4] drm/vc4: Fix races when the CS reads from render targets.
-
-With the introduction of bin/render pipelining, the previous job may
-not be completed when we start binning the next one.  If the previous
-job wrote our VBO, IB, or CS textures, then the binning stage might
-get stale or uninitialized results.
-
-Fixes the major rendering failure in glmark2 -b terrain.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
-Cc: stable@vger.kernel.org
----
- drivers/gpu/drm/vc4/vc4_drv.h       | 19 ++++++++++++++++++-
- drivers/gpu/drm/vc4/vc4_gem.c       | 13 +++++++++++++
- drivers/gpu/drm/vc4/vc4_render_cl.c | 21 +++++++++++++++++----
- drivers/gpu/drm/vc4/vc4_validate.c  | 17 ++++++++++++++---
- 4 files changed, 62 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
-index 428e249..f696b75 100644
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -122,9 +122,16 @@ to_vc4_dev(struct drm_device *dev)
- struct vc4_bo {
- 	struct drm_gem_cma_object base;
- 
--	/* seqno of the last job to render to this BO. */
-+	/* seqno of the last job to render using this BO. */
- 	uint64_t seqno;
- 
-+	/* seqno of the last job to use the RCL to write to this BO.
-+	 *
-+	 * Note that this doesn't include binner overflow memory
-+	 * writes.
-+	 */
-+	uint64_t write_seqno;
-+
- 	/* List entry for the BO's position in either
- 	 * vc4_exec_info->unref_list or vc4_dev->bo_cache.time_list
- 	 */
-@@ -216,6 +223,9 @@ struct vc4_exec_info {
- 	/* Sequence number for this bin/render job. */
- 	uint64_t seqno;
- 
-+	/* Latest write_seqno of any BO that binning depends on. */
-+	uint64_t bin_dep_seqno;
-+
- 	/* Last current addresses the hardware was processing when the
- 	 * hangcheck timer checked on us.
- 	 */
-@@ -230,6 +240,13 @@ struct vc4_exec_info {
- 	struct drm_gem_cma_object **bo;
- 	uint32_t bo_count;
- 
-+	/* List of BOs that are being written by the RCL.  Other than
-+	 * the binner temporary storage, this is all the BOs written
-+	 * by the job.
-+	 */
-+	struct drm_gem_cma_object *rcl_write_bo[4];
-+	uint32_t rcl_write_bo_count;
-+
- 	/* Pointers for our position in vc4->job_list */
- 	struct list_head head;
- 
-diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
-index b262c5c..ae1609e 100644
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -471,6 +471,11 @@ vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t seqno)
- 	list_for_each_entry(bo, &exec->unref_list, unref_head) {
- 		bo->seqno = seqno;
- 	}
-+
-+	for (i = 0; i < exec->rcl_write_bo_count; i++) {
-+		bo = to_vc4_bo(&exec->rcl_write_bo[i]->base);
-+		bo->write_seqno = seqno;
-+	}
- }
- 
- /* Queues a struct vc4_exec_info for execution.  If no job is
-@@ -673,6 +678,14 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec)
- 		goto fail;
- 
- 	ret = vc4_validate_shader_recs(dev, exec);
-+	if (ret)
-+		goto fail;
-+
-+	/* Block waiting on any previous rendering into the CS's VBO,
-+	 * IB, or textures, so that pixels are actually written by the
-+	 * time we try to read them.
-+	 */
-+	ret = vc4_wait_for_seqno(dev, exec->bin_dep_seqno, ~0ull, true);
- 
- fail:
- 	drm_free_large(temp);
-diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c
-index 0f12418..08886a3 100644
---- a/drivers/gpu/drm/vc4/vc4_render_cl.c
-+++ b/drivers/gpu/drm/vc4/vc4_render_cl.c
-@@ -45,6 +45,8 @@ struct vc4_rcl_setup {
- 
- 	struct drm_gem_cma_object *rcl;
- 	u32 next_offset;
-+
-+	u32 next_write_bo_index;
- };
- 
- static inline void rcl_u8(struct vc4_rcl_setup *setup, u8 val)
-@@ -407,6 +409,8 @@ static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec,
- 	if (!*obj)
- 		return -EINVAL;
- 
-+	exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
-+
- 	if (surf->offset & 0xf) {
- 		DRM_ERROR("MSAA write must be 16b aligned.\n");
- 		return -EINVAL;
-@@ -417,7 +421,8 @@ static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec,
- 
- static int vc4_rcl_surface_setup(struct vc4_exec_info *exec,
- 				 struct drm_gem_cma_object **obj,
--				 struct drm_vc4_submit_rcl_surface *surf)
-+				 struct drm_vc4_submit_rcl_surface *surf,
-+				 bool is_write)
- {
- 	uint8_t tiling = VC4_GET_FIELD(surf->bits,
- 				       VC4_LOADSTORE_TILE_BUFFER_TILING);
-@@ -440,6 +445,9 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec,
- 	if (!*obj)
- 		return -EINVAL;
- 
-+	if (is_write)
-+		exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
-+
- 	if (surf->flags & VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) {
- 		if (surf == &exec->args->zs_write) {
- 			DRM_ERROR("general zs write may not be a full-res.\n");
-@@ -542,6 +550,8 @@ vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec,
- 	if (!*obj)
- 		return -EINVAL;
- 
-+	exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
-+
- 	if (tiling > VC4_TILING_FORMAT_LT) {
- 		DRM_ERROR("Bad tiling format\n");
- 		return -EINVAL;
-@@ -599,15 +609,18 @@ int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec)
- 	if (ret)
- 		return ret;
- 
--	ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read);
-+	ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read,
-+				    false);
- 	if (ret)
- 		return ret;
- 
--	ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read);
-+	ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read,
-+				    false);
- 	if (ret)
- 		return ret;
- 
--	ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write);
-+	ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write,
-+				    true);
- 	if (ret)
- 		return ret;
- 
-diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c
-index 9ce1d0a..26503e3 100644
---- a/drivers/gpu/drm/vc4/vc4_validate.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate.c
-@@ -267,6 +267,9 @@ validate_indexed_prim_list(VALIDATE_ARGS)
- 	if (!ib)
- 		return -EINVAL;
- 
-+	exec->bin_dep_seqno = max(exec->bin_dep_seqno,
-+				  to_vc4_bo(&ib->base)->write_seqno);
-+
- 	if (offset > ib->base.size ||
- 	    (ib->base.size - offset) / index_size < length) {
- 		DRM_ERROR("IB access overflow (%d + %d*%d > %zd)\n",
-@@ -555,8 +558,7 @@ static bool
- reloc_tex(struct vc4_exec_info *exec,
- 	  void *uniform_data_u,
- 	  struct vc4_texture_sample_info *sample,
--	  uint32_t texture_handle_index)
--
-+	  uint32_t texture_handle_index, bool is_cs)
- {
- 	struct drm_gem_cma_object *tex;
- 	uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]);
-@@ -714,6 +716,11 @@ reloc_tex(struct vc4_exec_info *exec,
- 
- 	*validated_p0 = tex->paddr + p0;
- 
-+	if (is_cs) {
-+		exec->bin_dep_seqno = max(exec->bin_dep_seqno,
-+					  to_vc4_bo(&tex->base)->write_seqno);
-+	}
-+
- 	return true;
-  fail:
- 	DRM_INFO("Texture p0 at %d: 0x%08x\n", sample->p_offset[0], p0);
-@@ -835,7 +842,8 @@ validate_gl_shader_rec(struct drm_device *dev,
- 			if (!reloc_tex(exec,
- 				       uniform_data_u,
- 				       &validated_shader->texture_samples[tex],
--				       texture_handles_u[tex])) {
-+				       texture_handles_u[tex],
-+				       i == 2)) {
- 				return -EINVAL;
- 			}
- 		}
-@@ -867,6 +875,9 @@ validate_gl_shader_rec(struct drm_device *dev,
- 		uint32_t stride = *(uint8_t *)(pkt_u + o + 5);
- 		uint32_t max_index;
- 
-+		exec->bin_dep_seqno = max(exec->bin_dep_seqno,
-+					  to_vc4_bo(&vbo->base)->write_seqno);
-+
- 		if (state->addr & 0x8)
- 			stride |= (*(uint32_t *)(pkt_u + 100 + i * 4)) & ~0xff;
- 
--- 
-2.9.3
-
 From f379f5432e4b74e3d1d894ce2fefbe1b8a3c24fd Mon Sep 17 00:00:00 2001
 From: Eric Anholt <eric@anholt.net>
 Date: Wed, 28 Sep 2016 19:20:44 -0700
@@ -868,80 +637,46 @@ index 400615b..c6420b3 100644
 -- 
 cgit v0.12
 
-From 67615c588a059b731df9d019edc3c561d8006ec9 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 1 Jun 2016 12:05:36 -0700
-Subject: clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent
-
-If the firmware had set up a clock to source from PLLC, go along with
-it.  But if we're looking for a new parent, we don't want to switch it
-to PLLC because the firmware will force PLLC (and thus the AXI bus
-clock) to different frequencies during over-temp/under-voltage,
-without notification to Linux.
+From 30772942cc1095c3129eecfa182e2c568e566b9d Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 13 Oct 2016 11:54:31 +0300
+Subject: [PATCH] drm/vc4: Fix a couple error codes in vc4_cl_lookup_bos()
 
-On my system, this moves the Linux-enabled HDMI state machine and DSI1
-escape clock over to plld_per from pllc_per.  EMMC still ends up on
-pllc_per, because the firmware had set it up to use that.
+If the allocation fails the current code returns success.  If
+copy_from_user() fails it returns the number of bytes remaining instead
+of -EFAULT.
 
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
-Acked-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
 ---
- drivers/clk/bcm/clk-bcm2835.c | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
+ drivers/gpu/drm/vc4/vc4_gem.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
 
-diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
-index c6420b3..e8a9646a 100644
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1009,16 +1009,28 @@ static int bcm2835_clock_set_rate(struct clk_hw *hw,
- 	return 0;
- }
+diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
+index ae1609e..4050540 100644
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -548,14 +548,15 @@ vc4_cl_lookup_bos(struct drm_device *dev,
  
-+static bool
-+bcm2835_clk_is_pllc(struct clk_hw *hw)
-+{
-+	if (!hw)
-+		return false;
-+
-+	return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0;
-+}
-+
- static int bcm2835_clock_determine_rate(struct clk_hw *hw,
- 					struct clk_rate_request *req)
- {
- 	struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- 	struct clk_hw *parent, *best_parent = NULL;
-+	bool current_parent_is_pllc;
- 	unsigned long rate, best_rate = 0;
- 	unsigned long prate, best_prate = 0;
- 	size_t i;
- 	u32 div;
- 
-+	current_parent_is_pllc = bcm2835_clk_is_pllc(clk_hw_get_parent(hw));
-+
- 	/*
- 	 * Select parent clock that results in the closest but lower rate
- 	 */
-@@ -1026,6 +1038,17 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
- 		parent = clk_hw_get_parent_by_index(hw, i);
- 		if (!parent)
- 			continue;
-+
-+		/*
-+		 * Don't choose a PLLC-derived clock as our parent
-+		 * unless it had been manually set that way.  PLLC's
-+		 * frequency gets adjusted by the firmware due to
-+		 * over-temp or under-voltage conditions, without
-+		 * prior notification to our clock consumer.
-+		 */
-+		if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc)
-+			continue;
-+
- 		prate = clk_hw_get_rate(parent);
- 		div = bcm2835_clock_choose_div(hw, req->rate, prate, true);
- 		rate = bcm2835_clock_rate_from_divisor(clock, prate, div);
+ 	handles = drm_malloc_ab(exec->bo_count, sizeof(uint32_t));
+ 	if (!handles) {
++		ret = -ENOMEM;
+ 		DRM_ERROR("Failed to allocate incoming GEM handles\n");
+ 		goto fail;
+ 	}
+ 
+-	ret = copy_from_user(handles,
+-			     (void __user *)(uintptr_t)args->bo_handles,
+-			     exec->bo_count * sizeof(uint32_t));
+-	if (ret) {
++	if (copy_from_user(handles,
++			   (void __user *)(uintptr_t)args->bo_handles,
++			   exec->bo_count * sizeof(uint32_t))) {
++		ret = -EFAULT;
+ 		DRM_ERROR("Failed to copy in GEM handles\n");
+ 		goto fail;
+ 	}
 -- 
-cgit v0.12
+2.9.3
 
diff --git a/kernel.spec b/kernel.spec
index bfcfd8ec8..35f7781de 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -59,7 +59,7 @@ Summary: The Linux kernel
 
 
 # Do we have a -stable update to apply?
-%define stable_update 5
+%define stable_update 6
 # Set rpm version accordingly
 %if 0%{?stable_update}
 %define stablerev %{stable_update}
@@ -531,6 +531,9 @@ Patch425: arm64-pcie-quirks.patch
 # http://www.spinics.net/lists/linux-tegra/msg26029.html
 Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
 
+Patch427: ARM-OMAP4-Fix-crashes.patch
+Patch428: arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
+
 # http://patchwork.ozlabs.org/patch/587554/
 Patch430: ARM-tegra-usb-no-reset.patch
 
@@ -644,9 +647,6 @@ Patch849: 0001-iio-Use-event-header-from-kernel-tree.patch
 # CVE-2016-9083 CVE-2016-9084 rhbz 1389258 1389259 1389285
 Patch850: v3-vfio-pci-Fix-integer-overflows-bitmask-check.patch
 
-# Skylake i915 fixes from 4.9
-Patch851: drm_i915_skl_Backport_watermark_fixes_for_4.8.y.patch
-
 #rhbz 1325354
 Patch852: 0001-HID-input-ignore-System-Control-application-usages-i.patch
 
@@ -2180,6 +2180,10 @@ fi
 #
 # 
 %changelog
+* Tue Nov  1 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Linux v4.8.6
+- Fixes for omap4 (panda board)
+
 * Fri Oct 28 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.8.5-200
 - Linux v4.8.5
 
diff --git a/sources b/sources
index bfe1e002b..07d525ab6 100644
--- a/sources
+++ b/sources
@@ -1,3 +1,3 @@
 c1af0afbd3df35c1ccdc7a5118cd2d07  linux-4.8.tar.xz
 0dad03f586e835d538d3e0d2cbdb9a28  perf-man-4.8.tar.gz
-3b00c3fcfbe05e3cb7702e8db6fee28b  patch-4.8.5.xz
+666753363fd69ac2c1a94f4349a7197e  patch-4.8.6.xz