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authorThorsten Leemhuis <fedora@leemhuis.info>2018-01-11 07:52:27 +0100
committerThorsten Leemhuis <fedora@leemhuis.info>2018-01-11 07:52:27 +0100
commit7abee4b73ea0503a72855d67c97ed33149dbdc1e (patch)
treeaf7cf24a2dd91b156fbe7163c0aed2505d41e349
parentcc53fe7d4f11a98ada113163f905957c0666d763 (diff)
parentd496f759f1fe1234d0ba3e125e69f5547a26dbc5 (diff)
downloadkernel-4.15.0-0.rc7.git2.1.vanilla.knurd.1.fc27.tar.gz
kernel-4.15.0-0.rc7.git2.1.vanilla.knurd.1.fc27.tar.xz
kernel-4.15.0-0.rc7.git2.1.vanilla.knurd.1.fc27.zip
-rw-r--r--arm-exynos-fix-usb3.patch301
-rw-r--r--gitrev2
-rw-r--r--kernel.spec14
-rw-r--r--phy-work-around-phys-references-to-usb-phy-devices.patch104
-rw-r--r--prevent-bounds-check-bypass-via-speculative-execution.patch4
-rw-r--r--sources2
6 files changed, 119 insertions, 308 deletions
diff --git a/arm-exynos-fix-usb3.patch b/arm-exynos-fix-usb3.patch
deleted file mode 100644
index 172fc1f7f..000000000
--- a/arm-exynos-fix-usb3.patch
+++ /dev/null
@@ -1,301 +0,0 @@
-From patchwork Mon Oct 9 12:00:51 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [PATCHv4,
- 2/2] phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800
-From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
-X-Patchwork-Id: 9992809
-Message-Id: <1507550451-21324-3-git-send-email-andrzej.p@samsung.com>
-To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org,
- linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
-Cc: Mark Rutland <mark.rutland@arm.com>, Felipe Balbi <balbi@kernel.org>,
- Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
- Russell King <linux@armlinux.org.uk>,
- Krzysztof Kozlowski <krzk@kernel.org>,
- Kishon Vijay Abraham I <kishon@ti.com>,
- Rob Herring <robh+dt@kernel.org>, Kukjin Kim <kgene@kernel.org>,
- Andrzej Pietrasiewicz <andrzej.p@samsung.com>,
- Marek Szyprowski <m.szyprowski@samsung.com>
-Date: Mon, 09 Oct 2017 14:00:51 +0200
-
-From: Vivek Gautam <gautam.vivek@samsung.com>
-
-Adding phy calibration sequence for USB 3.0 DRD PHY present on
-Exynos5420/5800 systems.
-This calibration facilitates setting certain PHY parameters viz.
-the Loss-of-Signal (LOS) Detector Threshold Level, as well as
-Tx-Vboost-Level for Super-Speed operations.
-Additionally we also set proper time to wait for RxDetect measurement,
-for desired PHY reference clock, so as to solve issue with enumeration
-of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive
-on the controller.
-
-We are using CR_port for this purpose to send required data
-to override the LOS values.
-
-On testing with USB 3.0 devices on USB 3.0 port present on
-SMDK5420, and peach-pit boards should see following message:
-usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd
-
-and without this patch, should see below shown message:
-usb 1-1: new high-speed USB device number 2 using xhci-hcd
-
-[Also removed unnecessary extra lines in the register macro definitions]
-
-Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
-[adapted to use phy_calibrate as entry point]
-Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
----
- drivers/phy/samsung/phy-exynos5-usbdrd.c | 183 +++++++++++++++++++++++++++++++
- drivers/usb/dwc3/core.c | 7 +-
- 2 files changed, 188 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
-index 22c68f5..9e83c15 100644
---- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
-+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
-@@ -90,7 +90,17 @@
- #define PHYCLKRST_COMMONONN BIT(0)
-
- #define EXYNOS5_DRD_PHYREG0 0x14
-+#define PHYREG0_SSC_REF_CLK_SEL BIT(21)
-+#define PHYREG0_SSC_RANGE BIT(20)
-+#define PHYREG0_CR_WRITE BIT(19)
-+#define PHYREG0_CR_READ BIT(18)
-+#define PHYREG0_CR_DATA_IN(_x) ((_x) << 2)
-+#define PHYREG0_CR_CAP_DATA BIT(1)
-+#define PHYREG0_CR_CAP_ADDR BIT(0)
-+
- #define EXYNOS5_DRD_PHYREG1 0x18
-+#define PHYREG1_CR_DATA_OUT(_x) ((_x) << 1)
-+#define PHYREG1_CR_ACK BIT(0)
-
- #define EXYNOS5_DRD_PHYPARAM0 0x1c
-
-@@ -119,6 +129,25 @@
- #define EXYNOS5_DRD_PHYRESUME 0x34
- #define EXYNOS5_DRD_LINKPORT 0x44
-
-+/* USB 3.0 DRD PHY SS Function Control Reg; accessed by CR_PORT */
-+#define EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN (0x15)
-+#define LOSLEVEL_OVRD_IN_LOS_BIAS_5420 (0x5 << 13)
-+#define LOSLEVEL_OVRD_IN_LOS_BIAS_DEFAULT (0x0 << 13)
-+#define LOSLEVEL_OVRD_IN_EN (0x1 << 10)
-+#define LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT (0x9 << 0)
-+
-+#define EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN (0x12)
-+#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420 (0x5 << 13)
-+#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_DEFAULT (0x4 << 13)
-+
-+#define EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG (0x1010)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M (0x4 << 4)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M (0x8 << 4)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_25M_26M (0x8 << 4)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M (0x20 << 4)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_62M5 (0x20 << 4)
-+#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_96M_100M (0x40 << 4)
-+
- #define KHZ 1000
- #define MHZ (KHZ * KHZ)
-
-@@ -527,6 +556,151 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy)
- return 0;
- }
-
-+static int crport_handshake(struct exynos5_usbdrd_phy *phy_drd,
-+ u32 val, u32 cmd)
-+{
-+ u32 usec = 100;
-+ unsigned int result;
-+
-+ writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
-+
-+ do {
-+ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1);
-+ if (result & PHYREG1_CR_ACK)
-+ break;
-+
-+ udelay(1);
-+ } while (usec-- > 0);
-+
-+ if (!usec) {
-+ dev_err(phy_drd->dev,
-+ "CRPORT handshake timeout1 (0x%08x)\n", val);
-+ return -ETIME;
-+ }
-+
-+ usec = 100;
-+
-+ writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
-+
-+ do {
-+ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1);
-+ if (!(result & PHYREG1_CR_ACK))
-+ break;
-+
-+ udelay(1);
-+ } while (usec-- > 0);
-+
-+ if (!usec) {
-+ dev_err(phy_drd->dev,
-+ "CRPORT handshake timeout2 (0x%08x)\n", val);
-+ return -ETIME;
-+ }
-+
-+ return 0;
-+}
-+
-+static int crport_ctrl_write(struct exynos5_usbdrd_phy *phy_drd,
-+ u32 addr, u32 data)
-+{
-+ int ret;
-+
-+ /* Write Address */
-+ writel(PHYREG0_CR_DATA_IN(addr),
-+ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
-+ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(addr),
-+ PHYREG0_CR_CAP_ADDR);
-+ if (ret)
-+ return ret;
-+
-+ /* Write Data */
-+ writel(PHYREG0_CR_DATA_IN(data),
-+ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
-+ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data),
-+ PHYREG0_CR_CAP_DATA);
-+ if (ret)
-+ return ret;
-+
-+ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data),
-+ PHYREG0_CR_WRITE);
-+
-+ return ret;
-+}
-+
-+/*
-+ * Calibrate few PHY parameters using CR_PORT register to meet
-+ * SuperSpeed requirements on Exynos5420 and Exynos5800 systems,
-+ * which have 28nm USB 3.0 DRD PHY.
-+ */
-+static int exynos5420_usbdrd_phy_calibrate(struct exynos5_usbdrd_phy *phy_drd)
-+{
-+ unsigned int temp;
-+ int ret = 0;
-+
-+ /*
-+ * Change los_bias to (0x5) for 28nm PHY from a
-+ * default value (0x0); los_level is set as default
-+ * (0x9) as also reflected in los_level[30:26] bits
-+ * of PHYPARAM0 register.
-+ */
-+ temp = LOSLEVEL_OVRD_IN_LOS_BIAS_5420 |
-+ LOSLEVEL_OVRD_IN_EN |
-+ LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT;
-+ ret = crport_ctrl_write(phy_drd,
-+ EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN,
-+ temp);
-+ if (ret) {
-+ dev_err(phy_drd->dev,
-+ "Failed setting Loss-of-Signal level for SuperSpeed\n");
-+ return ret;
-+ }
-+
-+ /*
-+ * Set tx_vboost_lvl to (0x5) for 28nm PHY Tuning,
-+ * to raise Tx signal level from its default value of (0x4)
-+ */
-+ temp = TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420;
-+ ret = crport_ctrl_write(phy_drd,
-+ EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN,
-+ temp);
-+ if (ret) {
-+ dev_err(phy_drd->dev,
-+ "Failed setting Tx-Vboost-Level for SuperSpeed\n");
-+ return ret;
-+ }
-+
-+ /*
-+ * Set proper time to wait for RxDetect measurement, for
-+ * desired reference clock of PHY, by tuning the CR_PORT
-+ * register LANE0.TX_DEBUG which is internal to PHY.
-+ * This fixes issue with few USB 3.0 devices, which are
-+ * not detected (not even generate interrupts on the bus
-+ * on insertion) without this change.
-+ * e.g. Samsung SUM-TSB16S 3.0 USB drive.
-+ */
-+ switch (phy_drd->extrefclk) {
-+ case EXYNOS5_FSEL_50MHZ:
-+ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M;
-+ break;
-+ case EXYNOS5_FSEL_20MHZ:
-+ case EXYNOS5_FSEL_19MHZ2:
-+ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M;
-+ break;
-+ case EXYNOS5_FSEL_24MHZ:
-+ default:
-+ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M;
-+ break;
-+ }
-+
-+ ret = crport_ctrl_write(phy_drd,
-+ EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG,
-+ temp);
-+ if (ret)
-+ dev_err(phy_drd->dev,
-+ "Failed setting RxDetect measurement time for SuperSpeed\n");
-+
-+ return ret;
-+}
-+
- static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev,
- struct of_phandle_args *args)
- {
-@@ -538,11 +712,20 @@ static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev,
- return phy_drd->phys[args->args[0]].phy;
- }
-
-+static int exynos5_usbdrd_phy_calibrate(struct phy *phy)
-+{
-+ struct phy_usb_instance *inst = phy_get_drvdata(phy);
-+ struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst);
-+
-+ return exynos5420_usbdrd_phy_calibrate(phy_drd);
-+}
-+
- static const struct phy_ops exynos5_usbdrd_phy_ops = {
- .init = exynos5_usbdrd_phy_init,
- .exit = exynos5_usbdrd_phy_exit,
- .power_on = exynos5_usbdrd_phy_power_on,
- .power_off = exynos5_usbdrd_phy_power_off,
-+ .calibrate = exynos5_usbdrd_phy_calibrate,
- .owner = THIS_MODULE,
- };
-
-diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
-index 03474d3..224e0dd 100644
---- a/drivers/usb/dwc3/core.c
-+++ b/drivers/usb/dwc3/core.c
-@@ -156,9 +156,10 @@ static void __dwc3_set_mode(struct work_struct *work)
- } else {
- if (dwc->usb2_phy)
- otg_set_vbus(dwc->usb2_phy->otg, true);
-- if (dwc->usb2_generic_phy)
-+ if (dwc->usb2_generic_phy) {
- phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
--
-+ phy_calibrate(dwc->usb2_generic_phy);
-+ }
- }
- break;
- case DWC3_GCTL_PRTCAP_DEVICE:
-@@ -955,6 +956,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
- dev_err(dev, "failed to initialize host\n");
- return ret;
- }
-+ if (dwc->usb2_generic_phy)
-+ phy_calibrate(dwc->usb2_generic_phy);
- break;
- case USB_DR_MODE_OTG:
- INIT_WORK(&dwc->drd_work, __dwc3_set_mode);
diff --git a/gitrev b/gitrev
index 8f811c40e..6681ac6e6 100644
--- a/gitrev
+++ b/gitrev
@@ -1 +1 @@
-ef7f8cec80a0ba7bd00ece46844c8994117dc910
+cf1fb158230edce8a0482bfb2e59b9c390477fb6
diff --git a/kernel.spec b/kernel.spec
index 36be5fb3f..a6c146204 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -77,7 +77,7 @@ Summary: The Linux kernel
# The rc snapshot level
%global rcrev 7
# The git snapshot level
-%define gitrev 1
+%define gitrev 2
# Set rpm version accordingly
%define rpmversion 4.%{upstream_sublevel}.0
%endif
@@ -601,9 +601,11 @@ Patch321: bcm283x-dma-mapping-skip-USB-devices-when-configuring-DMA-during-probe
# https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/log/?h=synquacer-netsec
Patch332: arm64-socionext-96b-enablement.patch
-# This needs a rebase
-# Patch335: arm-exynos-fix-usb3.patch
+# Fix Raspberry Pi and possibly some other dwc2/dwc3 users
+# https://patchwork.kernel.org/patch/10149439/
+Patch399: phy-work-around-phys-references-to-usb-phy-devices.patch
+# Patch399: phy-work-around-phys-references-to-usb-phy-devices.patch
# 400 - IBM (ppc/s390x) patches
# 500 - Temp fixes/CVEs etc
@@ -1912,6 +1914,12 @@ fi
#
#
%changelog
+* Wed Jan 10 2018 Laura Abbott <labbott@redhat.com> - 4.15.0-0.rc7.git2.1
+- Linux v4.15-rc7-102-gcf1fb158230e
+
+* Wed Jan 10 2018 Peter Robinson <pbrobinson@fedoraproject.org>
+- Fix USB on Raspberry Pi (and possibly other dwc2 devices)
+
* Tue Jan 09 2018 Laura Abbott <labbott@redhat.com> - 4.15.0-0.rc7.git1.1
- Linux v4.15-rc7-79-gef7f8cec80a0
diff --git a/phy-work-around-phys-references-to-usb-phy-devices.patch b/phy-work-around-phys-references-to-usb-phy-devices.patch
new file mode 100644
index 000000000..1c7f39b7a
--- /dev/null
+++ b/phy-work-around-phys-references-to-usb-phy-devices.patch
@@ -0,0 +1,104 @@
+From patchwork Mon Jan 8 13:01:10 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: phy: work around 'phys' references to usb-phy devices
+From: Arnd Bergmann <arnd@arndb.de>
+X-Patchwork-Id: 10149439
+Message-Id: <20180108130116.80148-1-arnd@arndb.de>
+To: Kishon Vijay Abraham I <kishon@ti.com>
+Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
+ Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
+ Felipe Balbi <balbi@kernel.org>, linux-usb@vger.kernel.org,
+ linux-kernel@vger.kernel.org, stable@vger.kernel.org,
+ Eric Anholt <eric@anholt.net>, Rob Herring <robh+dt@kernel.org>,
+ Andrzej Pietrasiewicz <andrzej.p@samsung.com>,
+ linux-arm-kernel@lists.infradead.org
+Date: Mon, 8 Jan 2018 14:01:10 +0100
+
+Stefan Wahren reports a problem with a warning fix that was merged
+for v4.15: we had lots of device nodes with a 'phys' property pointing
+to a device node that is not compliant with the binding documented in
+Documentation/devicetree/bindings/phy/phy-bindings.txt
+
+This generally works because USB HCD drivers that support both the generic
+phy subsystem and the older usb-phy subsystem ignore most errors from
+phy_get() and related calls and then use the usb-phy driver instead.
+
+However, usb_add_hcd() (along with the respective functions in dwc2 and
+dwc3) propagate the EPROBE_DEFER return code so we can try again whenever
+the driver gets loaded. In case the driver is written for the usb-phy
+subsystem (like usb-generic-phy aka usb-nop-xceiv), we will never load
+a generic-phy driver for it, and keep failing here.
+
+There is only a small number of remaining usb-phy drivers that support
+device tree, so this adds a workaround by providing a full list of the
+potentially affected drivers, and always failing the probe with -ENODEV
+here, which is the same behavior that we used to get with incorrect
+device tree files. Since we generally want older kernels to also want
+to work with the fixed devicetree files, it would be good to backport
+the patch into stable kernels as well (3.13+ are possibly affected).
+Reverting back to the DTS sources that work would in theory fix USB
+support for now, but in the long run we'd run into the same problem
+again when the drivers get ported from usb-phy to generic-phy.
+
+Fixes: 014d6da6cb25 ("ARM: dts: bcm283x: Fix DTC warnings about missing phy-cells")
+Link: https://marc.info/?l=linux-usb&m=151518314314753&w=2
+Cc: stable@vger.kernel.org
+Cc: Stefan Wahren <stefan.wahren@i2se.com>
+Cc: Felipe Balbi <balbi@kernel.org>
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+---
+This obviously needs to be tested, I wrote this up as a reply to
+Stefan's bug report. I'm fairly sure that I covered all usb-phy
+driver strings here. My goal is to have a fix merged into 4.15
+rather than reverting all the DT fixes.
+---
+ drivers/phy/phy-core.c | 27 +++++++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
+index b4964b067aec..bb4dd2a2de2d 100644
+--- a/drivers/phy/phy-core.c
++++ b/drivers/phy/phy-core.c
+@@ -387,6 +387,24 @@ int phy_calibrate(struct phy *phy)
+ }
+ EXPORT_SYMBOL_GPL(phy_calibrate);
+
++static struct of_device_id __maybe_unused legacy_usbphy[] = {
++ { .compatible = "fsl,imx23-usbphy" },
++ { .compatible = "fsl,imx6q-usbphy" },
++ { .compatible = "fsl,imx6sl-usbphy" },
++ { .compatible = "fsl,imx6sx-usbphy" },
++ { .compatible = "fsl,imx6ul-usbphy" },
++ { .compatible = "fsl,vf610-usbphy" },
++ { .compatible = "nvidia,tegra20-usb-phy" },
++ { .compatible = "nvidia,tegra30-usb-phy" },
++ { .compatible = "nxp,isp1301" },
++ { .compatible = "ti,am335x-usb-ctrl-module" },
++ { .compatible = "ti,am335x-usb-phy" },
++ { .compatible = "ti,keystone-usbphy" },
++ { .compatible = "ti,twl6030-usb" },
++ { .compatible = "usb-nop-xceiv" },
++ {},
++};
++
+ /**
+ * _of_phy_get() - lookup and obtain a reference to a phy by phandle
+ * @np: device_node for which to get the phy
+@@ -410,6 +428,15 @@ static struct phy *_of_phy_get(struct device_node *np, int index)
+ if (ret)
+ return ERR_PTR(-ENODEV);
+
++ /*
++ * Some USB host controllers use a "phys" property to refer to
++ * a device that does not have a generic phy driver but that
++ * has a driver for the older usb-phy framework.
++ * We must not return -EPROBE_DEFER for those, so bail out early.
++ */
++ if (of_match_node(legacy_usbphy, args.np))
++ return ERR_PTR(-ENODEV);
++
+ mutex_lock(&phy_provider_mutex);
+ phy_provider = of_phy_provider_lookup(args.np);
+ if (IS_ERR(phy_provider) || !try_module_get(phy_provider->owner)) {
diff --git a/prevent-bounds-check-bypass-via-speculative-execution.patch b/prevent-bounds-check-bypass-via-speculative-execution.patch
index 4e566d247..890efc149 100644
--- a/prevent-bounds-check-bypass-via-speculative-execution.patch
+++ b/prevent-bounds-check-bypass-via-speculative-execution.patch
@@ -411,7 +411,7 @@ index 40f5c410fd8c..6384c90e4b72 100644
+({ \
+ typeof(*ptr) __nln_val; \
+ typeof(*ptr) __failval = \
-+ (typeof(*ptr)(unsigned long)(failval)); \
++ (typeof(*ptr))(unsigned long)(failval); \
+ \
+ asm volatile ( \
+ " cmp %[c], %[l]\n" \
@@ -434,7 +434,7 @@ index 40f5c410fd8c..6384c90e4b72 100644
+({ \
+ typeof(*ptr) __nln_val; \
+ typeof(*ptr) __failval = \
-+ (typeof(*ptr)(unsigned long)(failval)); \
++ (typeof(*ptr))(unsigned long)(failval); \
+ \
+ asm volatile ( \
+ " cmp %[c], %[l]\n" \
diff --git a/sources b/sources
index 5aad3124f..2a4988e0b 100644
--- a/sources
+++ b/sources
@@ -1,4 +1,4 @@
SHA512 (linux-4.14.tar.xz) = 77e43a02d766c3d73b7e25c4aafb2e931d6b16e870510c22cef0cdb05c3acb7952b8908ebad12b10ef982c6efbe286364b1544586e715cf38390e483927904d8
SHA512 (perf-man-4.14.tar.gz) = 76a9d8adc284cdffd4b3fbb060e7f9a14109267707ce1d03f4c3239cd70d8d164f697da3a0f90a363fbcac42a61d3c378afbcc2a86f112c501b9cb5ce74ef9f8
SHA512 (patch-4.15-rc7.xz) = 1c9c74917f5bc5e259d4b918d429d606419f4564ae15f754ef01404234f53d02c8782db0bcce75bf8103510231e723df2fa4a8c8cca8ea4db458b585c0e01570
-SHA512 (patch-4.15-rc7-git1.xz) = 71637b07bac963bd4f34b3dea9e9b3cc33b918c297592c6e229d09ca1649ca232991a6caedbd97847d2a4d1b10bbf82e1f202986d94b878d452df5d5e1c4d10f
+SHA512 (patch-4.15-rc7-git2.xz) = 9d1f0ca1b72fc1a400739f0e31648f2cd2023e24b5243509b8e71f613fec38f2140d1e0ac2c0f174f63d6b28ab6546248f5baad58e37d3b8ea033a5b49f4d2ac