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.\" -*- nroff -*-
.TH TAPSET::PERF 3stap "" "IBM"
.SH NAME
tapset::perf \- systemtap perf probe points
.\" macros
.de SAMPLE
.br
.RS
.nf
.nh
..
.de ESAMPLE
.hy
.fi
.RE
..
.SH DESCRIPTION
This family of probe points is used to probe "perf events" on suitably
configured kernels (2.6.33+). It contains a number of aliases for the
ABI-specified event type/config tuples.
The default sampling interval of the translator (1000000) is not
overridden, so some of these probe points may fire very infrequently.
Use the lower level
.B perf.type(AA).config(BB).sample(CC)
probe point if this is a problem.
.TP
.B perf.hw.*
A variety of hardware events, as generalized by the kernel. These
generally require running on bare hardware with selected processors.
.SAMPLE
probe perf.hw.cpu_cycles
probe perf.hw.instructions
probe perf.hw.cache_references
probe perf.hw.cache_misses
probe perf.hw.branch_instructions
probe perf.hw.branch_misses
probe perf.hw.bus_cycles
.ESAMPLE
.TP
.B perf.sw.*
Special "software" events provided by the kernel. These sometimes work
in virtualized environments and with more processor architectures.
.SAMPLE
probe perf.sw.cpu_clock
probe perf.sw.task_clock
probe perf.sw.page_faults
probe perf.sw.context_switches
probe perf.sw.cpu_migrations
probe perf.sw.page_faults_min
probe perf.sw.page_faults_maj
probe perf.sw.alignment_faults
probe perf.sw.emulation_faults
.ESAMPLE
.TP
.B perf.hw_cache.TYPE.ACCESS.RESULT
Hardware cache events, where available. A subset of the following
cartesian product may be available:
.SAMPLE
probe perf.hw_cache.l1d.*.*
probe perf.hw_cache.l1i.*.*
probe perf.hw_cache.ll.*.*
probe perf.hw_cache.dtlb.*.*
probe perf.hw_cache.itlb.*.*
probe perf.hw_cache.bpu.*.*
probe perf.hw_cache.*.read.*
probe perf.hw_cache.*.write.*
probe perf.hw_cache.*.prefetch.*
probe perf.hw_cache.*.*.access
probe perf.hw_cache.*.*.miss
.ESAMPLE
.SH SEE ALSO
.IR stap (1),
.IR stapprobes (3stap)
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