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author	Benjamin Dauvergne <bdauvergne@entrouvert.com>	2008-05-19 23:26:39 +0000
committer	Benjamin Dauvergne <bdauvergne@entrouvert.com>	2008-05-19 23:26:39 +0000
commit	175af5a87be57317fa16c0fcef4340493b2cc68d (patch)
tree	65aea556ff448f619d1acd8aa3268fda33f3b8e3 /bindings/java/tests/BindingTests.java
parent	2ca027696ef17ac5130f2e33b9ff8493d360d132 (diff)
download	lasso-175af5a87be57317fa16c0fcef4340493b2cc68d.tar.gz lasso-175af5a87be57317fa16c0fcef4340493b2cc68d.tar.xz lasso-175af5a87be57317fa16c0fcef4340493b2cc68d.zip

add pact for SWIG 1.3.33, need to be tested agains previous and later versions of SWIG

Diffstat (limited to 'bindings/java/tests/BindingTests.java')

0 files changed, 0 insertions, 0 deletions

/* * (C) Copyright 2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * This file is based on mpc4200fec.h * (C) Copyright Motorola, Inc., 2000 * * odin ethernet header file */ #ifndef __MPC5XXX_FEC_H #define __MPC5XXX_FEC_H typedef unsigned long uint32; typedef unsigned short uint16; typedef unsigned char uint8; typedef struct ethernet_register_set { /* [10:2]addr = 00 */ /* Control and status Registers (offset 000-1FF) */ volatile uint32 fec_id; /* MBAR_ETH + 0x000 */ volatile uint32 ievent; /* MBAR_ETH + 0x004 */ volatile uint32 imask; /* MBAR_ETH + 0x008 */ volatile uint32 RES0[1]; /* MBAR_ETH + 0x00C */ volatile uint32 r_des_active; /* MBAR_ETH + 0x010 */ volatile uint32 x_des_active; /* MBAR_ETH + 0x014 */ volatile uint32 r_des_active_cl; /* MBAR_ETH + 0x018 */ volatile uint32 x_des_active_cl; /* MBAR_ETH + 0x01C */ volatile uint32 ivent_set; /* MBAR_ETH + 0x020 */ volatile uint32 ecntrl; /* MBAR_ETH + 0x024 */ volatile uint32 RES1[6]; /* MBAR_ETH + 0x028-03C */ volatile uint32 mii_data; /* MBAR_ETH + 0x040 */ volatile uint32 mii_speed; /* MBAR_ETH + 0x044 */ volatile uint32 mii_status; /* MBAR_ETH + 0x048 */ volatile uint32 RES2[5]; /* MBAR_ETH + 0x04C-05C */ volatile uint32 mib_data; /* MBAR_ETH + 0x060 */ volatile uint32 mib_control; /* MBAR_ETH + 0x064 */ volatile uint32 RES3[6]; /* MBAR_ETH + 0x068-7C */ volatile uint32 r_activate; /* MBAR_ETH + 0x080 */ volatile uint32 r_cntrl; /* MBAR_ETH + 0x084 */ volatile uint32 r_hash; /* MBAR_ETH + 0x088 */ volatile uint32 r_data; /* MBAR_ETH + 0x08C */ volatile uint32 ar_done; /* MBAR_ETH + 0x090 */ volatile uint32 r_test; /* MBAR_ETH + 0x094 */ volatile uint32 r_mib; /* MBAR_ETH + 0x098 */ volatile uint32 r_da_low; /* MBAR_ETH + 0x09C */ volatile uint32 r_da_high; /* MBAR_ETH + 0x0A0 */ volatile uint32 RES4[7]; /* MBAR_ETH + 0x0A4-0BC */ volatile uint32 x_activate; /* MBAR_ETH + 0x0C0 */ volatile uint32 x_cntrl; /* MBAR_ETH + 0x0C4 */ volatile uint32 backoff; /* MBAR_ETH + 0x0C8 */ volatile uint32 x_data; /* MBAR_ETH + 0x0CC */ volatile uint32 x_status; /* MBAR_ETH + 0x0D0 */ volatile uint32 x_mib; /* MBAR_ETH + 0x0D4 */ volatile uint32 x_test; /* MBAR_ETH + 0x0D8 */ volatile uint32 fdxfc_da1; /* MBAR_ETH + 0x0DC */ volatile uint32 fdxfc_da2; /* MBAR_ETH + 0x0E0 */ volatile uint32 paddr1; /* MBAR_ETH + 0x0E4 */ volatile uint32 paddr2; /* MBAR_ETH + 0x0E8 */ volatile uint32 op_pause; /* MBAR_ETH + 0x0EC */ volatile uint32 RES5[4]; /* MBAR_ETH + 0x0F0-0FC */ volatile uint32 instr_reg; /* MBAR_ETH + 0x100 */ volatile uint32 context_reg; /* MBAR_ETH + 0x104 */ volatile uint32 test_cntrl; /* MBAR_ETH + 0x108 */ volatile uint32 acc_reg; /* MBAR_ETH + 0x10C */ volatile uint32 ones; /* MBAR_ETH + 0x110 */ volatile uint32 zeros; /* MBAR_ETH + 0x114 */ volatile uint32 iaddr1; /* MBAR_ETH + 0x118 */ volatile uint32 iaddr2; /* MBAR_ETH + 0x11C */ volatile uint32 gaddr1; /* MBAR_ETH + 0x120 */ volatile uint32 gaddr2; /* MBAR_ETH + 0x124 */ volatile uint32 random; /* MBAR_ETH + 0x128 */ volatile uint32 rand1; /* MBAR_ETH + 0x12C */ volatile uint32 tmp; /* MBAR_ETH + 0x130 */ volatile uint32 RES6[3]; /* MBAR_ETH + 0x134-13C */ volatile uint32 fifo_id; /* MBAR_ETH + 0x140 */ volatile uint32 x_wmrk; /* MBAR_ETH + 0x144 */ volatile uint32 fcntrl; /* MBAR_ETH + 0x148 */ volatile uint32 r_bound; /* MBAR_ETH + 0x14C */ volatile uint32 r_fstart; /* MBAR_ETH + 0x150 */ volatile uint32 r_count; /* MBAR_ETH + 0x154 */ volatile uint32 r_lag; /* MBAR_ETH + 0x158 */ volatile uint32 r_read; /* MBAR_ETH + 0x15C */ volatile uint32 r_write; /* MBAR_ETH + 0x160 */ volatile uint32 x_count; /* MBAR_ETH + 0x164 */ volatile uint32 x_lag; /* MBAR_ETH + 0x168 */ volatile uint32 x_retry; /* MBAR_ETH + 0x16C */ volatile uint32 x_write; /* MBAR_ETH + 0x170 */ volatile uint32 x_read; /* MBAR_ETH + 0x174 */ volatile uint32 RES7[2]; /* MBAR_ETH + 0x178-17C */ volatile uint32 fm_cntrl; /* MBAR_ETH + 0x180 */ volatile uint32 rfifo_data; /* MBAR_ETH + 0x184 */ volatile uint32 rfifo_status; /* MBAR_ETH + 0x188 */ volatile uint32 rfifo_cntrl; /* MBAR_ETH + 0x18C */ volatile uint32 rfifo_lrf_ptr; /* MBAR_ETH + 0x190 */ volatile uint32 rfifo_lwf_ptr; /* MBAR_ETH + 0x194 */ volatile uint32 rfifo_alarm; /* MBAR_ETH + 0x198 */ volatile uint32 rfifo_rdptr; /* MBAR_ETH + 0x19C */ volatile uint32 rfifo_wrptr; /* MBAR_ETH + 0x1A0 */ volatile uint32 tfifo_data; /* MBAR_ETH + 0x1A4 */ volatile uint32 tfifo_status; /* MBAR_ETH + 0x1A8 */ volatile uint32 tfifo_cntrl; /* MBAR_ETH + 0x1AC */ volatile uint32 tfifo_lrf_ptr; /* MBAR_ETH + 0x1B0 */ volatile uint32 tfifo_lwf_ptr; /* MBAR_ETH + 0x1B4 */ volatile uint32 tfifo_alarm; /* MBAR_ETH + 0x1B8 */ volatile uint32 tfifo_rdptr; /* MBAR_ETH + 0x1BC */ volatile uint32 tfifo_wrptr; /* MBAR_ETH + 0x1C0 */ volatile uint32 reset_cntrl; /* MBAR_ETH + 0x1C4 */ volatile uint32 xmit_fsm; /* MBAR_ETH + 0x1C8 */ volatile uint32 RES8[3]; /* MBAR_ETH + 0x1CC-1D4 */ volatile uint32 rdes_data0; /* MBAR_ETH + 0x1D8 */ volatile uint32 rdes_data1; /* MBAR_ETH + 0x1DC */ volatile uint32 r_length; /* MBAR_ETH + 0x1E0 */ volatile uint32 x_length; /* MBAR_ETH + 0x1E4 */ volatile uint32 x_addr; /* MBAR_ETH + 0x1E8 */ volatile uint32 cdes_data; /* MBAR_ETH + 0x1EC */ volatile uint32 status; /* MBAR_ETH + 0x1F0 */ volatile uint32 dma_control; /* MBAR_ETH + 0x1F4 */ volatile uint32 des_cmnd; /* MBAR_ETH + 0x1F8 */ volatile uint32 data; /* MBAR_ETH + 0x1FC */ /* MIB COUNTERS (Offset 200-2FF) */ volatile uint32 rmon_t_drop; /* MBAR_ETH + 0x200 */ volatile uint32 rmon_t_packets; /* MBAR_ETH + 0x204 */


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