summaryrefslogtreecommitdiffstats
path: root/proxy/src/gp_rpc_indicate_mechs.c
Commit message (Expand)AuthorAgeFilesLines
* creds: add code to import krb5 credentials based on configuration.Simo Sorce2012-04-051-0/+1
* server: better handle return statusSimo Sorce2012-02-231-22/+32
* Fix attr description set in gp_indicate_mechs()Simo Sorce2012-02-051-0/+29
* Add server implementation of gssx_indicate_mechsSimo Sorce2012-02-031-0/+252
/a> 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435
/*
 * Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: 1. Redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer. 2. The name
 * of the author may not be used to endorse or promote products derived from
 * this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
 * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 October 2, 1994

 Modified by: Andres Vega Garcia

 INRIA - Sophia Antipolis, France
 e-mail: avega@sophia.inria.fr
 finger: avega@pax.inria.fr

 */

/*
 * Created from if_epreg.h by Fred Gray (fgray@rice.edu) to support the
 * 3c590 family.
 */

/*
 * Modified by Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp>
 * for etherboot
 * Mar. 14, 2000
*/

/*
 * Ethernet software status per interface.
 */

/*
 * Some global constants
 */

#define TX_INIT_RATE         16
#define TX_INIT_MAX_RATE     64
#define RX_INIT_LATENCY      64
#define RX_INIT_EARLY_THRESH 64
#define MIN_RX_EARLY_THRESHF   16 /* not less than ether_header */
#define MIN_RX_EARLY_THRESHL   4

#define EEPROMSIZE      0x40
#define MAX_EEPROMBUSY  1000
#define VX_LAST_TAG     0xd7
#define VX_MAX_BOARDS   16
#define VX_ID_PORT      0x100

/*
 * some macros to acces long named fields
 */
#define BASE 	(EL_BASE_ADDR)

/*
 * Commands to read/write EEPROM trough EEPROM command register (Window 0,
 * Offset 0xa)
 */
#define EEPROM_CMD_RD    0x0080	/* Read:  Address required (5 bits) */
#define EEPROM_CMD_WR    0x0040	/* Write: Address required (5 bits) */
#define EEPROM_CMD_ERASE 0x00c0	/* Erase: Address required (5 bits) */
#define EEPROM_CMD_EWEN  0x0030	/* Erase/Write Enable: No data required */

#define EEPROM_BUSY		(1<<15)

/*
 * Some short functions, worth to let them be a macro
 */

/**************************************************************************
 *									  *
 * These define the EEPROM data structure.  They are used in the probe
 * function to verify the existence of the adapter after having sent
 * the ID_Sequence.
 *
 * There are others but only the ones we use are defined here.
 *
 **************************************************************************/

#define EEPROM_NODE_ADDR_0	0x0	/* Word */
#define EEPROM_NODE_ADDR_1	0x1	/* Word */
#define EEPROM_NODE_ADDR_2	0x2	/* Word */
#define EEPROM_PROD_ID		0x3	/* 0x9[0-f]50 */
#define EEPROM_MFG_ID		0x7	/* 0x6d50 */
#define EEPROM_ADDR_CFG		0x8	/* Base addr */
#define EEPROM_RESOURCE_CFG	0x9	/* IRQ. Bits 12-15 */
#define EEPROM_OEM_ADDR_0	0xa	/* Word */
#define EEPROM_OEM_ADDR_1	0xb	/* Word */
#define EEPROM_OEM_ADDR_2	0xc	/* Word */
#define EEPROM_SOFT_INFO_2	0xf     /* Software information 2 */

#define NO_RX_OVN_ANOMALY       (1<<5)

/**************************************************************************
 *										  *
 * These are the registers for the 3Com 3c509 and their bit patterns when *
 * applicable.  They have been taken out the the "EtherLink III Parallel  *
 * Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
 * from 3com.								  *
 *										  *
 **************************************************************************/

#define VX_COMMAND		0x0e	/* Write. BASE+0x0e is always a
					 * command reg. */
#define VX_STATUS		0x0e	/* Read. BASE+0x0e is always status
					 * reg. */
#define VX_WINDOW		0x0f	/* Read. BASE+0x0f is always window
					 * reg. */
/*
 * Window 0 registers. Setup.
 */
/* Write */
#define VX_W0_EEPROM_DATA	0x0c
#define VX_W0_EEPROM_COMMAND	0x0a
#define VX_W0_RESOURCE_CFG	0x08
#define VX_W0_ADDRESS_CFG	0x06
#define VX_W0_CONFIG_CTRL	0x04
	/* Read */
#define VX_W0_PRODUCT_ID	0x02
#define VX_W0_MFG_ID		0x00


/*
 * Window 1 registers. Operating Set.
 */
/* Write */
#define VX_W1_TX_PIO_WR_2	0x02
#define VX_W1_TX_PIO_WR_1	0x00
/* Read */
#define VX_W1_FREE_TX		0x0c
#define VX_W1_TX_STATUS		0x0b	/* byte */
#define VX_W1_TIMER		0x0a	/* byte */
#define VX_W1_RX_STATUS		0x08
#define VX_W1_RX_PIO_RD_2	0x02
#define VX_W1_RX_PIO_RD_1	0x00

/*
 * Window 2 registers. Station Address Setup/Read
 */
/* Read/Write */
#define VX_W2_ADDR_5		0x05
#define VX_W2_ADDR_4		0x04
#define VX_W2_ADDR_3		0x03
#define VX_W2_ADDR_2		0x02
#define VX_W2_ADDR_1		0x01
#define VX_W2_ADDR_0		0x00

/*
 * Window 3 registers. FIFO Management.
 */
/* Read */
#define VX_W3_INTERNAL_CFG	0x00
#define VX_W3_RESET_OPT		0x08
#define VX_W3_FREE_TX		0x0c
#define VX_W3_FREE_RX		0x0a

/*
 * Window 4 registers. Diagnostics.
 */
/* Read/Write */
#define VX_W4_MEDIA_TYPE	0x0a
#define VX_W4_CTRLR_STATUS	0x08
#define VX_W4_NET_DIAG		0x06
#define VX_W4_FIFO_DIAG		0x04
#define VX_W4_HOST_DIAG		0x02
#define VX_W4_TX_DIAG		0x00

/*
 * Window 5 Registers.  Results and Internal status.
 */
/* Read */
#define VX_W5_READ_0_MASK	0x0c
#define VX_W5_INTR_MASK		0x0a
#define VX_W5_RX_FILTER		0x08
#define VX_W5_RX_EARLY_THRESH	0x06
#define VX_W5_TX_AVAIL_THRESH	0x02
#define VX_W5_TX_START_THRESH	0x00

/*
 * Window 6 registers. Statistics.
 */
/* Read/Write */
#define TX_TOTAL_OK		0x0c
#define RX_TOTAL_OK		0x0a
#define TX_DEFERRALS		0x08
#define RX_FRAMES_OK		0x07
#define TX_FRAMES_OK		0x06
#define RX_OVERRUNS		0x05
#define TX_COLLISIONS		0x04
#define TX_AFTER_1_COLLISION	0x03
#define TX_AFTER_X_COLLISIONS	0x02
#define TX_NO_SQE		0x01
#define TX_CD_LOST		0x00

/****************************************
 *
 * Register definitions.
 *