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generated by cgit (git 2.34.1) at 2026-04-15 23:23:52 +0000
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/*
 * (C) Copyright 2013
 * NVIDIA Corporation <www.nvidia.com>
 *
 * SPDX-License-Identifier:     GPL-2.0+
 */

#ifndef _TEGRA124_COMMON_H_
#define _TEGRA124_COMMON_H_

#include "tegra-common.h"

/* Cortex-A15 uses a cache line size of 64 bytes */
#define CONFIG_SYS_CACHELINE_SIZE	64

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */