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path: root/drivers/gpu/drm/i915/i915_gem.c
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* drm/i915: Add ioctl to set 'purgeability' of objectsChris Wilson2009-09-171-8/+73
* drm/i915: Register a shrinker to free inactive lists under memory pressureChris Wilson2009-09-171-0/+144
* drm/i915: Remove stored gtt_alignmentChris Wilson2009-09-171-12/+2
* drm/i915: Add buffer to inactive list immediately during faultChris Wilson2009-09-171-2/+1
* drm/i915: Make dev_priv->mm.wedged an atomic_tBen Gamari2009-09-171-9/+9
* drm/i915: Add hangcheck timerBen Gamari2009-09-171-2/+6
* drm/i915: make i915_seqno_passed non-staticBen Gamari2009-09-171-1/+1
* drm/i915: Check whether chip is wedged in i915_wait_request()Ben Gamari2009-09-171-0/+3
* drm/i915: Only destroy a constructed mmap offsetChris Wilson2009-09-111-1/+2
* agp/intel: Fix the pre-9xx chipset flush.Eric Anholt2009-09-111-10/+0
* drm/i915: Zap mmaps of objects before unbinding them from the GTT.Eric Anholt2009-09-091-8/+8
* Merge intel drm-intel-next branchDave Airlie2009-09-071-40/+60
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| * drm/i915: Pad ringbuffer with NOOPs before wrappingChris Wilson2009-09-061-1/+0
| * drm/i915: add dynamic clock frequency controlJesse Barnes2009-09-041-2/+8
| * drm/i915: Unref old_obj on get_fence_reg() error pathChris Wilson2009-09-021-4/+9
| * drm/i915: Fix CPU-spinning hangs related to fence usage by using an LRU.Eric Anholt2009-08-291-38/+48
* | drm: GEM handles are u32, not intPekka Paalanen2009-08-271-1/+2
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* drm/i915: Use our own workqueue to avoid wedging the system along with the GPU.Eric Anholt2009-08-051-2/+2
* drm/i915: Zap the GTT mapping when transitioning from untiled to tiled.Eric Anholt2009-07-101-1/+1
* drm/i915: Refactor calls to unmap_mapping_rangeChris Wilson2009-07-101-9/+27
* drm/i915: initialize fence registers to zero when loading GEMGrégoire Henry2009-06-231-0/+13
* drm/i915: Fix size_t handling in off-by-default debug printfsKrzysztof Halasa2009-06-221-3/+3
* drm: Remove memory debugging infrastructure.Eric Anholt2009-06-181-19/+16
* drm/i915: Clear fence register on tiling stride change.Chris Wilson2009-06-181-1/+36
* drm/i915: Install fence register for tiled scanout on i915Chris Wilson2009-06-181-6/+4
* drm/i915: detach/attach get/put pages symmetryChris Wilson2009-06-171-0/+4
* drm/i915: NOMEM->NOSPCChris Wilson2009-06-091-5/+5
* drm/i915: use I915_GEM_GPU_DOMAINSChris Wilson2009-06-091-13/+9
* drm/i915: no need to hold mutex for object lookupChris Wilson2009-06-091-2/+1
* drm/i915: OR in the COMMAND read domain for the batch buffer.Chris Wilson2009-06-091-2/+6
* drm/i915: Sanity check execbuffer arguments before touching state.Chris Wilson2009-06-091-11/+27
* drm/i915: handle interrupt on new chipsetZhenyu Wang2009-06-091-1/+4
* drm/i915: Change GEM throttling to be 20ms like the comment says.Eric Anholt2009-06-041-15/+54
* drm/i915: Remove a bad BUG_ON in the fence management code.Eric Anholt2009-06-041-3/+0
* i915: Set object to gtt domain when faulting it back inKristian Høgsberg2009-05-271-0/+7
* drm/i915: Apply a big hammer to 865 GEM object CPU cache flushing.Eric Anholt2009-05-261-0/+10
* drm/i915: Fix tiling pitch handling on 8xx.Eric Anholt2009-05-261-2/+4
* i915: support 8xx desktop cursorsJesse Barnes2009-05-221-2/+2
* drm/i915: allocate large pointer arrays with vmallocJesse Barnes2009-05-191-23/+15
* drm/i915: sanity check IER at wait_request timeJesse Barnes2009-05-141-0/+9
* drm/i915: fix unpaired i915 device mutex on entervt failure.Wu Fengguang2009-04-211-1/+3
* drm/i915: fix scheduling while holding the new active list spinlockShaohua Li2009-04-141-1/+12
* drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU.Eric Anholt2009-04-081-12/+118
* drm/i915: Correctly set the write flag for get_user_pages in pread.Eric Anholt2009-04-081-1/+1
* drm/i915: Fix use of uninitialized var in 40a5f0deFlorian Mickler2009-04-081-12/+22
* drm/i915: Implement batch and ring buffer dumpingBen Gamari2009-04-081-5/+3
* drm/i915: Add a spinlock to protect the active_listCarl Worth2009-04-011-4/+20
* drm/i915: check for -EINVAL from vm_insert_pfnJesse Barnes2009-04-011-0/+1
* drm/i915: fix up tiling/fence reg setup on i8xx class hwDaniel Vetter2009-04-011-5/+8
* drm/i915: check the return value from the copy from userDave Airlie2009-03-281-1/+4
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