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* sh: Remove superfluous setup_frame_reg callMatt Fleming2010-02-081-1/+0
| | | | | | | | | There's no need to setup the frame pointer again in call_handle_tlbmiss. The frame pointer will already have been setup in handle_interrupt. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Setup frame pointer in handle_exception pathMatt Fleming2010-02-081-0/+2
| | | | | | | | In order to allow the DWARF unwinder to unwind through exceptions we need to setup the frame pointer register (r14). Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh3 scif pdata (sh7705/sh770x/sh7710/sh7720)Magnus Damm2009-12-154-87/+142
| | | | | | | | | | This patch breaks out the sh3 scif serial port platform data from a shared platform device to one platform device per port. Also, add serial ports to the list of early platform devices. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Disable SCIF2 on the SH-X3 proto CPU.Paul Mundt2009-10-181-33/+0
| | | | | | | | | | | SCIF2 and the FPU exceptions happen to share vector numbers, one in EXPEVT and the other in INTEVT. This is a violation of the interface and should have never made it in to silicon. On top of that, the demux hack that was added for special dispatch is rather error prone, and introduces more problems than it solves. Kill all of it off, and just refuse to deal with SCIF2 outright. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Don't enable interrupts in the page fault pathMatt Fleming2009-09-281-2/+0
| | | | | | | | | | There's already code in do_page_fault() to conditionally enable interrupts, so we don't need to unconditonally enable them before calling it. This fixes a lockdep warning where we called trace_hardirqs_off() but with irqs still enabled. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: remove bogus set_bus_parent() from SH7709.Rafael Ignacio Zurita2009-09-141-11/+0
| | | | | | | | | | | | | | | | This fixes up broken clock re-parenting undertaken by the SH7709 clock framework code, which is currently in conflict with the legacy CPG framework. With this change in place, the legacy CPG ancestry is used, and we manage to avoid contending on the clock_list_sem mutex, which is already held under the legacy registration path, resulting in livelock. In order for SH7709 to fully support the varying clock modes, it needs to implement a more complete clock framework. After this change it is in sync with legacy CPG mode, which ends up being the default configuration for this CPU anyways. Signed-off-by: Rafael Ignacio Zurita <rizurita@yahoo.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off kgdb's magical NMI debouncing.Paul Mundt2009-09-011-31/+0
| | | | | | | | The kgdb stub has traditionally tied in to the NMI slot, and manually handled debounce. Now that we have a generic way to do this instead, all of the stub-specific debounce silliness can be killed off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: nmi_debug support.Paul Mundt2009-09-012-3/+27
| | | | | | | | | | | | | This implements support for NMI debugging that was shamelessly copied from the avr32 port. A bit of special magic is needed in the interrupt exception path given that the NMI exception handler is stubbed in to the regular exception handling table despite being reported in INTEVT. So we mangle the lookup and kick off an EXPEVT-style exception dispatch from the INTEVT path for exceptions that do_IRQ() has no chance of handling. As a result, we also drop the evt2irq() conversion from the do_IRQ() path and just do it in assembly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/smpPaul Mundt2009-09-011-1/+3
|\ | | | | | | | | Conflicts: arch/sh/mm/cache-sh4.c
| * sh: Remove implicit sign extension from assembler immediatesStuart Menefy2009-08-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SH instruction set has several instructions which accept an 8 bit immediate operand. For logical instructions this operand is zero extended, for arithmetic instructions the operand is sign extended. After adding an option to the assembler to check this, it was found that several pieces of assembly code were assuming this behaviour, and in one case getting it wrong. So this patch explicitly sign extends any immediate operands, which makes it obvious what is happening, and fixes the one case which got it wrong. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * Merge branch 'sh/dwarf-unwinder'Paul Mundt2009-08-221-0/+2
| |\ | | | | | | | | | | | | Conflicts: arch/sh/kernel/cpu/sh3/entry.S
| | * sh: Setup the frame pointer in handle_interruptMatt Fleming2009-08-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_DWARF_UNWINDER is enabled setup r14 in handle_interrupt, so that we can figure out what function was running when we were interrupted. Signed-off-by: Matt Fleming <matt@console-pimps.org>
* | | Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-191-0/+8
|\| | | | | | | | | | | | | | Conflicts: arch/sh/kernel/Makefile_64
| * | sh: Add a few missing irqflags tracing markers.Matt Fleming2009-08-181-0/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | save_regs contains an SR modification without an irqflags annotation, which resulted in a missing TRACE_IRQS_OFF in the interrupt exception path on SH-3/SH4. I've also moved the TRACE_IRQS_OFF/ON annotation when returning from the interrupt to just before we call __restore_all. This seems like the most logical place to put this because the annotation is for when we restore the SR register so we should delay the annotation until as last as possible. We were also missing a TRACE_IRQS_OFF in resume_kernel when CONFIG_PREEMPT is enabled. The end result is that this fixes up the lockdep engine debugging support with CONFIG_PREEMPT enabled on all SH-3/4 parts. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Track the CPU family in sh_cpuinfo.Paul Mundt2009-08-151-0/+2
| | | | | | | | | | | | | | | | | | | | This adds a family member to struct sh_cpuinfo, which allows us to fall back more on the probe routines to work out what sort of subtype we are running on. This will be used by the CPU cache initialization code in order to first do family-level initialization, followed by subtype-level optimizations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-155-4/+5
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| * sh: Setup the frame register in asm codeMatt Fleming2009-08-141-0/+1
| | | | | | | | | | | | | | | | | | In order to use DWARF unwinder info the frame register has to contain a valid value. Whilst GCC takes care of this for C code, we have to do it ourselves for assembly. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: convert processor device setup functions to arch_initcall()Magnus Damm2009-07-234-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the processor platform device setup functions from __initcall() and sometimes device_initcall() to arch_initcall(). This makes sure that the platform devices are registered a bit earlier so the devices are available when drivers register using initcall levels earlier than device_initcall(). A good example is platform devices needed by i2c-sh_mobile.c which registers a bit earlier using subsys_initcall(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: TLB fast path optimizations for load/store exceptions.Paul Mundt2009-08-151-1/+1
| | | | | | | | | | | | | | | | This only bothers with the TLB entry flush in the case of the initial page write exception, as it is unecessary in the case of the load/store exceptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: TLB protection violation exception optimizations.Paul Mundt2009-08-151-11/+19
|/ | | | | | | | | | This adds a bit of rework to have the TLB protection violations skip the TLB miss fastpath and go directly in to do_page_fault(), as these require slow path handling. Based on an earlier patch by SUGIOKA Toshinobu. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: module_clk -> peripheral_clk rename.Paul Mundt2009-05-134-17/+17
| | | | | | | For consistenct naming, and to allow us to fix up some confusion in the SH-Mobile clock framework, amongst other places. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/clkfwkPaul Mundt2009-05-124-0/+594
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| * sh: CMT platform data for sh7720/sh7721Magnus Damm2009-05-121-0/+161
| | | | | | | | | | | | | | | | | | This patch adds CMT platform data for sh7720 and sh7721. All 5 32-bit CMT channels unfortunately share a single IRQ. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: TMU platform data for sh7720/sh7721Magnus Damm2009-05-121-0/+109
| | | | | | | | | | | | | | | | This patch adds TMU platform data for sh7720 and sh7721. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: TMU platform data for sh7710/sh7712Magnus Damm2009-05-121-0/+108
| | | | | | | | | | | | | | | | This patch adds TMU platform data for sh7710 and sh7712. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: TMU platform data for sh7706/sh7707/sh7708/sh7709Magnus Damm2009-05-121-0/+108
| | | | | | | | | | | | | | | | Add TMU platform data for sh7706/sh7707/sh7708/sh7709. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: TMU platform data for sh7705Magnus Damm2009-05-121-0/+108
| | | | | | | | | | | | | | | | This patch adds TMU platform data for sh7705. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: Make recalc return an unsigned long.Paul Mundt2009-05-126-34/+34
|/ | | | | | | This is prep work for cleaning up some of the rate propagation bits. Trivial conversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up DSP context save/restore.Michael Trimarchi2009-04-041-79/+6
| | | | | | | | | | | | | | | | There were a number of issues with the DSP context save/restore code, mostly left-over relics from when it was introduced on SH3-DSP with little follow-up testing, resulting in things like task_pt_dspregs() referencing incorrect state on the stack. This follows the MIPS convention of tracking the DSP state in the thread_struct and handling the state save/restore in switch_to() and finish_arch_switch() respectively. The regset interface is also updated, which allows us to finally be rid of task_pt_dspregs() and the special cased task_pt_regs(). Signed-off-by: Michael Trimarchi <michael@evidence.eu.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix compile error by operands(mov.l) in sh3/entry.SNobuhiro Iwamatsu2009-03-161-1/+1
| | | | | | | | | | | -- log -- arch/sh/kernel/cpu/sh4/../sh3/entry.S:365: Error: invalid operands for opcode make[4]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 make[3]: *** [arch/sh/kernel/cpu/sh4] Error 2 -- log -- Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: hibernation supportMagnus Damm2009-03-103-5/+166
| | | | | | | | | | | | | | | | | Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support to the SuperH architecture. To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state" To resume, pass "resume=/dev/sda2" on the kernel command line. The patch "pm: rework includes, remove arch ifdefs V2" is needed to allow the generic swsusp code to build properly. Hibernation is not enabled with this patch though, a patch setting ARCH_HIBERNATION_POSSIBLE will be submitted later. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7720.Paul Mundt2009-03-061-45/+23
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7710.Paul Mundt2009-03-061-48/+21
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7705.Paul Mundt2009-03-061-42/+19
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh770x.Paul Mundt2009-03-061-47/+21
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up SH-X3 general exception handler build.Paul Mundt2009-02-271-1/+1
| | | | | | | | | | | | | | With the recent entry.S refactoring, the SH-X3 path had a mov.l for a register to register copy, resulting in: AS arch/sh/kernel/cpu/sh4/../sh3/entry.o arch/sh/kernel/cpu/sh4/../sh3/entry.S: Assembler messages: arch/sh/kernel/cpu/sh4/../sh3/entry.S:366: Error: invalid operands for opcode make[3]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 Switch it over to a mov to fix it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: prefetch early exception data on sh4/sh4a.Magnus Damm2009-02-271-2/+5
| | | | | | | | Prefetch early exception data. There is unused space in our exception handler cache line anyway, so this is almost free. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove EXPEVT vector from stack on sh3/sh4/sh4aMagnus Damm2009-02-271-4/+1
| | | | | | | | Remove EXPEVT vector from the stack, lookup_exception_vector() for sh3/sh4/sh4a is already using k2 to get the vector. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework register restore code for sh3/sh4/sh4aMagnus Damm2009-02-271-35/+33
| | | | | | | | | | | | This patch reworks the sh3/sh4/sh4a register restore code in the following ways: - break out restore_regs() from restore_all() - the register saving order is unchanged - use restore_regs() in sh_bios_handler and restore_all - document the function Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: shared register saving code for sh3/sh4/sh4aMagnus Damm2009-02-271-126/+147
| | | | | | | | | | | | | | | | | | This patch reworks the sh3/sh4/sh4a register saving code in the following ways: - break out prepare_stack_save_dsp() from handle_exception() - break out save_regs() from handle_exception() - the register saving order is unchanged - align new functions to fit in cache lines - separate exception code from interrupt code - keep main code flow in a single cache line per exception vector - use bsr/rts for regular functions (save pr first) - keep data in one shared cache line (exception_data) - document the functions - tie in the hp6xx code Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Generic kgdb stub support.Paul Mundt2008-12-222-6/+6
| | | | | | | | This migrates from the old bitrotted kgdb stub implementation and moves to the generic stub. In the process support for SH-2/SH-2A is also added, which the old stub never provided. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Delete unnecessary mov in the interrupt exception entry point.Aoi Shinkai2008-12-221-2/+2
| | | | | | | | | The INTEVT read at interrupt exception entry is uneccessary, as the read is deferred until we are ready to enter do_IRQ(). The kgdb nmi path still requires it, so move it there. Signed-off-by: Aoi Shinkai <shinkoi2005@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move the CPU definition headers from asm/ to cpu/.Paul Mundt2008-10-201-1/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add sh7720 pinmux codeMagnus Damm2008-10-202-0/+1246
| | | | | | | This patch adds pinmux and gpio support for the sh7720 processor. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-291-1/+1
| | | | | | | | | | | | | This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up the SH-3 exception vector table.Paul Mundt2008-07-281-19/+19
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clean up sh7710 and sh7720 intc tablesMagnus Damm2008-05-082-8/+1
| | | | | | | | | | Clean up the intc tables by removing unneeded #ifdefs. The vector list is what selects which interrupt sources that should be added, having unsupported bitfields listed is ok as long as the vector is excluded from the list. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add interrupt ack code to sh3Magnus Damm2008-05-081-4/+11
| | | | | | | | | This patch adds interrupt acknowledge code for external interrupt sources on sh3 processors. Only really required for edge triggered interrupts, but we ack regardless of sense configuration. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: unify external irq pin code for sh3Magnus Damm2008-05-086-94/+75
| | | | | | | | | This patch unifies the sh3 external irq pin code. It buys us some savings with reduced code redundancy, but the main feature with this change is irq sense selection support for all sh3 processors. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix sh7705 interrupt vector typoMagnus Damm2008-05-081-1/+1
| | | | | | | Fix sh7705 interrupt sources for vectors 0xc80 and 0xca0. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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