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* [MIPS] Remove prototype for non-existing function.Ralf Baechle2006-06-191-1/+0
* [MIPS] Fix sparsemem support.Chad Reese2006-06-061-1/+1
* [MIPS] Save write-only Config.OD from being clobberedSergei Shtylyov2006-06-061-0/+34
* [MIPS] Treat R14000 like R10000.Kumba2006-06-013-0/+6
* [MIPS] Fix deadlock on MP with cache aliases.Ralf Baechle2006-06-011-9/+30
* [MIPS] Fix detection and handling of the 74K processor.Chris Dearman2006-06-011-0/+1
* [MIPS] Add missing 34K processor IDsNigel Stephens2006-06-011-0/+1
* [MIPS] Use __ffs() instead of ffs() for waybit calculation.Atsushi Nemoto2006-04-192-9/+9
* [MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle2006-04-195-0/+15
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-193-40/+141
* [MIPS] Fix tx49_blast_icache32_page_indexed.Atsushi Nemoto2006-04-191-1/+2
* [MIPS] Fix CONFIG_LIMITED_DMA build.Ralf Baechle2006-04-191-0/+2
* [MIPS] Fix vectored interrupt support in TLB exception handler generator.Ralf Baechle2006-04-191-2/+2
* [MIPS] Cleanup free_initmem the same way as i386 did.Ralf Baechle2006-04-191-25/+23
* [PATCH] unify PFN_* macrosDave Hansen2006-03-271-3/+1
* [PATCH] s/;;/;/gAlexey Dobriyan2006-03-241-3/+3
* [PATCH] remove set_page_count() outside mm/Nick Piggin2006-03-221-3/+3
* [PATCH] mm: split highorder pagesNick Piggin2006-03-221-2/+3
* [MIPS] TX49XX has prefetch.Atsushi Nemoto2006-03-212-2/+9
* [MIPS] Kill tlb-andes.c.Thiemo Seufer2006-03-213-260/+6
* [MIPS] War on whitespace: cleanup initial spaces followed by tabs.Ralf Baechle2006-03-211-9/+9
* [MIPS] Remove CONFIG_BUILD_ELF64.Ralf Baechle2006-03-211-13/+0
* [MIPS] sc-rm7k.c cleanupAtsushi Nemoto2006-03-211-16/+9
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-182-5/+9
* [MIPS] Scatter a bunch of __init over tlbex.c.Ralf Baechle2006-03-091-17/+17
* [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs.Ralf Baechle2006-02-281-5/+11
* [MIPS] Sibyte: #if CONFIG_* doesn't fly.Ralf Baechle2006-02-211-1/+1
* [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.Atsushi Nemoto2006-02-142-151/+23
* [MIPS] Support /proc/kcore for MIPSDaniel Jacobowitz2006-02-071-0/+16
* [MIPS] Remove wrong __user tags.Atsushi Nemoto2006-02-072-7/+5
* MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.Ralf Baechle2006-01-101-2/+2
* [PATCH] mips: setup_zero_pages count 1Hugh Dickins2005-12-121-2/+2
* [MIPS] Use reset_page_mapcount to initialize empty_zero_page usage counter.Ralf Baechle2005-12-011-1/+1
* [PATCH] mm: init_mm without ptlockHugh Dickins2005-10-291-3/+1
* SB1 cache exception handling.Andrew Isaacson2005-10-292-8/+51
* Add support for SB1A CPU.Andrew Isaacson2005-10-291-0/+1
* Fix zero length sys_cacheflushAtsushi Nemoto2005-10-291-0/+2
* Rename page argument of flush_cache_page to something more descriptive.Ralf Baechle2005-10-291-16/+17
* Fix wrong comment.Ralf Baechle2005-10-291-1/+1
* Fixup a few lose ends in explicit support for MIPS R1/R2.Ralf Baechle2005-10-291-2/+2
* Don't copy SB1 cache error handler to uncached memory.Ralf Baechle2005-10-291-1/+0
* Fix stale comment in c-sb1.c.Andrew Isaacson2005-10-291-1/+1
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-295-54/+44
* Use R4000 TLB routines for SB1 also.Ralf Baechle2005-10-292-386/+1
* Sync c-tx39.c with c-r4k.c.Atsushi Nemoto2005-10-291-4/+5
* Add/Fix missing bit of R4600 hit cacheop workaround.Thiemo Seufer2005-10-292-1/+2
* Minor code cleanup.Thiemo Seufer2005-10-291-15/+15
* R4600 v2.0 needs a nop before tlbp.Thiemo Seufer2005-10-291-0/+2
* Don't set up a sg dma address if we have no page address for some reason.Thiemo Seufer2005-10-291-38/+8
* More .set push/pop.Thiemo Seufer2005-10-291-2/+2
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