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* MIPS: Loongson 2 needs no hazard barriers.Zhang Le2009-05-141-2/+3
* MIPS: Alchemy: MIPS hazard workarounds are not required.Manuel Lauss2009-03-301-2/+2
* MIPS: NEC VR5500 processor support fixupShinya Kuribayashi2009-03-111-1/+2
* MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.David Daney2009-01-111-2/+2
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+271