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-rw-r--r--arch/arm/mach-s3c2410/Makefile5
-rw-r--r--arch/arm/mach-s3c2410/clock.c43
-rw-r--r--arch/arm/mach-s3c2410/clock.h1
-rw-r--r--arch/arm/mach-s3c2410/cpu.c18
-rw-r--r--arch/arm/mach-s3c2410/cpu.h3
-rw-r--r--arch/arm/mach-s3c2410/devs.c62
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/gpio.c72
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c29
-rw-r--r--arch/arm/mach-s3c2410/s3c2400-gpio.c45
-rw-r--r--arch/arm/mach-s3c2410/s3c2400.h31
-rw-r--r--arch/arm/mach-s3c2410/s3c2410-gpio.c93
-rw-r--r--arch/arm/mach-s3c2410/sleep.S8
13 files changed, 300 insertions, 112 deletions
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index b4f1e051c76..1217bf00309 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -10,9 +10,13 @@ obj-m :=
obj-n :=
obj- :=
+# S3C2400 support files
+obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o
+
# S3C2410 support files
obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
+obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o
obj-$(CONFIG_S3C2410_DMA) += dma.o
# Power Management support
@@ -25,6 +29,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
+obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o
# bast extras
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index af2f3d52b61..08489efdaf0 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -40,7 +40,6 @@
#include <linux/mutex.h>
#include <asm/hardware.h>
-#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/io.h>
@@ -59,22 +58,18 @@ static DEFINE_MUTEX(clocks_mutex);
void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable)
{
unsigned long clkcon;
- unsigned long flags;
-
- local_irq_save(flags);
clkcon = __raw_readl(S3C2410_CLKCON);
- clkcon &= ~clocks;
if (enable)
clkcon |= clocks;
+ else
+ clkcon &= ~clocks;
/* ensure none of the special function bits set */
clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER);
__raw_writel(clkcon, S3C2410_CLKCON);
-
- local_irq_restore(flags);
}
/* enable and disable calls for use with the clk struct */
@@ -138,16 +133,32 @@ void clk_put(struct clk *clk)
int clk_enable(struct clk *clk)
{
- if (IS_ERR(clk))
+ if (IS_ERR(clk) || clk == NULL)
return -EINVAL;
- return (clk->enable)(clk, 1);
+ clk_enable(clk->parent);
+
+ mutex_lock(&clocks_mutex);
+
+ if ((clk->usage++) == 0)
+ (clk->enable)(clk, 1);
+
+ mutex_unlock(&clocks_mutex);
+ return 0;
}
void clk_disable(struct clk *clk)
{
- if (!IS_ERR(clk))
+ if (IS_ERR(clk) || clk == NULL)
+ return;
+
+ mutex_lock(&clocks_mutex);
+
+ if ((--clk->usage) == 0)
(clk->enable)(clk, 0);
+
+ mutex_unlock(&clocks_mutex);
+ clk_disable(clk->parent);
}
@@ -361,6 +372,14 @@ int s3c24xx_register_clock(struct clk *clk)
if (clk->enable == NULL)
clk->enable = clk_null_enable;
+ /* if this is a standard clock, set the usage state */
+
+ if (clk->ctrlbit) {
+ unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
+
+ clk->usage = (clkcon & clk->ctrlbit) ? 1 : 0;
+ }
+
/* add to the list of available clocks */
mutex_lock(&clocks_mutex);
@@ -402,6 +421,8 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
* the LCD clock if it is not needed.
*/
+ mutex_lock(&clocks_mutex);
+
s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0);
@@ -409,6 +430,8 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0);
+ mutex_unlock(&clocks_mutex);
+
/* assume uart clocks are correctly setup */
/* register our clocks */
diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h
index 177d5c8decf..eb5c95d1e7f 100644
--- a/arch/arm/mach-s3c2410/clock.h
+++ b/arch/arm/mach-s3c2410/clock.h
@@ -16,6 +16,7 @@ struct clk {
struct clk *parent;
const char *name;
int id;
+ int usage;
unsigned long rate;
unsigned long ctrlbit;
int (*enable)(struct clk *, int enable);
diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c
index 687fe371369..00a379334b6 100644
--- a/arch/arm/mach-s3c2410/cpu.c
+++ b/arch/arm/mach-s3c2410/cpu.c
@@ -40,6 +40,7 @@
#include "cpu.h"
#include "clock.h"
+#include "s3c2400.h"
#include "s3c2410.h"
#include "s3c2440.h"
@@ -55,6 +56,7 @@ struct cpu_table {
/* table of supported CPUs */
+static const char name_s3c2400[] = "S3C2400";
static const char name_s3c2410[] = "S3C2410";
static const char name_s3c2440[] = "S3C2440";
static const char name_s3c2410a[] = "S3C2410A";
@@ -96,7 +98,16 @@ static struct cpu_table cpu_ids[] __initdata = {
.init_uarts = s3c2440_init_uarts,
.init = s3c2440_init,
.name = name_s3c2440a
- }
+ },
+ {
+ .idcode = 0x0, /* S3C2400 doesn't have an idcode */
+ .idmask = 0xffffffff,
+ .map_io = s3c2400_map_io,
+ .init_clocks = s3c2400_init_clocks,
+ .init_uarts = s3c2400_init_uarts,
+ .init = s3c2400_init,
+ .name = name_s3c2400
+ },
};
/* minimal IO mapping */
@@ -148,12 +159,15 @@ static struct cpu_table *cpu;
void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
- unsigned long idcode;
+ unsigned long idcode = 0x0;
/* initialise the io descriptors we need for initialisation */
iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
+#ifndef CONFIG_CPU_S3C2400
idcode = __raw_readl(S3C2410_GSTATUS1);
+#endif
+
cpu = s3c_lookup_cpu(idcode);
if (cpu == NULL) {
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index 9cbe5eef492..fc1067783f6 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -17,11 +17,12 @@
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT
* 14-Mar-2005 BJD Updated for __iomem
+ * 15-Jan-2006 LCVR Updated S3C2410_PA_##x to new S3C24XX_PA_##x macro
*/
/* todo - fix when rmk changes iodescs to use `void __iomem *` */
-#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
+#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#define MHZ (1000*1000)
diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c
index f58406e6ef5..0a47d38789a 100644
--- a/arch/arm/mach-s3c2410/devs.c
+++ b/arch/arm/mach-s3c2410/devs.c
@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*
* Modifications:
+ * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3
@@ -46,8 +47,8 @@ struct platform_device *s3c24xx_uart_devs[3];
static struct resource s3c_usb_resource[] = {
[0] = {
- .start = S3C2410_PA_USBHOST,
- .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
+ .start = S3C24XX_PA_USBHOST,
+ .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -76,8 +77,8 @@ EXPORT_SYMBOL(s3c_device_usb);
static struct resource s3c_lcd_resource[] = {
[0] = {
- .start = S3C2410_PA_LCD,
- .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
+ .start = S3C24XX_PA_LCD,
+ .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -139,8 +140,8 @@ EXPORT_SYMBOL(s3c_device_nand);
static struct resource s3c_usbgadget_resource[] = {
[0] = {
- .start = S3C2410_PA_USBDEV,
- .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
+ .start = S3C24XX_PA_USBDEV,
+ .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -164,8 +165,8 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
static struct resource s3c_wdt_resource[] = {
[0] = {
- .start = S3C2410_PA_WATCHDOG,
- .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
+ .start = S3C24XX_PA_WATCHDOG,
+ .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -189,8 +190,8 @@ EXPORT_SYMBOL(s3c_device_wdt);
static struct resource s3c_i2c_resource[] = {
[0] = {
- .start = S3C2410_PA_IIC,
- .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
+ .start = S3C24XX_PA_IIC,
+ .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -214,8 +215,8 @@ EXPORT_SYMBOL(s3c_device_i2c);
static struct resource s3c_iis_resource[] = {
[0] = {
- .start = S3C2410_PA_IIS,
- .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
+ .start = S3C24XX_PA_IIS,
+ .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM,
}
};
@@ -239,8 +240,8 @@ EXPORT_SYMBOL(s3c_device_iis);
static struct resource s3c_rtc_resource[] = {
[0] = {
- .start = S3C2410_PA_RTC,
- .end = S3C2410_PA_RTC + 0xff,
+ .start = S3C24XX_PA_RTC,
+ .end = S3C24XX_PA_RTC + 0xff,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -268,12 +269,17 @@ EXPORT_SYMBOL(s3c_device_rtc);
static struct resource s3c_adc_resource[] = {
[0] = {
- .start = S3C2410_PA_ADC,
- .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
+ .start = S3C24XX_PA_ADC,
+ .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_TC,
+ .end = IRQ_TC,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = IRQ_ADC,
.end = IRQ_ADC,
.flags = IORESOURCE_IRQ,
}
@@ -316,8 +322,8 @@ EXPORT_SYMBOL(s3c_device_sdi);
static struct resource s3c_spi0_resource[] = {
[0] = {
- .start = S3C2410_PA_SPI,
- .end = S3C2410_PA_SPI + 0x1f,
+ .start = S3C24XX_PA_SPI,
+ .end = S3C24XX_PA_SPI + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -341,8 +347,8 @@ EXPORT_SYMBOL(s3c_device_spi0);
static struct resource s3c_spi1_resource[] = {
[0] = {
- .start = S3C2410_PA_SPI + 0x20,
- .end = S3C2410_PA_SPI + 0x20 + 0x1f,
+ .start = S3C24XX_PA_SPI + 0x20,
+ .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -366,8 +372,8 @@ EXPORT_SYMBOL(s3c_device_spi1);
static struct resource s3c_timer0_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x0C,
- .end = S3C2410_PA_TIMER + 0x0C + 0xB,
+ .start = S3C24XX_PA_TIMER + 0x0C,
+ .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -391,8 +397,8 @@ EXPORT_SYMBOL(s3c_device_timer0);
static struct resource s3c_timer1_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x18,
- .end = S3C2410_PA_TIMER + 0x23,
+ .start = S3C24XX_PA_TIMER + 0x18,
+ .end = S3C24XX_PA_TIMER + 0x23,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -416,8 +422,8 @@ EXPORT_SYMBOL(s3c_device_timer1);
static struct resource s3c_timer2_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x24,
- .end = S3C2410_PA_TIMER + 0x2F,
+ .start = S3C24XX_PA_TIMER + 0x24,
+ .end = S3C24XX_PA_TIMER + 0x2F,
.flags = IORESOURCE_MEM,
},
[1] = {
@@ -441,8 +447,8 @@ EXPORT_SYMBOL(s3c_device_timer2);
static struct resource s3c_timer3_resource[] = {
[0] = {
- .start = S3C2410_PA_TIMER + 0x30,
- .end = S3C2410_PA_TIMER + 0x3B,
+ .start = S3C24XX_PA_TIMER + 0x30,
+ .end = S3C24XX_PA_TIMER + 0x3B,
.flags = IORESOURCE_MEM,
},
[1] = {
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 65feaf20d23..4dbd8e758ea 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -1152,7 +1152,7 @@ static int __init s3c2410_init_dma(void)
printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
- dma_base = ioremap(S3C2410_PA_DMA, 0x200);
+ dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
if (dma_base == NULL) {
printk(KERN_ERR "dma failed to remap register block\n");
return -ENOMEM;
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 23ea3d5fa09..cd39e868458 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -31,6 +31,7 @@
* 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
* 13-Mar-2005 BJD Updates for __iomem
* 26-Oct-2005 BJD Added generic configuration types
+ * 15-Jan-2006 LCVR Added support for the S3C2400
*/
@@ -48,7 +49,7 @@
void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
{
- void __iomem *base = S3C2410_GPIO_BASE(pin);
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
unsigned long mask;
unsigned long con;
unsigned long flags;
@@ -95,7 +96,7 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
unsigned int s3c2410_gpio_getcfg(unsigned int pin)
{
- void __iomem *base = S3C2410_GPIO_BASE(pin);
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
unsigned long mask;
if (pin < S3C2410_GPIO_BANKB) {
@@ -111,7 +112,7 @@ EXPORT_SYMBOL(s3c2410_gpio_getcfg);
void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
{
- void __iomem *base = S3C2410_GPIO_BASE(pin);
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long up;
@@ -133,7 +134,7 @@ EXPORT_SYMBOL(s3c2410_gpio_pullup);
void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
{
- void __iomem *base = S3C2410_GPIO_BASE(pin);
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
unsigned long flags;
unsigned long dat;
@@ -152,7 +153,7 @@ EXPORT_SYMBOL(s3c2410_gpio_setpin);
unsigned int s3c2410_gpio_getpin(unsigned int pin)
{
- void __iomem *base = S3C2410_GPIO_BASE(pin);
+ void __iomem *base = S3C24XX_GPIO_BASE(pin);
unsigned long offs = S3C2410_GPIO_OFFSET(pin);
return __raw_readl(base + 0x04) & (1<< offs);
@@ -166,70 +167,13 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
unsigned long misccr;
local_irq_save(flags);
- misccr = __raw_readl(S3C2410_MISCCR);
+ misccr = __raw_readl(S3C24XX_MISCCR);
misccr &= ~clear;
misccr ^= change;
- __raw_writel(misccr, S3C2410_MISCCR);
+ __raw_writel(misccr, S3C24XX_MISCCR);
local_irq_restore(flags);
return misccr;
}
EXPORT_SYMBOL(s3c2410_modify_misccr);
-
-int s3c2410_gpio_getirq(unsigned int pin)
-{
- if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23)
- return -1; /* not valid interrupts */
-
- if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
- return -1; /* not valid pin */
-
- if (pin < S3C2410_GPF4)
- return (pin - S3C2410_GPF0) + IRQ_EINT0;
-
- if (pin < S3C2410_GPG0)
- return (pin - S3C2410_GPF4) + IRQ_EINT4;
-
- return (pin - S3C2410_GPG0) + IRQ_EINT8;
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_getirq);
-
-int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
- unsigned int config)
-{
- void __iomem *reg = S3C2410_EINFLT0;
- unsigned long flags;
- unsigned long val;
-
- if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15)
- return -1;
-
- config &= 0xff;
-
- pin -= S3C2410_GPG8_EINT16;
- reg += pin & ~3;
-
- local_irq_save(flags);
-
- /* update filter width and clock source */
-
- val = __raw_readl(reg);
- val &= ~(0xff << ((pin & 3) * 8));
- val |= config << ((pin & 3) * 8);
- __raw_writel(val, reg);
-
- /* update filter enable */
-
- val = __raw_readl(S3C2410_EXTINT2);
- val &= ~(1 << ((pin * 4) + 3));
- val |= on << ((pin * 4) + 3);
- __raw_writel(val, S3C2410_EXTINT2);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_irqfilter);
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 1c316f14ed9..646a3a5d33a 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,10 +46,11 @@
#include <asm/irq.h>
#include <asm/mach-types.h>
-//#include <asm/debug-ll.h>
+
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-lcd.h>
+#include <asm/arch/h1940-latch.h>
#include <asm/arch/fb.h>
#include <linux/serial_core.h>
@@ -59,7 +60,12 @@
#include "cpu.h"
static struct map_desc h1940_iodesc[] __initdata = {
- /* nothing here yet */
+ [0] = {
+ .virtual = (unsigned long)H1940_LATCH,
+ .pfn = __phys_to_pfn(H1940_PA_LATCH),
+ .length = SZ_16K,
+ .type = MT_DEVICE
+ },
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
@@ -92,6 +98,25 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = {
}
};
+/* Board control latch control */
+
+static unsigned int latch_state = H1940_LATCH_DEFAULT;
+
+void h1940_latch_control(unsigned int clear, unsigned int set)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+
+ latch_state &= ~clear;
+ latch_state |= set;
+
+ __raw_writel(latch_state, H1940_LATCH);
+
+ local_irq_restore(flags);
+}
+
+EXPORT_SYMBOL_GPL(h1940_latch_control);
/**
diff --git a/arch/arm/mach-s3c2410/s3c2400-gpio.c b/arch/arm/mach-s3c2410/s3c2400-gpio.c
new file mode 100644
index 00000000000..5127f39fa9b
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2400-gpio.c
@@ -0,0 +1,45 @@
+/* linux/arch/arm/mach-s3c2410/gpio.c
+ *
+ * Copyright (c) 2006 Lucas Correia Villa Real <lucasvr@gobolinux.org>
+ *
+ * S3C2400 GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Changelog
+ * 15-Jan-2006 LCVR Splitted from gpio.c, adding support for the S3C2400
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/arch/regs-gpio.h>
+
+int s3c2400_gpio_getirq(unsigned int pin)
+{
+ if (pin < S3C2410_GPE0 || pin > S3C2400_GPE7_EINT7)
+ return -1; /* not valid interrupts */
+
+ return (pin - S3C2410_GPE0) + IRQ_EINT0;
+}
+
+EXPORT_SYMBOL(s3c2400_gpio_getirq);
diff --git a/arch/arm/mach-s3c2410/s3c2400.h b/arch/arm/mach-s3c2410/s3c2400.h
new file mode 100644
index 00000000000..8b2394e1ed4
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2400.h
@@ -0,0 +1,31 @@
+/* arch/arm/mach-s3c2410/s3c2400.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C2400 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ * 09-Fev-2006 LCVR First version, based on s3c2410.h
+*/
+
+#ifdef CONFIG_CPU_S3C2400
+
+extern int s3c2400_init(void);
+
+extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
+
+extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+extern void s3c2400_init_clocks(int xtal);
+
+#else
+#define s3c2400_init_clocks NULL
+#define s3c2400_init_uarts NULL
+#define s3c2400_map_io NULL
+#define s3c2400_init NULL
+#endif
diff --git a/arch/arm/mach-s3c2410/s3c2410-gpio.c b/arch/arm/mach-s3c2410/s3c2410-gpio.c
new file mode 100644
index 00000000000..d5e1caea1d2
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2410-gpio.c
@@ -0,0 +1,93 @@
+/* linux/arch/arm/mach-s3c2410/gpio.c
+ *
+ * Copyright (c) 2004-2006 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Changelog
+ * 15-Jan-2006 LCVR Splitted from gpio.c
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/arch/regs-gpio.h>
+
+int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
+ unsigned int config)
+{
+ void __iomem *reg = S3C2410_EINFLT0;
+ unsigned long flags;
+ unsigned long val;
+
+ if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15)
+ return -1;
+
+ config &= 0xff;
+
+ pin -= S3C2410_GPG8_EINT16;
+ reg += pin & ~3;
+
+ local_irq_save(flags);
+
+ /* update filter width and clock source */
+
+ val = __raw_readl(reg);
+ val &= ~(0xff << ((pin & 3) * 8));
+ val |= config << ((pin & 3) * 8);
+ __raw_writel(val, reg);
+
+ /* update filter enable */
+
+ val = __raw_readl(S3C2410_EXTINT2);
+ val &= ~(1 << ((pin * 4) + 3));
+ val |= on << ((pin * 4) + 3);
+ __raw_writel(val, S3C2410_EXTINT2);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+EXPORT_SYMBOL(s3c2410_gpio_irqfilter);
+
+int s3c2410_gpio_getirq(unsigned int pin)
+{
+ if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23)
+ return -1; /* not valid interrupts */
+
+ if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
+ return -1; /* not valid pin */
+
+ if (pin < S3C2410_GPF4)
+ return (pin - S3C2410_GPF0) + IRQ_EINT0;
+
+ if (pin < S3C2410_GPG0)
+ return (pin - S3C2410_GPF4) + IRQ_EINT4;
+
+ return (pin - S3C2410_GPG0) + IRQ_EINT8;
+}
+
+EXPORT_SYMBOL(s3c2410_gpio_getirq);
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index 61768dac7fe..832fb86a03b 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -72,7 +72,7 @@ ENTRY(s3c2410_cpu_suspend)
@@ prepare cpu to sleep
ldr r4, =S3C2410_REFRESH
- ldr r5, =S3C2410_MISCCR
+ ldr r5, =S3C24XX_MISCCR
ldr r6, =S3C2410_CLKCON
ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
@@ -133,12 +133,12 @@ ENTRY(s3c2410_cpu_resume)
@@ load UART to allow us to print the two characters for
@@ resume debug
- mov r2, #S3C2410_PA_UART & 0xff000000
- orr r2, r2, #S3C2410_PA_UART & 0xff000
+ mov r2, #S3C24XX_PA_UART & 0xff000000
+ orr r2, r2, #S3C24XX_PA_UART & 0xff000
#if 0
/* SMDK2440 LED set */
- mov r14, #S3C2410_PA_GPIO
+ mov r14, #S3C24XX_PA_GPIO
ldr r12, [ r14, #0x54 ]
bic r12, r12, #3<<4
orr r12, r12, #1<<7
generated by cgit (git 2.34.1) at 2024-10-04 04:24:41 +0000