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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-28 19:33:04 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-28 19:33:04 -0700 |
| commit | 7b5573769f26a23518b33a64ec129d2833564877 (patch) | |
| tree | 697674b1d2bf12541fc745baa8ef8d9e6faf8888 /include/asm-blackfin/mach-bf548/cdefBF54x_base.h | |
| parent | 8e8ef2971b0fd6dcf1a66014fb74b41938eecb4e (diff) | |
| parent | 27b92bdbd589cf3f59244bf5e848e7be254a2e4c (diff) | |
| download | kernel-crypto-7b5573769f26a23518b33a64ec129d2833564877.tar.gz kernel-crypto-7b5573769f26a23518b33a64ec129d2833564877.tar.xz kernel-crypto-7b5573769f26a23518b33a64ec129d2833564877.zip | |
Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6:
Input Serio: Blackfin doesnt support I8042 - make sure it doesnt get selected
Blackfin arch: add BF54x I2C/TWI TWI0 driver support
Blackfin On-Chip RTC driver update for supporting BF54x
Blackfin Ethernet MAC driver: fix bug Report returned -ENOMEM upwards (in case L1/uncached memory alloc fails)
Blackfin arch: add error message when IRQ no available
Blackfin arch: Initialize the exception vectors early in the boot process
Blackfin arch: fix a compiling warning about dma-mapping
Blackfin arch: switch to using proper defines this time THREAD_SIZE and PAGE_SIZE instead of just PAGE_SIZE everywhere
Blackfin arch: fix bug which unaligns the init thread's stack and causes the current macro to fail.
Blackfin arch: Load P0 before storing through it
Blackfin arch: fix KGDB bug, dont forget last parameter.
Blackfin arch: add selections for BF544 and BF542
Blackfin arch: use bfin_read_SWRST() now that BF561 provides it
Blackfin arch: setup aliases for some core Core A MMRs
Diffstat (limited to 'include/asm-blackfin/mach-bf548/cdefBF54x_base.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index 98d35a92911..cdf29e75ea5 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h @@ -242,6 +242,39 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) #define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) #define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) +#define bfin_read_TWI_CLKDIV() bfin_read16(TWI0_CLKDIV) +#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val) +#define bfin_read_TWI_CONTROL() bfin_read16(TWI0_CONTROL) +#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI0_CONTROL, val) +#define bfin_read_TWI_SLAVE_CTRL() bfin_read16(TWI0_SLAVE_CTRL) +#define bfin_write_TWI_SLAVE_CTRL(val) bfin_write16(TWI0_SLAVE_CTRL, val) +#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT) +#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val) +#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR) +#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val) +#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI0_MASTER_CTRL) +#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI0_MASTER_CTRL, val) +#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT) +#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val) +#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR) +#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val) +#define bfin_read_TWI_INT_STAT() bfin_read16(TWI0_INT_STAT) +#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val) +#define bfin_read_TWI_INT_MASK() bfin_read16(TWI0_INT_MASK) +#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val) +#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI0_FIFO_CTRL) +#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI0_FIFO_CTRL, val) +#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT) +#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val) +#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8) +#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val) +#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16) +#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val) +#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8) +#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val) +#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16) +#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val) + /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */ /* SPORT1 Registers */ |