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authorChris Leech <christopher.leech@intel.com>2007-03-08 09:57:33 -0800
committerDan Williams <dan.j.williams@intel.com>2007-07-11 15:39:03 -0700
commit000725d56a196e72dc22328324c5ec5506265736 (patch)
tree7189116b48efd57b2de74cc924d39fc885cf4d9e /drivers/dma
parent7dcca30a32aadb0520417521b0c44f42d09fe05c (diff)
downloadkernel-crypto-000725d56a196e72dc22328324c5ec5506265736.tar.gz
kernel-crypto-000725d56a196e72dc22328324c5ec5506265736.tar.xz
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ioatdma: Push pending transactions to hardware more frequently
Every 20 descriptors turns out to be to few append commands with newer/faster CPUs. Pushing every 4 still cuts down on MMIO writes to an acceptable level without letting the DMA engine run out of work. Signed-off-by: Chris Leech <christopher.leech@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/ioatdma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/ioatdma.c b/drivers/dma/ioatdma.c
index 85001413955..4e6afd75203 100644
--- a/drivers/dma/ioatdma.c
+++ b/drivers/dma/ioatdma.c
@@ -310,7 +310,7 @@ static dma_cookie_t do_ioat_dma_memcpy(struct ioat_dma_chan *ioat_chan,
list_splice_init(&new_chain, ioat_chan->used_desc.prev);
ioat_chan->pending += desc_count;
- if (ioat_chan->pending >= 20) {
+ if (ioat_chan->pending >= 4) {
append = 1;
ioat_chan->pending = 0;
}
@@ -818,7 +818,7 @@ static void __devexit ioat_remove(struct pci_dev *pdev)
}
/* MODULE API */
-MODULE_VERSION("1.7");
+MODULE_VERSION("1.9");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Intel Corporation");