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| author | Joachim Deguara <joachim.deguara@amd.com> | 2007-05-02 19:27:18 +0200 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2007-05-02 19:27:18 +0200 |
| commit | 2f3c30e6a886ddaf65cb74df82c03245050ff0aa (patch) | |
| tree | 1aad760d9503b210ae0ec9341c81e02fdbdda9c4 /arch | |
| parent | 1bdae4583e7abd2c1daedfc9f46ac6420a26c1b0 (diff) | |
| download | kernel-crypto-2f3c30e6a886ddaf65cb74df82c03245050ff0aa.tar.gz kernel-crypto-2f3c30e6a886ddaf65cb74df82c03245050ff0aa.tar.xz kernel-crypto-2f3c30e6a886ddaf65cb74df82c03245050ff0aa.zip | |
[PATCH] i386: check capability
Currently the i386 architecture checks the family for mce capability and this
removes that and uses the CPUID information. Tested on a K8 revE and a
family10h processor.
This eliminates checking of a set AMD procesor family if mce is
allowed and relies on the information being in CPUID.
Signed-off-by: Joachim Deguara <joachim.deguara@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/i386/kernel/cpu/mcheck/k7.c | 3 | ||||
| -rw-r--r-- | arch/i386/kernel/cpu/mcheck/mce.c | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c index 7a2472557bb..f9fa4142551 100644 --- a/arch/i386/kernel/cpu/mcheck/k7.c +++ b/arch/i386/kernel/cpu/mcheck/k7.c @@ -75,6 +75,9 @@ void amd_mcheck_init(struct cpuinfo_x86 *c) machine_check_vector = k7_machine_check; wmb(); + if (!cpu_has(c, X86_FEATURE_MCE)) + return; + printk (KERN_INFO "Intel machine check architecture supported.\n"); rdmsr (MSR_IA32_MCG_CAP, l, h); if (l & (1<<8)) /* Control register present ? */ diff --git a/arch/i386/kernel/cpu/mcheck/mce.c b/arch/i386/kernel/cpu/mcheck/mce.c index 4f10c62d180..56cd485b127 100644 --- a/arch/i386/kernel/cpu/mcheck/mce.c +++ b/arch/i386/kernel/cpu/mcheck/mce.c @@ -38,8 +38,7 @@ void mcheck_init(struct cpuinfo_x86 *c) switch (c->x86_vendor) { case X86_VENDOR_AMD: - if (c->x86==6 || c->x86==15) - amd_mcheck_init(c); + amd_mcheck_init(c); break; case X86_VENDOR_INTEL: |